diff options
author | Ingo Molnar <mingo@elte.hu> | 2011-01-09 04:42:21 -0500 |
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committer | Ingo Molnar <mingo@elte.hu> | 2011-01-09 04:42:21 -0500 |
commit | 4385428a477559b26736cc3c80d8b68f31126c71 (patch) | |
tree | 8eb0cbc78e79c368687fa13a1e0674ae537f830f /drivers/char | |
parent | 047a3772feaae8e43d81d790f3d3f80dae8ae676 (diff) | |
parent | 2d75af2f2a7a6103a6d539a492fe81deacabde44 (diff) |
Merge branch 'tip/perf/core' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-2.6-trace into perf/urgent
Diffstat (limited to 'drivers/char')
-rw-r--r-- | drivers/char/agp/amd64-agp.c | 33 |
1 files changed, 16 insertions, 17 deletions
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c index 42396df55556..9252e85706ef 100644 --- a/drivers/char/agp/amd64-agp.c +++ b/drivers/char/agp/amd64-agp.c | |||
@@ -38,7 +38,7 @@ static int agp_bridges_found; | |||
38 | 38 | ||
39 | static void amd64_tlbflush(struct agp_memory *temp) | 39 | static void amd64_tlbflush(struct agp_memory *temp) |
40 | { | 40 | { |
41 | k8_flush_garts(); | 41 | amd_flush_garts(); |
42 | } | 42 | } |
43 | 43 | ||
44 | static int amd64_insert_memory(struct agp_memory *mem, off_t pg_start, int type) | 44 | static int amd64_insert_memory(struct agp_memory *mem, off_t pg_start, int type) |
@@ -124,7 +124,7 @@ static int amd64_fetch_size(void) | |||
124 | u32 temp; | 124 | u32 temp; |
125 | struct aper_size_info_32 *values; | 125 | struct aper_size_info_32 *values; |
126 | 126 | ||
127 | dev = k8_northbridges.nb_misc[0]; | 127 | dev = node_to_amd_nb(0)->misc; |
128 | if (dev==NULL) | 128 | if (dev==NULL) |
129 | return 0; | 129 | return 0; |
130 | 130 | ||
@@ -181,16 +181,15 @@ static int amd_8151_configure(void) | |||
181 | unsigned long gatt_bus = virt_to_phys(agp_bridge->gatt_table_real); | 181 | unsigned long gatt_bus = virt_to_phys(agp_bridge->gatt_table_real); |
182 | int i; | 182 | int i; |
183 | 183 | ||
184 | if (!k8_northbridges.gart_supported) | 184 | if (!amd_nb_has_feature(AMD_NB_GART)) |
185 | return 0; | 185 | return 0; |
186 | 186 | ||
187 | /* Configure AGP regs in each x86-64 host bridge. */ | 187 | /* Configure AGP regs in each x86-64 host bridge. */ |
188 | for (i = 0; i < k8_northbridges.num; i++) { | 188 | for (i = 0; i < amd_nb_num(); i++) { |
189 | agp_bridge->gart_bus_addr = | 189 | agp_bridge->gart_bus_addr = |
190 | amd64_configure(k8_northbridges.nb_misc[i], | 190 | amd64_configure(node_to_amd_nb(i)->misc, gatt_bus); |
191 | gatt_bus); | ||
192 | } | 191 | } |
193 | k8_flush_garts(); | 192 | amd_flush_garts(); |
194 | return 0; | 193 | return 0; |
195 | } | 194 | } |
196 | 195 | ||
@@ -200,11 +199,11 @@ static void amd64_cleanup(void) | |||
200 | u32 tmp; | 199 | u32 tmp; |
201 | int i; | 200 | int i; |
202 | 201 | ||
203 | if (!k8_northbridges.gart_supported) | 202 | if (!amd_nb_has_feature(AMD_NB_GART)) |
204 | return; | 203 | return; |
205 | 204 | ||
206 | for (i = 0; i < k8_northbridges.num; i++) { | 205 | for (i = 0; i < amd_nb_num(); i++) { |
207 | struct pci_dev *dev = k8_northbridges.nb_misc[i]; | 206 | struct pci_dev *dev = node_to_amd_nb(i)->misc; |
208 | /* disable gart translation */ | 207 | /* disable gart translation */ |
209 | pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &tmp); | 208 | pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &tmp); |
210 | tmp &= ~GARTEN; | 209 | tmp &= ~GARTEN; |
@@ -331,15 +330,15 @@ static __devinit int cache_nbs(struct pci_dev *pdev, u32 cap_ptr) | |||
331 | { | 330 | { |
332 | int i; | 331 | int i; |
333 | 332 | ||
334 | if (cache_k8_northbridges() < 0) | 333 | if (amd_cache_northbridges() < 0) |
335 | return -ENODEV; | 334 | return -ENODEV; |
336 | 335 | ||
337 | if (!k8_northbridges.gart_supported) | 336 | if (!amd_nb_has_feature(AMD_NB_GART)) |
338 | return -ENODEV; | 337 | return -ENODEV; |
339 | 338 | ||
340 | i = 0; | 339 | i = 0; |
341 | for (i = 0; i < k8_northbridges.num; i++) { | 340 | for (i = 0; i < amd_nb_num(); i++) { |
342 | struct pci_dev *dev = k8_northbridges.nb_misc[i]; | 341 | struct pci_dev *dev = node_to_amd_nb(i)->misc; |
343 | if (fix_northbridge(dev, pdev, cap_ptr) < 0) { | 342 | if (fix_northbridge(dev, pdev, cap_ptr) < 0) { |
344 | dev_err(&dev->dev, "no usable aperture found\n"); | 343 | dev_err(&dev->dev, "no usable aperture found\n"); |
345 | #ifdef __x86_64__ | 344 | #ifdef __x86_64__ |
@@ -416,7 +415,7 @@ static int __devinit uli_agp_init(struct pci_dev *pdev) | |||
416 | } | 415 | } |
417 | 416 | ||
418 | /* shadow x86-64 registers into ULi registers */ | 417 | /* shadow x86-64 registers into ULi registers */ |
419 | pci_read_config_dword (k8_northbridges.nb_misc[0], AMD64_GARTAPERTUREBASE, | 418 | pci_read_config_dword (node_to_amd_nb(0)->misc, AMD64_GARTAPERTUREBASE, |
420 | &httfea); | 419 | &httfea); |
421 | 420 | ||
422 | /* if x86-64 aperture base is beyond 4G, exit here */ | 421 | /* if x86-64 aperture base is beyond 4G, exit here */ |
@@ -484,7 +483,7 @@ static int nforce3_agp_init(struct pci_dev *pdev) | |||
484 | pci_write_config_dword(dev1, NVIDIA_X86_64_1_APSIZE, tmp); | 483 | pci_write_config_dword(dev1, NVIDIA_X86_64_1_APSIZE, tmp); |
485 | 484 | ||
486 | /* shadow x86-64 registers into NVIDIA registers */ | 485 | /* shadow x86-64 registers into NVIDIA registers */ |
487 | pci_read_config_dword (k8_northbridges.nb_misc[0], AMD64_GARTAPERTUREBASE, | 486 | pci_read_config_dword (node_to_amd_nb(0)->misc, AMD64_GARTAPERTUREBASE, |
488 | &apbase); | 487 | &apbase); |
489 | 488 | ||
490 | /* if x86-64 aperture base is beyond 4G, exit here */ | 489 | /* if x86-64 aperture base is beyond 4G, exit here */ |
@@ -778,7 +777,7 @@ int __init agp_amd64_init(void) | |||
778 | } | 777 | } |
779 | 778 | ||
780 | /* First check that we have at least one AMD64 NB */ | 779 | /* First check that we have at least one AMD64 NB */ |
781 | if (!pci_dev_present(k8_nb_ids)) | 780 | if (!pci_dev_present(amd_nb_misc_ids)) |
782 | return -ENODEV; | 781 | return -ENODEV; |
783 | 782 | ||
784 | /* Look for any AGP bridge */ | 783 | /* Look for any AGP bridge */ |