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authorJohn Crispin <blogic@openwrt.org>2012-05-11 12:45:25 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-05-21 09:31:50 -0400
commitbd51db7f3bf2ba23ff55f6d5fdcec04c74df13e4 (patch)
treedc3a006b1679726d1eadca10c9d35f1b330c3fdc /arch
parent3645da0276ae9f6938ff29b13904b803ecb68424 (diff)
MIPS: lantiq: drop ltq_gpio_request() and gpio_to_irq()
As part of the conversion to OF we also implement pinctrl drivers. Previously we used ltq_gpio_request() to set pinmuxing. This is now obselete and we can hence drop the function. Additionally we remove gpio_to_irq() from the gpio driver and move it to a header file. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3801/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/include/asm/mach-lantiq/gpio.h16
-rw-r--r--arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h2
-rw-r--r--arch/mips/lantiq/xway/gpio.c12
-rw-r--r--arch/mips/lantiq/xway/gpio_stp.c5
-rw-r--r--arch/mips/pci/pci-lantiq.c44
5 files changed, 17 insertions, 62 deletions
diff --git a/arch/mips/include/asm/mach-lantiq/gpio.h b/arch/mips/include/asm/mach-lantiq/gpio.h
new file mode 100644
index 000000000000..f79505b43609
--- /dev/null
+++ b/arch/mips/include/asm/mach-lantiq/gpio.h
@@ -0,0 +1,16 @@
1#ifndef __ASM_MIPS_MACH_LANTIQ_GPIO_H
2#define __ASM_MIPS_MACH_LANTIQ_GPIO_H
3
4static inline int gpio_to_irq(unsigned int gpio)
5{
6 return -1;
7}
8
9#define gpio_get_value __gpio_get_value
10#define gpio_set_value __gpio_set_value
11
12#define gpio_cansleep __gpio_cansleep
13
14#include <asm-generic/gpio.h>
15
16#endif
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
index 15eb4dc6ec03..150c7bef5a14 100644
--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
@@ -153,8 +153,6 @@
153#define LTQ_MPS_CHIPID ((u32 *)(LTQ_MPS_BASE_ADDR + 0x0344)) 153#define LTQ_MPS_CHIPID ((u32 *)(LTQ_MPS_BASE_ADDR + 0x0344))
154 154
155/* request a non-gpio and set the PIO config */ 155/* request a non-gpio and set the PIO config */
156extern int ltq_gpio_request(unsigned int pin, unsigned int alt0,
157 unsigned int alt1, unsigned int dir, const char *name);
158extern void ltq_pmu_enable(unsigned int module); 156extern void ltq_pmu_enable(unsigned int module);
159extern void ltq_pmu_disable(unsigned int module); 157extern void ltq_pmu_disable(unsigned int module);
160 158
diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c
index d2fa98f3c78d..a8b2edc80855 100644
--- a/arch/mips/lantiq/xway/gpio.c
+++ b/arch/mips/lantiq/xway/gpio.c
@@ -36,18 +36,6 @@ struct ltq_gpio {
36 36
37static struct ltq_gpio ltq_gpio_port[MAX_PORTS]; 37static struct ltq_gpio ltq_gpio_port[MAX_PORTS];
38 38
39int gpio_to_irq(unsigned int gpio)
40{
41 return -EINVAL;
42}
43EXPORT_SYMBOL(gpio_to_irq);
44
45int irq_to_gpio(unsigned int gpio)
46{
47 return -EINVAL;
48}
49EXPORT_SYMBOL(irq_to_gpio);
50
51int ltq_gpio_request(unsigned int pin, unsigned int alt0, 39int ltq_gpio_request(unsigned int pin, unsigned int alt0,
52 unsigned int alt1, unsigned int dir, const char *name) 40 unsigned int alt1, unsigned int dir, const char *name)
53{ 41{
diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c
index ff9991cddeaa..d674f1be237d 100644
--- a/arch/mips/lantiq/xway/gpio_stp.c
+++ b/arch/mips/lantiq/xway/gpio_stp.c
@@ -78,11 +78,6 @@ static struct gpio_chip ltq_stp_chip = {
78 78
79static int ltq_stp_hw_init(void) 79static int ltq_stp_hw_init(void)
80{ 80{
81 /* the 3 pins used to control the external stp */
82 ltq_gpio_request(4, 1, 0, 1, "stp-st");
83 ltq_gpio_request(5, 1, 0, 1, "stp-d");
84 ltq_gpio_request(6, 1, 0, 1, "stp-sh");
85
86 /* sane defaults */ 81 /* sane defaults */
87 ltq_stp_w32(0, LTQ_STP_AR); 82 ltq_stp_w32(0, LTQ_STP_AR);
88 ltq_stp_w32(0, LTQ_STP_CPU0); 83 ltq_stp_w32(0, LTQ_STP_CPU0);
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
index 030c77e7926e..4d8c49beeda4 100644
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -68,32 +68,6 @@
68#define ltq_pci_cfg_w32(x, y) ltq_w32((x), ltq_pci_mapped_cfg + (y)) 68#define ltq_pci_cfg_w32(x, y) ltq_w32((x), ltq_pci_mapped_cfg + (y))
69#define ltq_pci_cfg_r32(x) ltq_r32(ltq_pci_mapped_cfg + (x)) 69#define ltq_pci_cfg_r32(x) ltq_r32(ltq_pci_mapped_cfg + (x))
70 70
71struct ltq_pci_gpio_map {
72 int pin;
73 int alt0;
74 int alt1;
75 int dir;
76 char *name;
77};
78
79/* the pci core can make use of the following gpios */
80static struct ltq_pci_gpio_map ltq_pci_gpio_map[] = {
81 { 0, 1, 0, 0, "pci-exin0" },
82 { 1, 1, 0, 0, "pci-exin1" },
83 { 2, 1, 0, 0, "pci-exin2" },
84 { 39, 1, 0, 0, "pci-exin3" },
85 { 10, 1, 0, 0, "pci-exin4" },
86 { 9, 1, 0, 0, "pci-exin5" },
87 { 30, 1, 0, 1, "pci-gnt1" },
88 { 23, 1, 0, 1, "pci-gnt2" },
89 { 19, 1, 0, 1, "pci-gnt3" },
90 { 38, 1, 0, 1, "pci-gnt4" },
91 { 29, 1, 0, 0, "pci-req1" },
92 { 31, 1, 0, 0, "pci-req2" },
93 { 3, 1, 0, 0, "pci-req3" },
94 { 37, 1, 0, 0, "pci-req4" },
95};
96
97__iomem void *ltq_pci_mapped_cfg; 71__iomem void *ltq_pci_mapped_cfg;
98static __iomem void *ltq_pci_membase; 72static __iomem void *ltq_pci_membase;
99 73
@@ -151,22 +125,6 @@ static u32 ltq_calc_bar11mask(void)
151 return bar11mask; 125 return bar11mask;
152} 126}
153 127
154static void ltq_pci_setup_gpio(int gpio)
155{
156 int i;
157 for (i = 0; i < ARRAY_SIZE(ltq_pci_gpio_map); i++) {
158 if (gpio & (1 << i)) {
159 ltq_gpio_request(ltq_pci_gpio_map[i].pin,
160 ltq_pci_gpio_map[i].alt0,
161 ltq_pci_gpio_map[i].alt1,
162 ltq_pci_gpio_map[i].dir,
163 ltq_pci_gpio_map[i].name);
164 }
165 }
166 ltq_gpio_request(21, 0, 0, 1, "pci-reset");
167 ltq_pci_req_mask = (gpio >> PCI_REQ_SHIFT) & PCI_REQ_MASK;
168}
169
170static int __devinit ltq_pci_startup(struct ltq_pci_data *conf) 128static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)
171{ 129{
172 u32 temp_buffer; 130 u32 temp_buffer;
@@ -192,7 +150,7 @@ static int __devinit ltq_pci_startup(struct ltq_pci_data *conf)
192 } 150 }
193 151
194 /* setup pci clock and gpis used by pci */ 152 /* setup pci clock and gpis used by pci */
195 ltq_pci_setup_gpio(conf->gpio); 153 gpio_request(21, "pci-reset");
196 154
197 /* enable auto-switching between PCI and EBU */ 155 /* enable auto-switching between PCI and EBU */
198 ltq_pci_w32(0xa, PCI_CR_CLK_CTRL); 156 ltq_pci_w32(0xa, PCI_CR_CLK_CTRL);