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authorAlexander Graf <agraf@suse.de>2012-04-25 08:29:57 -0400
committerAlexander Graf <agraf@suse.de>2012-05-06 10:19:09 -0400
commitaf415087d2bbbef3cc25cdf371bfb0460cf66b3b (patch)
treeb8b2ec53eb2607bccb8ecf66c1869a42f1dd2034 /arch
parent8c2d0be7efb0b92b5e4f89ea4363f3cdc11e2459 (diff)
KVM: PPC: Book3S: PR: No isync in slbie path
While messing around with the SLBs we're running in real mode. The entry to guest space goes through rfid, which is context synchronizing, so there's no need to manually synchronize anything through isync. With this patch and a simple priviledged SPR access loop guest, I get a speed bump from 2035607 to 2181301 exits per second. Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/kvm/book3s_64_slb.S2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/powerpc/kvm/book3s_64_slb.S b/arch/powerpc/kvm/book3s_64_slb.S
index f2e6e48ea463..56b983e7b738 100644
--- a/arch/powerpc/kvm/book3s_64_slb.S
+++ b/arch/powerpc/kvm/book3s_64_slb.S
@@ -90,8 +90,6 @@ slb_exit_skip_ ## num:
90 or r10, r10, r12 90 or r10, r10, r12
91 slbie r10 91 slbie r10
92 92
93 isync
94
95 /* Fill SLB with our shadow */ 93 /* Fill SLB with our shadow */
96 94
97 lbz r12, SVCPU_SLB_MAX(r3) 95 lbz r12, SVCPU_SLB_MAX(r3)