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authorSamuel Ortiz <sameo@linux.intel.com>2013-04-08 10:36:52 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2013-04-08 10:36:52 -0400
commit7aa3d7c8d5ca941e70183b8a7c980beff6edf534 (patch)
tree1052bc9fce8bbbdc7fca47d814fce788f1c20440 /arch
parent8059c1c6be45973ea72342567a6ede5f4f0bf8e7 (diff)
parent55b175d7e6327939df82592ef279c534da323354 (diff)
Merge tag 'ux500-multiplatform-mfd' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson
MFD portions of the ux500 multiplatform branch. A second tag for the ARM SoC tree will build upon this one. This mainly removes the header file dependencies from the PRCMU driver in the MFD subsystem, and moves the PM functions to the machine. Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-ux500/Makefile2
-rw-r--r--arch/arm/mach-ux500/board-mop500.c58
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c2
-rw-r--r--arch/arm/mach-ux500/cpu.c21
-rw-r--r--arch/arm/mach-ux500/cpuidle.c3
-rw-r--r--arch/arm/mach-ux500/devices-db8500.c2
-rw-r--r--arch/arm/mach-ux500/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-ux500/include/mach/irqs-db8500.h25
-rw-r--r--arch/arm/mach-ux500/pm.c167
9 files changed, 185 insertions, 97 deletions
diff --git a/arch/arm/mach-ux500/Makefile b/arch/arm/mach-ux500/Makefile
index f24710dfc395..580a4db9e97d 100644
--- a/arch/arm/mach-ux500/Makefile
+++ b/arch/arm/mach-ux500/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5obj-y := cpu.o devices.o devices-common.o \ 5obj-y := cpu.o devices.o devices-common.o \
6 id.o usb.o timer.o 6 id.o usb.o timer.o pm.o
7obj-$(CONFIG_CPU_IDLE) += cpuidle.o 7obj-$(CONFIG_CPU_IDLE) += cpuidle.o
8obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o 8obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
9obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o 9obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index b03457881c4b..fe3d72cc341c 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -206,63 +206,6 @@ struct ab8500_platform_data ab8500_platdata = {
206 .codec = &ab8500_codec_pdata, 206 .codec = &ab8500_codec_pdata,
207}; 207};
208 208
209/*
210 * Thermal Sensor
211 */
212
213static struct resource db8500_thsens_resources[] = {
214 {
215 .name = "IRQ_HOTMON_LOW",
216 .start = IRQ_PRCMU_HOTMON_LOW,
217 .end = IRQ_PRCMU_HOTMON_LOW,
218 .flags = IORESOURCE_IRQ,
219 },
220 {
221 .name = "IRQ_HOTMON_HIGH",
222 .start = IRQ_PRCMU_HOTMON_HIGH,
223 .end = IRQ_PRCMU_HOTMON_HIGH,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static struct db8500_thsens_platform_data db8500_thsens_data = {
229 .trip_points[0] = {
230 .temp = 70000,
231 .type = THERMAL_TRIP_ACTIVE,
232 .cdev_name = {
233 [0] = "thermal-cpufreq-0",
234 },
235 },
236 .trip_points[1] = {
237 .temp = 75000,
238 .type = THERMAL_TRIP_ACTIVE,
239 .cdev_name = {
240 [0] = "thermal-cpufreq-0",
241 },
242 },
243 .trip_points[2] = {
244 .temp = 80000,
245 .type = THERMAL_TRIP_ACTIVE,
246 .cdev_name = {
247 [0] = "thermal-cpufreq-0",
248 },
249 },
250 .trip_points[3] = {
251 .temp = 85000,
252 .type = THERMAL_TRIP_CRITICAL,
253 },
254 .num_trips = 4,
255};
256
257static struct platform_device u8500_thsens_device = {
258 .name = "db8500-thermal",
259 .resource = db8500_thsens_resources,
260 .num_resources = ARRAY_SIZE(db8500_thsens_resources),
261 .dev = {
262 .platform_data = &db8500_thsens_data,
263 },
264};
265
266static struct platform_device u8500_cpufreq_cooling_device = { 209static struct platform_device u8500_cpufreq_cooling_device = {
267 .name = "db8500-cpufreq-cooling", 210 .name = "db8500-cpufreq-cooling",
268}; 211};
@@ -622,7 +565,6 @@ static struct platform_device *snowball_platform_devs[] __initdata = {
622 &snowball_key_dev, 565 &snowball_key_dev,
623 &snowball_sbnet_dev, 566 &snowball_sbnet_dev,
624 &snowball_gpio_en_3v3_regulator_dev, 567 &snowball_gpio_en_3v3_regulator_dev,
625 &u8500_thsens_device,
626 &u8500_cpufreq_cooling_device, 568 &u8500_cpufreq_cooling_device,
627}; 569};
628 570
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 19235cf7bbe3..8c58dffe52d5 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -94,8 +94,6 @@ void __init u8500_map_io(void)
94 iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc)); 94 iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
95 else 95 else
96 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc)); 96 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
97
98 _PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
99} 97}
100 98
101static struct resource db8500_pmu_resources[] = { 99static struct resource db8500_pmu_resources[] = {
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index 537870d3fea8..2c5c48baa3eb 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -8,7 +8,7 @@
8 8
9#include <linux/platform_device.h> 9#include <linux/platform_device.h>
10#include <linux/io.h> 10#include <linux/io.h>
11#include <linux/mfd/db8500-prcmu.h> 11#include <linux/mfd/dbx500-prcmu.h>
12#include <linux/clksrc-dbx500-prcmu.h> 12#include <linux/clksrc-dbx500-prcmu.h>
13#include <linux/sys_soc.h> 13#include <linux/sys_soc.h>
14#include <linux/err.h> 14#include <linux/err.h>
@@ -20,6 +20,7 @@
20#include <linux/irqchip.h> 20#include <linux/irqchip.h>
21#include <linux/irqchip/arm-gic.h> 21#include <linux/irqchip/arm-gic.h>
22#include <linux/platform_data/clk-ux500.h> 22#include <linux/platform_data/clk-ux500.h>
23#include <linux/platform_data/arm-ux500-pm.h>
23 24
24#include <asm/mach/map.h> 25#include <asm/mach/map.h>
25 26
@@ -30,8 +31,6 @@
30#include "board-mop500.h" 31#include "board-mop500.h"
31#include "id.h" 32#include "id.h"
32 33
33void __iomem *_PRCMU_BASE;
34
35/* 34/*
36 * FIXME: Should we set up the GPIO domain here? 35 * FIXME: Should we set up the GPIO domain here?
37 * 36 *
@@ -68,13 +67,19 @@ void __init ux500_init_irq(void)
68 * Init clocks here so that they are available for system timer 67 * Init clocks here so that they are available for system timer
69 * initialization. 68 * initialization.
70 */ 69 */
71 if (cpu_is_u8500_family() || cpu_is_u9540()) 70 if (cpu_is_u8500_family()) {
72 db8500_prcmu_early_init(); 71 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
73 72 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
74 if (cpu_is_u8500_family() || cpu_is_u9540())
75 u8500_clk_init(); 73 u8500_clk_init();
76 else if (cpu_is_u8540()) 74 } else if (cpu_is_u9540()) {
75 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
76 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
77 u8500_clk_init();
78 } else if (cpu_is_u8540()) {
79 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
80 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
77 u8540_clk_init(); 81 u8540_clk_init();
82 }
78} 83}
79 84
80void __init ux500_init_late(void) 85void __init ux500_init_late(void)
diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c
index ce9149302cc3..1e5bb6640f56 100644
--- a/arch/arm/mach-ux500/cpuidle.c
+++ b/arch/arm/mach-ux500/cpuidle.c
@@ -16,6 +16,7 @@
16#include <linux/atomic.h> 16#include <linux/atomic.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/mfd/dbx500-prcmu.h> 18#include <linux/mfd/dbx500-prcmu.h>
19#include <linux/platform_data/arm-ux500-pm.h>
19 20
20#include <asm/cpuidle.h> 21#include <asm/cpuidle.h>
21#include <asm/proc-fns.h> 22#include <asm/proc-fns.h>
@@ -130,7 +131,7 @@ int __init ux500_idle_init(void)
130 int ret, cpu; 131 int ret, cpu;
131 struct cpuidle_device *device; 132 struct cpuidle_device *device;
132 133
133 /* Configure wake up reasons */ 134 /* Configure wake up reasons */
134 prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) | 135 prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |
135 PRCMU_WAKEUP(ABB)); 136 PRCMU_WAKEUP(ABB));
136 137
diff --git a/arch/arm/mach-ux500/devices-db8500.c b/arch/arm/mach-ux500/devices-db8500.c
index f3d9419f75d3..df4d7de0fd9f 100644
--- a/arch/arm/mach-ux500/devices-db8500.c
+++ b/arch/arm/mach-ux500/devices-db8500.c
@@ -199,6 +199,8 @@ struct platform_device u8500_ske_keypad_device = {
199 199
200struct prcmu_pdata db8500_prcmu_pdata = { 200struct prcmu_pdata db8500_prcmu_pdata = {
201 .ab_platdata = &ab8500_platdata, 201 .ab_platdata = &ab8500_platdata,
202 .ab_irq = IRQ_DB8500_AB8500,
203 .irq_base = IRQ_PRCMU_BASE,
202 .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET, 204 .version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
203 .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET, 205 .legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
204}; 206};
diff --git a/arch/arm/mach-ux500/include/mach/hardware.h b/arch/arm/mach-ux500/include/mach/hardware.h
index 5201ddace503..4eece2af1898 100644
--- a/arch/arm/mach-ux500/include/mach/hardware.h
+++ b/arch/arm/mach-ux500/include/mach/hardware.h
@@ -39,8 +39,6 @@
39 39
40#ifndef __ASSEMBLY__ 40#ifndef __ASSEMBLY__
41 41
42extern void __iomem *_PRCMU_BASE;
43
44#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) 42#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
45 43
46#endif /* __ASSEMBLY__ */ 44#endif /* __ASSEMBLY__ */
diff --git a/arch/arm/mach-ux500/include/mach/irqs-db8500.h b/arch/arm/mach-ux500/include/mach/irqs-db8500.h
index 68bc14974608..f3a9d5947ef3 100644
--- a/arch/arm/mach-ux500/include/mach/irqs-db8500.h
+++ b/arch/arm/mach-ux500/include/mach/irqs-db8500.h
@@ -109,31 +109,6 @@
109 109
110/* Virtual interrupts corresponding to the PRCMU wakeups. */ 110/* Virtual interrupts corresponding to the PRCMU wakeups. */
111#define IRQ_PRCMU_BASE IRQ_SOC_START 111#define IRQ_PRCMU_BASE IRQ_SOC_START
112#define NUM_PRCMU_WAKEUPS (IRQ_PRCMU_END - IRQ_PRCMU_BASE)
113
114#define IRQ_PRCMU_RTC (IRQ_PRCMU_BASE)
115#define IRQ_PRCMU_RTT0 (IRQ_PRCMU_BASE + 1)
116#define IRQ_PRCMU_RTT1 (IRQ_PRCMU_BASE + 2)
117#define IRQ_PRCMU_HSI0 (IRQ_PRCMU_BASE + 3)
118#define IRQ_PRCMU_HSI1 (IRQ_PRCMU_BASE + 4)
119#define IRQ_PRCMU_CA_WAKE (IRQ_PRCMU_BASE + 5)
120#define IRQ_PRCMU_USB (IRQ_PRCMU_BASE + 6)
121#define IRQ_PRCMU_ABB (IRQ_PRCMU_BASE + 7)
122#define IRQ_PRCMU_ABB_FIFO (IRQ_PRCMU_BASE + 8)
123#define IRQ_PRCMU_ARM (IRQ_PRCMU_BASE + 9)
124#define IRQ_PRCMU_MODEM_SW_RESET_REQ (IRQ_PRCMU_BASE + 10)
125#define IRQ_PRCMU_GPIO0 (IRQ_PRCMU_BASE + 11)
126#define IRQ_PRCMU_GPIO1 (IRQ_PRCMU_BASE + 12)
127#define IRQ_PRCMU_GPIO2 (IRQ_PRCMU_BASE + 13)
128#define IRQ_PRCMU_GPIO3 (IRQ_PRCMU_BASE + 14)
129#define IRQ_PRCMU_GPIO4 (IRQ_PRCMU_BASE + 15)
130#define IRQ_PRCMU_GPIO5 (IRQ_PRCMU_BASE + 16)
131#define IRQ_PRCMU_GPIO6 (IRQ_PRCMU_BASE + 17)
132#define IRQ_PRCMU_GPIO7 (IRQ_PRCMU_BASE + 18)
133#define IRQ_PRCMU_GPIO8 (IRQ_PRCMU_BASE + 19)
134#define IRQ_PRCMU_CA_SLEEP (IRQ_PRCMU_BASE + 20)
135#define IRQ_PRCMU_HOTMON_LOW (IRQ_PRCMU_BASE + 21)
136#define IRQ_PRCMU_HOTMON_HIGH (IRQ_PRCMU_BASE + 22)
137#define IRQ_PRCMU_END (IRQ_PRCMU_BASE + 23) 112#define IRQ_PRCMU_END (IRQ_PRCMU_BASE + 23)
138 113
139/* 114/*
diff --git a/arch/arm/mach-ux500/pm.c b/arch/arm/mach-ux500/pm.c
new file mode 100644
index 000000000000..6949a1332f8f
--- /dev/null
+++ b/arch/arm/mach-ux500/pm.c
@@ -0,0 +1,167 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2010-2013
3 * Author: Rickard Andersson <rickard.andersson@stericsson.com> for
4 * ST-Ericsson.
5 * Author: Daniel Lezcano <daniel.lezcano@linaro.org> for Linaro.
6 * License terms: GNU General Public License (GPL) version 2
7 *
8 */
9
10#include <linux/kernel.h>
11#include <linux/irqchip/arm-gic.h>
12#include <linux/delay.h>
13#include <linux/io.h>
14#include <linux/platform_data/arm-ux500-pm.h>
15
16#include <mach/hardware.h>
17
18/* ARM WFI Standby signal register */
19#define PRCM_ARM_WFI_STANDBY (prcmu_base + 0x130)
20#define PRCM_ARM_WFI_STANDBY_WFI0 0x08
21#define PRCM_ARM_WFI_STANDBY_WFI1 0x10
22#define PRCM_IOCR (prcmu_base + 0x310)
23#define PRCM_IOCR_IOFORCE 0x1
24
25/* Dual A9 core interrupt management unit registers */
26#define PRCM_A9_MASK_REQ (prcmu_base + 0x328)
27#define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ 0x1
28
29#define PRCM_A9_MASK_ACK (prcmu_base + 0x32c)
30#define PRCM_ARMITMSK31TO0 (prcmu_base + 0x11c)
31#define PRCM_ARMITMSK63TO32 (prcmu_base + 0x120)
32#define PRCM_ARMITMSK95TO64 (prcmu_base + 0x124)
33#define PRCM_ARMITMSK127TO96 (prcmu_base + 0x128)
34#define PRCM_POWER_STATE_VAL (prcmu_base + 0x25C)
35#define PRCM_ARMITVAL31TO0 (prcmu_base + 0x260)
36#define PRCM_ARMITVAL63TO32 (prcmu_base + 0x264)
37#define PRCM_ARMITVAL95TO64 (prcmu_base + 0x268)
38#define PRCM_ARMITVAL127TO96 (prcmu_base + 0x26C)
39
40static void __iomem *prcmu_base;
41
42/* This function decouple the gic from the prcmu */
43int prcmu_gic_decouple(void)
44{
45 u32 val = readl(PRCM_A9_MASK_REQ);
46
47 /* Set bit 0 register value to 1 */
48 writel(val | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
49 PRCM_A9_MASK_REQ);
50
51 /* Make sure the register is updated */
52 readl(PRCM_A9_MASK_REQ);
53
54 /* Wait a few cycles for the gic mask completion */
55 udelay(1);
56
57 return 0;
58}
59
60/* This function recouple the gic with the prcmu */
61int prcmu_gic_recouple(void)
62{
63 u32 val = readl(PRCM_A9_MASK_REQ);
64
65 /* Set bit 0 register value to 0 */
66 writel(val & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, PRCM_A9_MASK_REQ);
67
68 return 0;
69}
70
71#define PRCMU_GIC_NUMBER_REGS 5
72
73/*
74 * This function checks if there are pending irq on the gic. It only
75 * makes sense if the gic has been decoupled before with the
76 * db8500_prcmu_gic_decouple function. Disabling an interrupt only
77 * disables the forwarding of the interrupt to any CPU interface. It
78 * does not prevent the interrupt from changing state, for example
79 * becoming pending, or active and pending if it is already
80 * active. Hence, we have to check the interrupt is pending *and* is
81 * active.
82 */
83bool prcmu_gic_pending_irq(void)
84{
85 u32 pr; /* Pending register */
86 u32 er; /* Enable register */
87 void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE);
88 int i;
89
90 /* 5 registers. STI & PPI not skipped */
91 for (i = 0; i < PRCMU_GIC_NUMBER_REGS; i++) {
92
93 pr = readl_relaxed(dist_base + GIC_DIST_PENDING_SET + i * 4);
94 er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
95
96 if (pr & er)
97 return true; /* There is a pending interrupt */
98 }
99
100 return false;
101}
102
103/*
104 * This function checks if there are pending interrupt on the
105 * prcmu which has been delegated to monitor the irqs with the
106 * db8500_prcmu_copy_gic_settings function.
107 */
108bool prcmu_pending_irq(void)
109{
110 u32 it, im;
111 int i;
112
113 for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) {
114 it = readl(PRCM_ARMITVAL31TO0 + i * 4);
115 im = readl(PRCM_ARMITMSK31TO0 + i * 4);
116 if (it & im)
117 return true; /* There is a pending interrupt */
118 }
119
120 return false;
121}
122
123/*
124 * This function checks if the specified cpu is in in WFI. It's usage
125 * makes sense only if the gic is decoupled with the db8500_prcmu_gic_decouple
126 * function. Of course passing smp_processor_id() to this function will
127 * always return false...
128 */
129bool prcmu_is_cpu_in_wfi(int cpu)
130{
131 return readl(PRCM_ARM_WFI_STANDBY) & cpu ? PRCM_ARM_WFI_STANDBY_WFI1 :
132 PRCM_ARM_WFI_STANDBY_WFI0;
133}
134
135/*
136 * This function copies the gic SPI settings to the prcmu in order to
137 * monitor them and abort/finish the retention/off sequence or state.
138 */
139int prcmu_copy_gic_settings(void)
140{
141 u32 er; /* Enable register */
142 void __iomem *dist_base = __io_address(U8500_GIC_DIST_BASE);
143 int i;
144
145 /* We skip the STI and PPI */
146 for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) {
147 er = readl_relaxed(dist_base +
148 GIC_DIST_ENABLE_SET + (i + 1) * 4);
149 writel(er, PRCM_ARMITMSK31TO0 + i * 4);
150 }
151
152 return 0;
153}
154
155void __init ux500_pm_init(u32 phy_base, u32 size)
156{
157 prcmu_base = ioremap(phy_base, size);
158 if (!prcmu_base) {
159 pr_err("could not remap PRCMU for PM functions\n");
160 return;
161 }
162 /*
163 * On watchdog reboot the GIC is in some cases decoupled.
164 * This will make sure that the GIC is correctly configured.
165 */
166 prcmu_gic_recouple();
167}