diff options
author | Ingo Molnar <mingo@elte.hu> | 2011-04-21 05:39:21 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2011-04-21 05:39:28 -0400 |
commit | 42ac9e87fdd89b77fa2ca0a5226023c1c2d83226 (patch) | |
tree | dfdb1b720347a40f24a89a3e9c2727ae26ad5f01 /arch | |
parent | 057f3fadb347e9c51b07e1b277bbdda79f976768 (diff) | |
parent | f0e615c3cb72b42191b558c130409335812621d8 (diff) |
Merge commit 'v2.6.39-rc4' into sched/core
Merge reason: Pick up upstream fixes.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
64 files changed, 310 insertions, 150 deletions
diff --git a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile index 9bb7b858ed23..7a6d908bb865 100644 --- a/arch/alpha/kernel/Makefile +++ b/arch/alpha/kernel/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | extra-y := head.o vmlinux.lds | 5 | extra-y := head.o vmlinux.lds |
6 | asflags-y := $(KBUILD_CFLAGS) | 6 | asflags-y := $(KBUILD_CFLAGS) |
7 | ccflags-y := -Werror -Wno-sign-compare | 7 | ccflags-y := -Wno-sign-compare |
8 | 8 | ||
9 | obj-y := entry.o traps.o process.o init_task.o osf_sys.o irq.o \ | 9 | obj-y := entry.o traps.o process.o init_task.o osf_sys.o irq.o \ |
10 | irq_alpha.o signal.o setup.o ptrace.o time.o \ | 10 | irq_alpha.o signal.o setup.o ptrace.o time.o \ |
diff --git a/arch/alpha/kernel/core_mcpcia.c b/arch/alpha/kernel/core_mcpcia.c index 381fec0af52e..da7bcc372f16 100644 --- a/arch/alpha/kernel/core_mcpcia.c +++ b/arch/alpha/kernel/core_mcpcia.c | |||
@@ -88,7 +88,7 @@ conf_read(unsigned long addr, unsigned char type1, | |||
88 | { | 88 | { |
89 | unsigned long flags; | 89 | unsigned long flags; |
90 | unsigned long mid = MCPCIA_HOSE2MID(hose->index); | 90 | unsigned long mid = MCPCIA_HOSE2MID(hose->index); |
91 | unsigned int stat0, value, temp, cpu; | 91 | unsigned int stat0, value, cpu; |
92 | 92 | ||
93 | cpu = smp_processor_id(); | 93 | cpu = smp_processor_id(); |
94 | 94 | ||
@@ -101,7 +101,7 @@ conf_read(unsigned long addr, unsigned char type1, | |||
101 | stat0 = *(vuip)MCPCIA_CAP_ERR(mid); | 101 | stat0 = *(vuip)MCPCIA_CAP_ERR(mid); |
102 | *(vuip)MCPCIA_CAP_ERR(mid) = stat0; | 102 | *(vuip)MCPCIA_CAP_ERR(mid) = stat0; |
103 | mb(); | 103 | mb(); |
104 | temp = *(vuip)MCPCIA_CAP_ERR(mid); | 104 | *(vuip)MCPCIA_CAP_ERR(mid); |
105 | DBG_CFG(("conf_read: MCPCIA_CAP_ERR(%d) was 0x%x\n", mid, stat0)); | 105 | DBG_CFG(("conf_read: MCPCIA_CAP_ERR(%d) was 0x%x\n", mid, stat0)); |
106 | 106 | ||
107 | mb(); | 107 | mb(); |
@@ -136,7 +136,7 @@ conf_write(unsigned long addr, unsigned int value, unsigned char type1, | |||
136 | { | 136 | { |
137 | unsigned long flags; | 137 | unsigned long flags; |
138 | unsigned long mid = MCPCIA_HOSE2MID(hose->index); | 138 | unsigned long mid = MCPCIA_HOSE2MID(hose->index); |
139 | unsigned int stat0, temp, cpu; | 139 | unsigned int stat0, cpu; |
140 | 140 | ||
141 | cpu = smp_processor_id(); | 141 | cpu = smp_processor_id(); |
142 | 142 | ||
@@ -145,7 +145,7 @@ conf_write(unsigned long addr, unsigned int value, unsigned char type1, | |||
145 | /* Reset status register to avoid losing errors. */ | 145 | /* Reset status register to avoid losing errors. */ |
146 | stat0 = *(vuip)MCPCIA_CAP_ERR(mid); | 146 | stat0 = *(vuip)MCPCIA_CAP_ERR(mid); |
147 | *(vuip)MCPCIA_CAP_ERR(mid) = stat0; mb(); | 147 | *(vuip)MCPCIA_CAP_ERR(mid) = stat0; mb(); |
148 | temp = *(vuip)MCPCIA_CAP_ERR(mid); | 148 | *(vuip)MCPCIA_CAP_ERR(mid); |
149 | DBG_CFG(("conf_write: MCPCIA CAP_ERR(%d) was 0x%x\n", mid, stat0)); | 149 | DBG_CFG(("conf_write: MCPCIA CAP_ERR(%d) was 0x%x\n", mid, stat0)); |
150 | 150 | ||
151 | draina(); | 151 | draina(); |
@@ -157,7 +157,7 @@ conf_write(unsigned long addr, unsigned int value, unsigned char type1, | |||
157 | *((vuip)addr) = value; | 157 | *((vuip)addr) = value; |
158 | mb(); | 158 | mb(); |
159 | mb(); /* magic */ | 159 | mb(); /* magic */ |
160 | temp = *(vuip)MCPCIA_CAP_ERR(mid); /* read to force the write */ | 160 | *(vuip)MCPCIA_CAP_ERR(mid); /* read to force the write */ |
161 | mcheck_expected(cpu) = 0; | 161 | mcheck_expected(cpu) = 0; |
162 | mb(); | 162 | mb(); |
163 | 163 | ||
@@ -572,12 +572,10 @@ mcpcia_print_system_area(unsigned long la_ptr) | |||
572 | void | 572 | void |
573 | mcpcia_machine_check(unsigned long vector, unsigned long la_ptr) | 573 | mcpcia_machine_check(unsigned long vector, unsigned long la_ptr) |
574 | { | 574 | { |
575 | struct el_common *mchk_header; | ||
576 | struct el_MCPCIA_uncorrected_frame_mcheck *mchk_logout; | 575 | struct el_MCPCIA_uncorrected_frame_mcheck *mchk_logout; |
577 | unsigned int cpu = smp_processor_id(); | 576 | unsigned int cpu = smp_processor_id(); |
578 | int expected; | 577 | int expected; |
579 | 578 | ||
580 | mchk_header = (struct el_common *)la_ptr; | ||
581 | mchk_logout = (struct el_MCPCIA_uncorrected_frame_mcheck *)la_ptr; | 579 | mchk_logout = (struct el_MCPCIA_uncorrected_frame_mcheck *)la_ptr; |
582 | expected = mcheck_expected(cpu); | 580 | expected = mcheck_expected(cpu); |
583 | 581 | ||
diff --git a/arch/alpha/kernel/err_titan.c b/arch/alpha/kernel/err_titan.c index c3b3781a03de..14b26c466c89 100644 --- a/arch/alpha/kernel/err_titan.c +++ b/arch/alpha/kernel/err_titan.c | |||
@@ -533,8 +533,6 @@ static struct el_subpacket_annotation el_titan_annotations[] = { | |||
533 | static struct el_subpacket * | 533 | static struct el_subpacket * |
534 | el_process_regatta_subpacket(struct el_subpacket *header) | 534 | el_process_regatta_subpacket(struct el_subpacket *header) |
535 | { | 535 | { |
536 | int status; | ||
537 | |||
538 | if (header->class != EL_CLASS__REGATTA_FAMILY) { | 536 | if (header->class != EL_CLASS__REGATTA_FAMILY) { |
539 | printk("%s ** Unexpected header CLASS %d TYPE %d, aborting\n", | 537 | printk("%s ** Unexpected header CLASS %d TYPE %d, aborting\n", |
540 | err_print_prefix, | 538 | err_print_prefix, |
@@ -551,7 +549,7 @@ el_process_regatta_subpacket(struct el_subpacket *header) | |||
551 | printk("%s ** Occurred on CPU %d:\n", | 549 | printk("%s ** Occurred on CPU %d:\n", |
552 | err_print_prefix, | 550 | err_print_prefix, |
553 | (int)header->by_type.regatta_frame.cpuid); | 551 | (int)header->by_type.regatta_frame.cpuid); |
554 | status = privateer_process_logout_frame((struct el_common *) | 552 | privateer_process_logout_frame((struct el_common *) |
555 | header->by_type.regatta_frame.data_start, 1); | 553 | header->by_type.regatta_frame.data_start, 1); |
556 | break; | 554 | break; |
557 | default: | 555 | default: |
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c index 1479dc6ebd97..51b7fbd9e4c1 100644 --- a/arch/alpha/kernel/irq_alpha.c +++ b/arch/alpha/kernel/irq_alpha.c | |||
@@ -228,7 +228,7 @@ struct irqaction timer_irqaction = { | |||
228 | void __init | 228 | void __init |
229 | init_rtc_irq(void) | 229 | init_rtc_irq(void) |
230 | { | 230 | { |
231 | irq_set_chip_and_handler_name(RTC_IRQ, &no_irq_chip, | 231 | irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip, |
232 | handle_simple_irq, "RTC"); | 232 | handle_simple_irq, "RTC"); |
233 | setup_irq(RTC_IRQ, &timer_irqaction); | 233 | setup_irq(RTC_IRQ, &timer_irqaction); |
234 | } | 234 | } |
diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c index d2634e4476b4..edbddcbd5bc6 100644 --- a/arch/alpha/kernel/setup.c +++ b/arch/alpha/kernel/setup.c | |||
@@ -1404,8 +1404,6 @@ determine_cpu_caches (unsigned int cpu_type) | |||
1404 | case PCA56_CPU: | 1404 | case PCA56_CPU: |
1405 | case PCA57_CPU: | 1405 | case PCA57_CPU: |
1406 | { | 1406 | { |
1407 | unsigned long cbox_config, size; | ||
1408 | |||
1409 | if (cpu_type == PCA56_CPU) { | 1407 | if (cpu_type == PCA56_CPU) { |
1410 | L1I = CSHAPE(16*1024, 6, 1); | 1408 | L1I = CSHAPE(16*1024, 6, 1); |
1411 | L1D = CSHAPE(8*1024, 5, 1); | 1409 | L1D = CSHAPE(8*1024, 5, 1); |
@@ -1415,10 +1413,12 @@ determine_cpu_caches (unsigned int cpu_type) | |||
1415 | } | 1413 | } |
1416 | L3 = -1; | 1414 | L3 = -1; |
1417 | 1415 | ||
1416 | #if 0 | ||
1417 | unsigned long cbox_config, size; | ||
1418 | |||
1418 | cbox_config = *(vulp) phys_to_virt (0xfffff00008UL); | 1419 | cbox_config = *(vulp) phys_to_virt (0xfffff00008UL); |
1419 | size = 512*1024 * (1 << ((cbox_config >> 12) & 3)); | 1420 | size = 512*1024 * (1 << ((cbox_config >> 12) & 3)); |
1420 | 1421 | ||
1421 | #if 0 | ||
1422 | L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1); | 1422 | L2 = ((cbox_config >> 31) & 1 ? CSHAPE (size, 6, 1) : -1); |
1423 | #else | 1423 | #else |
1424 | L2 = external_cache_probe(512*1024, 6); | 1424 | L2 = external_cache_probe(512*1024, 6); |
diff --git a/arch/alpha/kernel/smc37c93x.c b/arch/alpha/kernel/smc37c93x.c index 3e6a2893af9f..6886b834f487 100644 --- a/arch/alpha/kernel/smc37c93x.c +++ b/arch/alpha/kernel/smc37c93x.c | |||
@@ -79,7 +79,6 @@ | |||
79 | static unsigned long __init SMCConfigState(unsigned long baseAddr) | 79 | static unsigned long __init SMCConfigState(unsigned long baseAddr) |
80 | { | 80 | { |
81 | unsigned char devId; | 81 | unsigned char devId; |
82 | unsigned char devRev; | ||
83 | 82 | ||
84 | unsigned long configPort; | 83 | unsigned long configPort; |
85 | unsigned long indexPort; | 84 | unsigned long indexPort; |
@@ -100,7 +99,7 @@ static unsigned long __init SMCConfigState(unsigned long baseAddr) | |||
100 | devId = inb(dataPort); | 99 | devId = inb(dataPort); |
101 | if (devId == VALID_DEVICE_ID) { | 100 | if (devId == VALID_DEVICE_ID) { |
102 | outb(DEVICE_REV, indexPort); | 101 | outb(DEVICE_REV, indexPort); |
103 | devRev = inb(dataPort); | 102 | /* unsigned char devRev = */ inb(dataPort); |
104 | break; | 103 | break; |
105 | } | 104 | } |
106 | else | 105 | else |
diff --git a/arch/alpha/kernel/sys_wildfire.c b/arch/alpha/kernel/sys_wildfire.c index d3cb28bb8eb0..d92cdc715c65 100644 --- a/arch/alpha/kernel/sys_wildfire.c +++ b/arch/alpha/kernel/sys_wildfire.c | |||
@@ -156,7 +156,6 @@ static void __init | |||
156 | wildfire_init_irq_per_pca(int qbbno, int pcano) | 156 | wildfire_init_irq_per_pca(int qbbno, int pcano) |
157 | { | 157 | { |
158 | int i, irq_bias; | 158 | int i, irq_bias; |
159 | unsigned long io_bias; | ||
160 | static struct irqaction isa_enable = { | 159 | static struct irqaction isa_enable = { |
161 | .handler = no_action, | 160 | .handler = no_action, |
162 | .name = "isa_enable", | 161 | .name = "isa_enable", |
@@ -165,10 +164,12 @@ wildfire_init_irq_per_pca(int qbbno, int pcano) | |||
165 | irq_bias = qbbno * (WILDFIRE_PCA_PER_QBB * WILDFIRE_IRQ_PER_PCA) | 164 | irq_bias = qbbno * (WILDFIRE_PCA_PER_QBB * WILDFIRE_IRQ_PER_PCA) |
166 | + pcano * WILDFIRE_IRQ_PER_PCA; | 165 | + pcano * WILDFIRE_IRQ_PER_PCA; |
167 | 166 | ||
167 | #if 0 | ||
168 | unsigned long io_bias; | ||
169 | |||
168 | /* Only need the following for first PCI bus per PCA. */ | 170 | /* Only need the following for first PCI bus per PCA. */ |
169 | io_bias = WILDFIRE_IO(qbbno, pcano<<1) - WILDFIRE_IO_BIAS; | 171 | io_bias = WILDFIRE_IO(qbbno, pcano<<1) - WILDFIRE_IO_BIAS; |
170 | 172 | ||
171 | #if 0 | ||
172 | outb(0, DMA1_RESET_REG + io_bias); | 173 | outb(0, DMA1_RESET_REG + io_bias); |
173 | outb(0, DMA2_RESET_REG + io_bias); | 174 | outb(0, DMA2_RESET_REG + io_bias); |
174 | outb(DMA_MODE_CASCADE, DMA2_MODE_REG + io_bias); | 175 | outb(DMA_MODE_CASCADE, DMA2_MODE_REG + io_bias); |
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c index a58e84f1a63b..918e8e0b72ff 100644 --- a/arch/alpha/kernel/time.c +++ b/arch/alpha/kernel/time.c | |||
@@ -153,6 +153,7 @@ void read_persistent_clock(struct timespec *ts) | |||
153 | year += 100; | 153 | year += 100; |
154 | 154 | ||
155 | ts->tv_sec = mktime(year, mon, day, hour, min, sec); | 155 | ts->tv_sec = mktime(year, mon, day, hour, min, sec); |
156 | ts->tv_nsec = 0; | ||
156 | } | 157 | } |
157 | 158 | ||
158 | 159 | ||
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fdc9d4dbf85b..377a7a595b08 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -1540,7 +1540,6 @@ config HIGHMEM | |||
1540 | config HIGHPTE | 1540 | config HIGHPTE |
1541 | bool "Allocate 2nd-level pagetables from highmem" | 1541 | bool "Allocate 2nd-level pagetables from highmem" |
1542 | depends on HIGHMEM | 1542 | depends on HIGHMEM |
1543 | depends on !OUTER_CACHE | ||
1544 | 1543 | ||
1545 | config HW_PERF_EVENTS | 1544 | config HW_PERF_EVENTS |
1546 | bool "Enable hardware performance counter support for perf events" | 1545 | bool "Enable hardware performance counter support for perf events" |
@@ -2012,6 +2011,8 @@ source "kernel/power/Kconfig" | |||
2012 | 2011 | ||
2013 | config ARCH_SUSPEND_POSSIBLE | 2012 | config ARCH_SUSPEND_POSSIBLE |
2014 | depends on !ARCH_S5P64X0 && !ARCH_S5P6442 | 2013 | depends on !ARCH_S5P64X0 && !ARCH_S5P6442 |
2014 | depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \ | ||
2015 | CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE | ||
2015 | def_bool y | 2016 | def_bool y |
2016 | 2017 | ||
2017 | endmenu | 2018 | endmenu |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 494224a9b459..03d01d783e3b 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -63,17 +63,6 @@ config DEBUG_USER | |||
63 | 8 - SIGSEGV faults | 63 | 8 - SIGSEGV faults |
64 | 16 - SIGBUS faults | 64 | 16 - SIGBUS faults |
65 | 65 | ||
66 | config DEBUG_ERRORS | ||
67 | bool "Verbose kernel error messages" | ||
68 | depends on DEBUG_KERNEL | ||
69 | help | ||
70 | This option controls verbose debugging information which can be | ||
71 | printed when the kernel detects an internal error. This debugging | ||
72 | information is useful to kernel hackers when tracking down problems, | ||
73 | but mostly meaningless to other people. It's safe to say Y unless | ||
74 | you are concerned with the code size or don't want to see these | ||
75 | messages. | ||
76 | |||
77 | config DEBUG_STACK_USAGE | 66 | config DEBUG_STACK_USAGE |
78 | bool "Enable stack utilization instrumentation" | 67 | bool "Enable stack utilization instrumentation" |
79 | depends on DEBUG_KERNEL | 68 | depends on DEBUG_KERNEL |
diff --git a/arch/arm/common/Makefile b/arch/arm/common/Makefile index e7521bca2c35..6ea9b6f3607a 100644 --- a/arch/arm/common/Makefile +++ b/arch/arm/common/Makefile | |||
@@ -16,5 +16,4 @@ obj-$(CONFIG_SHARP_SCOOP) += scoop.o | |||
16 | obj-$(CONFIG_ARCH_IXP2000) += uengine.o | 16 | obj-$(CONFIG_ARCH_IXP2000) += uengine.o |
17 | obj-$(CONFIG_ARCH_IXP23XX) += uengine.o | 17 | obj-$(CONFIG_ARCH_IXP23XX) += uengine.o |
18 | obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o | 18 | obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o |
19 | obj-$(CONFIG_COMMON_CLKDEV) += clkdev.o | ||
20 | obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o | 19 | obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o |
diff --git a/arch/arm/include/asm/thread_notify.h b/arch/arm/include/asm/thread_notify.h index c4391ba20350..1dc980675894 100644 --- a/arch/arm/include/asm/thread_notify.h +++ b/arch/arm/include/asm/thread_notify.h | |||
@@ -43,6 +43,7 @@ static inline void thread_notify(unsigned long rc, struct thread_info *thread) | |||
43 | #define THREAD_NOTIFY_FLUSH 0 | 43 | #define THREAD_NOTIFY_FLUSH 0 |
44 | #define THREAD_NOTIFY_EXIT 1 | 44 | #define THREAD_NOTIFY_EXIT 1 |
45 | #define THREAD_NOTIFY_SWITCH 2 | 45 | #define THREAD_NOTIFY_SWITCH 2 |
46 | #define THREAD_NOTIFY_COPY 3 | ||
46 | 47 | ||
47 | #endif | 48 | #endif |
48 | #endif | 49 | #endif |
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 74554f1742d7..8d95446150a3 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
@@ -29,7 +29,7 @@ obj-$(CONFIG_MODULES) += armksyms.o module.o | |||
29 | obj-$(CONFIG_ARTHUR) += arthur.o | 29 | obj-$(CONFIG_ARTHUR) += arthur.o |
30 | obj-$(CONFIG_ISA_DMA) += dma-isa.o | 30 | obj-$(CONFIG_ISA_DMA) += dma-isa.o |
31 | obj-$(CONFIG_PCI) += bios32.o isa.o | 31 | obj-$(CONFIG_PCI) += bios32.o isa.o |
32 | obj-$(CONFIG_PM) += sleep.o | 32 | obj-$(CONFIG_PM_SLEEP) += sleep.o |
33 | obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o | 33 | obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o |
34 | obj-$(CONFIG_SMP) += smp.o smp_tlb.o | 34 | obj-$(CONFIG_SMP) += smp.o smp_tlb.o |
35 | obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o | 35 | obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o |
diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c index d4a0da1e48f4..9b05c6a0dcea 100644 --- a/arch/arm/kernel/elf.c +++ b/arch/arm/kernel/elf.c | |||
@@ -40,15 +40,22 @@ EXPORT_SYMBOL(elf_check_arch); | |||
40 | void elf_set_personality(const struct elf32_hdr *x) | 40 | void elf_set_personality(const struct elf32_hdr *x) |
41 | { | 41 | { |
42 | unsigned int eflags = x->e_flags; | 42 | unsigned int eflags = x->e_flags; |
43 | unsigned int personality = PER_LINUX_32BIT; | 43 | unsigned int personality = current->personality & ~PER_MASK; |
44 | |||
45 | /* | ||
46 | * We only support Linux ELF executables, so always set the | ||
47 | * personality to LINUX. | ||
48 | */ | ||
49 | personality |= PER_LINUX; | ||
44 | 50 | ||
45 | /* | 51 | /* |
46 | * APCS-26 is only valid for OABI executables | 52 | * APCS-26 is only valid for OABI executables |
47 | */ | 53 | */ |
48 | if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) { | 54 | if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN && |
49 | if (eflags & EF_ARM_APCS_26) | 55 | (eflags & EF_ARM_APCS_26)) |
50 | personality = PER_LINUX; | 56 | personality &= ~ADDR_LIMIT_32BIT; |
51 | } | 57 | else |
58 | personality |= ADDR_LIMIT_32BIT; | ||
52 | 59 | ||
53 | set_personality(personality); | 60 | set_personality(personality); |
54 | 61 | ||
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 8dbc126f7152..87acc25d7a3e 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c | |||
@@ -868,6 +868,13 @@ static void reset_ctrl_regs(void *info) | |||
868 | */ | 868 | */ |
869 | asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0)); | 869 | asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0)); |
870 | isb(); | 870 | isb(); |
871 | |||
872 | /* | ||
873 | * Clear any configured vector-catch events before | ||
874 | * enabling monitor mode. | ||
875 | */ | ||
876 | asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0)); | ||
877 | isb(); | ||
871 | } | 878 | } |
872 | 879 | ||
873 | if (enable_monitor_mode()) | 880 | if (enable_monitor_mode()) |
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 69cfee0fe00f..979da3947f42 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c | |||
@@ -221,7 +221,7 @@ again: | |||
221 | prev_raw_count &= armpmu->max_period; | 221 | prev_raw_count &= armpmu->max_period; |
222 | 222 | ||
223 | if (overflow) | 223 | if (overflow) |
224 | delta = armpmu->max_period - prev_raw_count + new_raw_count; | 224 | delta = armpmu->max_period - prev_raw_count + new_raw_count + 1; |
225 | else | 225 | else |
226 | delta = new_raw_count - prev_raw_count; | 226 | delta = new_raw_count - prev_raw_count; |
227 | 227 | ||
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 94bbedbed639..5e1e54197227 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -372,6 +372,8 @@ copy_thread(unsigned long clone_flags, unsigned long stack_start, | |||
372 | if (clone_flags & CLONE_SETTLS) | 372 | if (clone_flags & CLONE_SETTLS) |
373 | thread->tp_value = regs->ARM_r3; | 373 | thread->tp_value = regs->ARM_r3; |
374 | 374 | ||
375 | thread_notify(THREAD_NOTIFY_COPY, thread); | ||
376 | |||
375 | return 0; | 377 | return 0; |
376 | } | 378 | } |
377 | 379 | ||
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index f0000e188c8c..3b54ad19d489 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -410,8 +410,7 @@ static int bad_syscall(int n, struct pt_regs *regs) | |||
410 | struct thread_info *thread = current_thread_info(); | 410 | struct thread_info *thread = current_thread_info(); |
411 | siginfo_t info; | 411 | siginfo_t info; |
412 | 412 | ||
413 | if (current->personality != PER_LINUX && | 413 | if ((current->personality & PER_MASK) != PER_LINUX && |
414 | current->personality != PER_LINUX_32BIT && | ||
415 | thread->exec_domain->handler) { | 414 | thread->exec_domain->handler) { |
416 | thread->exec_domain->handler(n, regs); | 415 | thread->exec_domain->handler(n, regs); |
417 | return regs->ARM_r0; | 416 | return regs->ARM_r0; |
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h index ee8b02ed8011..7bfb827f3fe3 100644 --- a/arch/arm/mach-mmp/include/mach/gpio.h +++ b/arch/arm/mach-mmp/include/mach/gpio.h | |||
@@ -10,7 +10,7 @@ | |||
10 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | 10 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) |
11 | #define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x)))) | 11 | #define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x)))) |
12 | 12 | ||
13 | #define NR_BUILTIN_GPIO (192) | 13 | #define NR_BUILTIN_GPIO IRQ_GPIO_NUM |
14 | 14 | ||
15 | #define gpio_to_bank(gpio) ((gpio) >> 5) | 15 | #define gpio_to_bank(gpio) ((gpio) >> 5) |
16 | #define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) | 16 | #define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) |
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h index 4621067c7720..713be155a44d 100644 --- a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h +++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h | |||
@@ -8,6 +8,15 @@ | |||
8 | #define MFP_DRIVE_MEDIUM (0x2 << 13) | 8 | #define MFP_DRIVE_MEDIUM (0x2 << 13) |
9 | #define MFP_DRIVE_FAST (0x3 << 13) | 9 | #define MFP_DRIVE_FAST (0x3 << 13) |
10 | 10 | ||
11 | #undef MFP_CFG | ||
12 | #undef MFP_CFG_DRV | ||
13 | |||
14 | #define MFP_CFG(pin, af) \ | ||
15 | (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) | ||
16 | |||
17 | #define MFP_CFG_DRV(pin, af, drv) \ | ||
18 | (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv) | ||
19 | |||
11 | /* GPIO */ | 20 | /* GPIO */ |
12 | #define GPIO0_GPIO MFP_CFG(GPIO0, AF5) | 21 | #define GPIO0_GPIO MFP_CFG(GPIO0, AF5) |
13 | #define GPIO1_GPIO MFP_CFG(GPIO1, AF5) | 22 | #define GPIO1_GPIO MFP_CFG(GPIO1, AF5) |
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c index 7f568611547e..6a96911b0ad5 100644 --- a/arch/arm/mach-msm/board-qsd8x50.c +++ b/arch/arm/mach-msm/board-qsd8x50.c | |||
@@ -160,10 +160,7 @@ static struct msm_mmc_platform_data qsd8x50_sdc1_data = { | |||
160 | 160 | ||
161 | static void __init qsd8x50_init_mmc(void) | 161 | static void __init qsd8x50_init_mmc(void) |
162 | { | 162 | { |
163 | if (machine_is_qsd8x50_ffa() || machine_is_qsd8x50a_ffa()) | 163 | vreg_mmc = vreg_get(NULL, "gp5"); |
164 | vreg_mmc = vreg_get(NULL, "gp6"); | ||
165 | else | ||
166 | vreg_mmc = vreg_get(NULL, "gp5"); | ||
167 | 164 | ||
168 | if (IS_ERR(vreg_mmc)) { | 165 | if (IS_ERR(vreg_mmc)) { |
169 | pr_err("vreg get for vreg_mmc failed (%ld)\n", | 166 | pr_err("vreg get for vreg_mmc failed (%ld)\n", |
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 56f920c55b6a..38b95e949d13 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c | |||
@@ -269,7 +269,7 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt) | |||
269 | 269 | ||
270 | /* Use existing clock_event for cpu 0 */ | 270 | /* Use existing clock_event for cpu 0 */ |
271 | if (!smp_processor_id()) | 271 | if (!smp_processor_id()) |
272 | return; | 272 | return 0; |
273 | 273 | ||
274 | writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); | 274 | writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); |
275 | 275 | ||
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h index b024a8b37439..c4639502efca 100644 --- a/arch/arm/mach-pxa/include/mach/gpio.h +++ b/arch/arm/mach-pxa/include/mach/gpio.h | |||
@@ -99,11 +99,24 @@ | |||
99 | #define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) | 99 | #define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) |
100 | 100 | ||
101 | 101 | ||
102 | #define NR_BUILTIN_GPIO 128 | 102 | #define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM |
103 | 103 | ||
104 | #define gpio_to_bank(gpio) ((gpio) >> 5) | 104 | #define gpio_to_bank(gpio) ((gpio) >> 5) |
105 | #define gpio_to_irq(gpio) IRQ_GPIO(gpio) | 105 | #define gpio_to_irq(gpio) IRQ_GPIO(gpio) |
106 | #define irq_to_gpio(irq) IRQ_TO_GPIO(irq) | 106 | |
107 | static inline int irq_to_gpio(unsigned int irq) | ||
108 | { | ||
109 | int gpio; | ||
110 | |||
111 | if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1) | ||
112 | return irq - IRQ_GPIO0; | ||
113 | |||
114 | gpio = irq - PXA_GPIO_IRQ_BASE; | ||
115 | if (gpio >= 2 && gpio < NR_BUILTIN_GPIO) | ||
116 | return gpio; | ||
117 | |||
118 | return -1; | ||
119 | } | ||
107 | 120 | ||
108 | #ifdef CONFIG_CPU_PXA26x | 121 | #ifdef CONFIG_CPU_PXA26x |
109 | /* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, | 122 | /* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, |
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h index a4285fc00878..038402404e39 100644 --- a/arch/arm/mach-pxa/include/mach/irqs.h +++ b/arch/arm/mach-pxa/include/mach/irqs.h | |||
@@ -93,9 +93,6 @@ | |||
93 | #define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) | 93 | #define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) |
94 | #define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) | 94 | #define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) |
95 | 95 | ||
96 | #define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE) | ||
97 | #define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) | ||
98 | |||
99 | /* | 96 | /* |
100 | * The following interrupts are for board specific purposes. Since | 97 | * The following interrupts are for board specific purposes. Since |
101 | * the kernel can only run on one machine at a time, we can re-use | 98 | * the kernel can only run on one machine at a time, we can re-use |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 6bde5956358d..a4af8c52d7ee 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -285,7 +285,7 @@ static inline void pxa25x_init_pm(void) {} | |||
285 | 285 | ||
286 | static int pxa25x_set_wake(struct irq_data *d, unsigned int on) | 286 | static int pxa25x_set_wake(struct irq_data *d, unsigned int on) |
287 | { | 287 | { |
288 | int gpio = IRQ_TO_GPIO(d->irq); | 288 | int gpio = irq_to_gpio(d->irq); |
289 | uint32_t mask = 0; | 289 | uint32_t mask = 0; |
290 | 290 | ||
291 | if (gpio >= 0 && gpio < 85) | 291 | if (gpio >= 0 && gpio < 85) |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 1cb5d0f9723f..909756eaf4b7 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -345,7 +345,7 @@ static inline void pxa27x_init_pm(void) {} | |||
345 | */ | 345 | */ |
346 | static int pxa27x_set_wake(struct irq_data *d, unsigned int on) | 346 | static int pxa27x_set_wake(struct irq_data *d, unsigned int on) |
347 | { | 347 | { |
348 | int gpio = IRQ_TO_GPIO(d->irq); | 348 | int gpio = irq_to_gpio(d->irq); |
349 | uint32_t mask; | 349 | uint32_t mask; |
350 | 350 | ||
351 | if (gpio >= 0 && gpio < 128) | 351 | if (gpio >= 0 && gpio < 128) |
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 76a3f654220f..65a1aba6823d 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c | |||
@@ -257,7 +257,8 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
257 | void tegra_gpio_resume(void) | 257 | void tegra_gpio_resume(void) |
258 | { | 258 | { |
259 | unsigned long flags; | 259 | unsigned long flags; |
260 | int b, p, i; | 260 | int b; |
261 | int p; | ||
261 | 262 | ||
262 | local_irq_save(flags); | 263 | local_irq_save(flags); |
263 | 264 | ||
@@ -280,7 +281,8 @@ void tegra_gpio_resume(void) | |||
280 | void tegra_gpio_suspend(void) | 281 | void tegra_gpio_suspend(void) |
281 | { | 282 | { |
282 | unsigned long flags; | 283 | unsigned long flags; |
283 | int b, p, i; | 284 | int b; |
285 | int p; | ||
284 | 286 | ||
285 | local_irq_save(flags); | 287 | local_irq_save(flags); |
286 | for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) { | 288 | for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) { |
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 6d7c4eea4dcb..4459470c052d 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c | |||
@@ -1362,14 +1362,15 @@ static int tegra_clk_shared_bus_set_rate(struct clk *c, unsigned long rate) | |||
1362 | { | 1362 | { |
1363 | unsigned long flags; | 1363 | unsigned long flags; |
1364 | int ret; | 1364 | int ret; |
1365 | long new_rate = rate; | ||
1365 | 1366 | ||
1366 | rate = clk_round_rate(c->parent, rate); | 1367 | new_rate = clk_round_rate(c->parent, new_rate); |
1367 | if (rate < 0) | 1368 | if (new_rate < 0) |
1368 | return rate; | 1369 | return new_rate; |
1369 | 1370 | ||
1370 | spin_lock_irqsave(&c->parent->spinlock, flags); | 1371 | spin_lock_irqsave(&c->parent->spinlock, flags); |
1371 | 1372 | ||
1372 | c->u.shared_bus_user.rate = rate; | 1373 | c->u.shared_bus_user.rate = new_rate; |
1373 | ret = tegra_clk_shared_bus_update(c->parent); | 1374 | ret = tegra_clk_shared_bus_update(c->parent); |
1374 | 1375 | ||
1375 | spin_unlock_irqrestore(&c->parent->spinlock, flags); | 1376 | spin_unlock_irqrestore(&c->parent->spinlock, flags); |
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c index afe209e1e1f8..74be05f3e03a 100644 --- a/arch/arm/mm/mmap.c +++ b/arch/arm/mm/mmap.c | |||
@@ -7,6 +7,7 @@ | |||
7 | #include <linux/shm.h> | 7 | #include <linux/shm.h> |
8 | #include <linux/sched.h> | 8 | #include <linux/sched.h> |
9 | #include <linux/io.h> | 9 | #include <linux/io.h> |
10 | #include <linux/personality.h> | ||
10 | #include <linux/random.h> | 11 | #include <linux/random.h> |
11 | #include <asm/cputype.h> | 12 | #include <asm/cputype.h> |
12 | #include <asm/system.h> | 13 | #include <asm/system.h> |
@@ -82,7 +83,8 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr, | |||
82 | mm->cached_hole_size = 0; | 83 | mm->cached_hole_size = 0; |
83 | } | 84 | } |
84 | /* 8 bits of randomness in 20 address space bits */ | 85 | /* 8 bits of randomness in 20 address space bits */ |
85 | if (current->flags & PF_RANDOMIZE) | 86 | if ((current->flags & PF_RANDOMIZE) && |
87 | !(current->personality & ADDR_NO_RANDOMIZE)) | ||
86 | addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT; | 88 | addr += (get_random_int() % (1 << 8)) << PAGE_SHIFT; |
87 | 89 | ||
88 | full_search: | 90 | full_search: |
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index b46eb21f05c7..bf8a1d1cccb6 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
@@ -390,7 +390,7 @@ ENTRY(cpu_arm920_set_pte_ext) | |||
390 | /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ | 390 | /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ |
391 | .globl cpu_arm920_suspend_size | 391 | .globl cpu_arm920_suspend_size |
392 | .equ cpu_arm920_suspend_size, 4 * 3 | 392 | .equ cpu_arm920_suspend_size, 4 * 3 |
393 | #ifdef CONFIG_PM | 393 | #ifdef CONFIG_PM_SLEEP |
394 | ENTRY(cpu_arm920_do_suspend) | 394 | ENTRY(cpu_arm920_do_suspend) |
395 | stmfd sp!, {r4 - r7, lr} | 395 | stmfd sp!, {r4 - r7, lr} |
396 | mrc p15, 0, r4, c13, c0, 0 @ PID | 396 | mrc p15, 0, r4, c13, c0, 0 @ PID |
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 6a4bdb2c94a7..0ed85d930c09 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S | |||
@@ -404,7 +404,7 @@ ENTRY(cpu_arm926_set_pte_ext) | |||
404 | /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ | 404 | /* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ |
405 | .globl cpu_arm926_suspend_size | 405 | .globl cpu_arm926_suspend_size |
406 | .equ cpu_arm926_suspend_size, 4 * 3 | 406 | .equ cpu_arm926_suspend_size, 4 * 3 |
407 | #ifdef CONFIG_PM | 407 | #ifdef CONFIG_PM_SLEEP |
408 | ENTRY(cpu_arm926_do_suspend) | 408 | ENTRY(cpu_arm926_do_suspend) |
409 | stmfd sp!, {r4 - r7, lr} | 409 | stmfd sp!, {r4 - r7, lr} |
410 | mrc p15, 0, r4, c13, c0, 0 @ PID | 410 | mrc p15, 0, r4, c13, c0, 0 @ PID |
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S index 74483d1977fe..184a9c997e36 100644 --- a/arch/arm/mm/proc-sa1100.S +++ b/arch/arm/mm/proc-sa1100.S | |||
@@ -171,7 +171,7 @@ ENTRY(cpu_sa1100_set_pte_ext) | |||
171 | 171 | ||
172 | .globl cpu_sa1100_suspend_size | 172 | .globl cpu_sa1100_suspend_size |
173 | .equ cpu_sa1100_suspend_size, 4*4 | 173 | .equ cpu_sa1100_suspend_size, 4*4 |
174 | #ifdef CONFIG_PM | 174 | #ifdef CONFIG_PM_SLEEP |
175 | ENTRY(cpu_sa1100_do_suspend) | 175 | ENTRY(cpu_sa1100_do_suspend) |
176 | stmfd sp!, {r4 - r7, lr} | 176 | stmfd sp!, {r4 - r7, lr} |
177 | mrc p15, 0, r4, c3, c0, 0 @ domain ID | 177 | mrc p15, 0, r4, c3, c0, 0 @ domain ID |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index bfa0c9f611c5..7c99cb4c8e4f 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -124,7 +124,7 @@ ENTRY(cpu_v6_set_pte_ext) | |||
124 | /* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */ | 124 | /* Suspend/resume support: taken from arch/arm/mach-s3c64xx/sleep.S */ |
125 | .globl cpu_v6_suspend_size | 125 | .globl cpu_v6_suspend_size |
126 | .equ cpu_v6_suspend_size, 4 * 8 | 126 | .equ cpu_v6_suspend_size, 4 * 8 |
127 | #ifdef CONFIG_PM | 127 | #ifdef CONFIG_PM_SLEEP |
128 | ENTRY(cpu_v6_do_suspend) | 128 | ENTRY(cpu_v6_do_suspend) |
129 | stmfd sp!, {r4 - r11, lr} | 129 | stmfd sp!, {r4 - r11, lr} |
130 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID | 130 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index c35618e42f6f..babfba09c89f 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -211,7 +211,7 @@ cpu_v7_name: | |||
211 | /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ | 211 | /* Suspend/resume support: derived from arch/arm/mach-s5pv210/sleep.S */ |
212 | .globl cpu_v7_suspend_size | 212 | .globl cpu_v7_suspend_size |
213 | .equ cpu_v7_suspend_size, 4 * 8 | 213 | .equ cpu_v7_suspend_size, 4 * 8 |
214 | #ifdef CONFIG_PM | 214 | #ifdef CONFIG_PM_SLEEP |
215 | ENTRY(cpu_v7_do_suspend) | 215 | ENTRY(cpu_v7_do_suspend) |
216 | stmfd sp!, {r4 - r11, lr} | 216 | stmfd sp!, {r4 - r11, lr} |
217 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID | 217 | mrc p15, 0, r4, c13, c0, 0 @ FCSE/PID |
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 63d8b2044e84..596213699f37 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S | |||
@@ -417,7 +417,7 @@ ENTRY(cpu_xsc3_set_pte_ext) | |||
417 | 417 | ||
418 | .globl cpu_xsc3_suspend_size | 418 | .globl cpu_xsc3_suspend_size |
419 | .equ cpu_xsc3_suspend_size, 4 * 8 | 419 | .equ cpu_xsc3_suspend_size, 4 * 8 |
420 | #ifdef CONFIG_PM | 420 | #ifdef CONFIG_PM_SLEEP |
421 | ENTRY(cpu_xsc3_do_suspend) | 421 | ENTRY(cpu_xsc3_do_suspend) |
422 | stmfd sp!, {r4 - r10, lr} | 422 | stmfd sp!, {r4 - r10, lr} |
423 | mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode | 423 | mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode |
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 086038cd86ab..ce233bcbf506 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -518,7 +518,7 @@ ENTRY(cpu_xscale_set_pte_ext) | |||
518 | 518 | ||
519 | .globl cpu_xscale_suspend_size | 519 | .globl cpu_xscale_suspend_size |
520 | .equ cpu_xscale_suspend_size, 4 * 7 | 520 | .equ cpu_xscale_suspend_size, 4 * 7 |
521 | #ifdef CONFIG_PM | 521 | #ifdef CONFIG_PM_SLEEP |
522 | ENTRY(cpu_xscale_do_suspend) | 522 | ENTRY(cpu_xscale_do_suspend) |
523 | stmfd sp!, {r4 - r10, lr} | 523 | stmfd sp!, {r4 - r10, lr} |
524 | mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode | 524 | mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode |
diff --git a/arch/arm/plat-s5p/pm.c b/arch/arm/plat-s5p/pm.c index d592b6304b48..d15dc47b0e3d 100644 --- a/arch/arm/plat-s5p/pm.c +++ b/arch/arm/plat-s5p/pm.c | |||
@@ -19,17 +19,6 @@ | |||
19 | 19 | ||
20 | #define PFX "s5p pm: " | 20 | #define PFX "s5p pm: " |
21 | 21 | ||
22 | /* s3c_pm_check_resume_pin | ||
23 | * | ||
24 | * check to see if the pin is configured correctly for sleep mode, and | ||
25 | * make any necessary adjustments if it is not | ||
26 | */ | ||
27 | |||
28 | static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) | ||
29 | { | ||
30 | /* nothing here yet */ | ||
31 | } | ||
32 | |||
33 | /* s3c_pm_configure_extint | 22 | /* s3c_pm_configure_extint |
34 | * | 23 | * |
35 | * configure all external interrupt pins | 24 | * configure all external interrupt pins |
diff --git a/arch/arm/plat-samsung/pm-check.c b/arch/arm/plat-samsung/pm-check.c index e4baf76f374a..6b733fafe7cd 100644 --- a/arch/arm/plat-samsung/pm-check.c +++ b/arch/arm/plat-samsung/pm-check.c | |||
@@ -164,7 +164,6 @@ static inline int in_region(void *ptr, int size, void *what, size_t whatsz) | |||
164 | */ | 164 | */ |
165 | static u32 *s3c_pm_runcheck(struct resource *res, u32 *val) | 165 | static u32 *s3c_pm_runcheck(struct resource *res, u32 *val) |
166 | { | 166 | { |
167 | void *save_at = phys_to_virt(s3c_sleep_save_phys); | ||
168 | unsigned long addr; | 167 | unsigned long addr; |
169 | unsigned long left; | 168 | unsigned long left; |
170 | void *stkpage; | 169 | void *stkpage; |
@@ -192,11 +191,6 @@ static u32 *s3c_pm_runcheck(struct resource *res, u32 *val) | |||
192 | goto skip_check; | 191 | goto skip_check; |
193 | } | 192 | } |
194 | 193 | ||
195 | if (in_region(ptr, left, save_at, 32*4 )) { | ||
196 | S3C_PMDBG("skipping %08lx, has save block in\n", addr); | ||
197 | goto skip_check; | ||
198 | } | ||
199 | |||
200 | /* calculate and check the checksum */ | 194 | /* calculate and check the checksum */ |
201 | 195 | ||
202 | calc = crc32_le(~0, ptr, left); | 196 | calc = crc32_le(~0, ptr, left); |
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c index d5b58d31903c..5c0a440d6e16 100644 --- a/arch/arm/plat-samsung/pm.c +++ b/arch/arm/plat-samsung/pm.c | |||
@@ -214,8 +214,9 @@ void s3c_pm_do_restore_core(struct sleep_save *ptr, int count) | |||
214 | * | 214 | * |
215 | * print any IRQs asserted at resume time (ie, we woke from) | 215 | * print any IRQs asserted at resume time (ie, we woke from) |
216 | */ | 216 | */ |
217 | static void s3c_pm_show_resume_irqs(int start, unsigned long which, | 217 | static void __maybe_unused s3c_pm_show_resume_irqs(int start, |
218 | unsigned long mask) | 218 | unsigned long which, |
219 | unsigned long mask) | ||
219 | { | 220 | { |
220 | int i; | 221 | int i; |
221 | 222 | ||
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index bbf3da012afd..f74695075e64 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -78,6 +78,14 @@ static void vfp_thread_exit(struct thread_info *thread) | |||
78 | put_cpu(); | 78 | put_cpu(); |
79 | } | 79 | } |
80 | 80 | ||
81 | static void vfp_thread_copy(struct thread_info *thread) | ||
82 | { | ||
83 | struct thread_info *parent = current_thread_info(); | ||
84 | |||
85 | vfp_sync_hwstate(parent); | ||
86 | thread->vfpstate = parent->vfpstate; | ||
87 | } | ||
88 | |||
81 | /* | 89 | /* |
82 | * When this function is called with the following 'cmd's, the following | 90 | * When this function is called with the following 'cmd's, the following |
83 | * is true while this function is being run: | 91 | * is true while this function is being run: |
@@ -104,12 +112,17 @@ static void vfp_thread_exit(struct thread_info *thread) | |||
104 | static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) | 112 | static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) |
105 | { | 113 | { |
106 | struct thread_info *thread = v; | 114 | struct thread_info *thread = v; |
115 | u32 fpexc; | ||
116 | #ifdef CONFIG_SMP | ||
117 | unsigned int cpu; | ||
118 | #endif | ||
107 | 119 | ||
108 | if (likely(cmd == THREAD_NOTIFY_SWITCH)) { | 120 | switch (cmd) { |
109 | u32 fpexc = fmrx(FPEXC); | 121 | case THREAD_NOTIFY_SWITCH: |
122 | fpexc = fmrx(FPEXC); | ||
110 | 123 | ||
111 | #ifdef CONFIG_SMP | 124 | #ifdef CONFIG_SMP |
112 | unsigned int cpu = thread->cpu; | 125 | cpu = thread->cpu; |
113 | 126 | ||
114 | /* | 127 | /* |
115 | * On SMP, if VFP is enabled, save the old state in | 128 | * On SMP, if VFP is enabled, save the old state in |
@@ -134,13 +147,20 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) | |||
134 | * old state. | 147 | * old state. |
135 | */ | 148 | */ |
136 | fmxr(FPEXC, fpexc & ~FPEXC_EN); | 149 | fmxr(FPEXC, fpexc & ~FPEXC_EN); |
137 | return NOTIFY_DONE; | 150 | break; |
138 | } | ||
139 | 151 | ||
140 | if (cmd == THREAD_NOTIFY_FLUSH) | 152 | case THREAD_NOTIFY_FLUSH: |
141 | vfp_thread_flush(thread); | 153 | vfp_thread_flush(thread); |
142 | else | 154 | break; |
155 | |||
156 | case THREAD_NOTIFY_EXIT: | ||
143 | vfp_thread_exit(thread); | 157 | vfp_thread_exit(thread); |
158 | break; | ||
159 | |||
160 | case THREAD_NOTIFY_COPY: | ||
161 | vfp_thread_copy(thread); | ||
162 | break; | ||
163 | } | ||
144 | 164 | ||
145 | return NOTIFY_DONE; | 165 | return NOTIFY_DONE; |
146 | } | 166 | } |
diff --git a/arch/blackfin/include/asm/system.h b/arch/blackfin/include/asm/system.h index 19e2c7c3e63a..44bd0cced725 100644 --- a/arch/blackfin/include/asm/system.h +++ b/arch/blackfin/include/asm/system.h | |||
@@ -19,11 +19,11 @@ | |||
19 | * Force strict CPU ordering. | 19 | * Force strict CPU ordering. |
20 | */ | 20 | */ |
21 | #define nop() __asm__ __volatile__ ("nop;\n\t" : : ) | 21 | #define nop() __asm__ __volatile__ ("nop;\n\t" : : ) |
22 | #define mb() __asm__ __volatile__ ("" : : : "memory") | 22 | #define smp_mb() mb() |
23 | #define rmb() __asm__ __volatile__ ("" : : : "memory") | 23 | #define smp_rmb() rmb() |
24 | #define wmb() __asm__ __volatile__ ("" : : : "memory") | 24 | #define smp_wmb() wmb() |
25 | #define set_mb(var, value) do { (void) xchg(&var, value); } while (0) | 25 | #define set_mb(var, value) do { var = value; mb(); } while (0) |
26 | #define read_barrier_depends() do { } while(0) | 26 | #define smp_read_barrier_depends() read_barrier_depends() |
27 | 27 | ||
28 | #ifdef CONFIG_SMP | 28 | #ifdef CONFIG_SMP |
29 | asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value); | 29 | asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value); |
@@ -37,16 +37,16 @@ asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr, | |||
37 | unsigned long new, unsigned long old); | 37 | unsigned long new, unsigned long old); |
38 | 38 | ||
39 | #ifdef __ARCH_SYNC_CORE_DCACHE | 39 | #ifdef __ARCH_SYNC_CORE_DCACHE |
40 | # define smp_mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0) | 40 | /* Force Core data cache coherence */ |
41 | # define smp_rmb() do { barrier(); smp_check_barrier(); } while (0) | 41 | # define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0) |
42 | # define smp_wmb() do { barrier(); smp_mark_barrier(); } while (0) | 42 | # define rmb() do { barrier(); smp_check_barrier(); } while (0) |
43 | #define smp_read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0) | 43 | # define wmb() do { barrier(); smp_mark_barrier(); } while (0) |
44 | 44 | # define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0) | |
45 | #else | 45 | #else |
46 | # define smp_mb() barrier() | 46 | # define mb() barrier() |
47 | # define smp_rmb() barrier() | 47 | # define rmb() barrier() |
48 | # define smp_wmb() barrier() | 48 | # define wmb() barrier() |
49 | #define smp_read_barrier_depends() barrier() | 49 | # define read_barrier_depends() do { } while (0) |
50 | #endif | 50 | #endif |
51 | 51 | ||
52 | static inline unsigned long __xchg(unsigned long x, volatile void *ptr, | 52 | static inline unsigned long __xchg(unsigned long x, volatile void *ptr, |
@@ -99,10 +99,10 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, | |||
99 | 99 | ||
100 | #else /* !CONFIG_SMP */ | 100 | #else /* !CONFIG_SMP */ |
101 | 101 | ||
102 | #define smp_mb() barrier() | 102 | #define mb() barrier() |
103 | #define smp_rmb() barrier() | 103 | #define rmb() barrier() |
104 | #define smp_wmb() barrier() | 104 | #define wmb() barrier() |
105 | #define smp_read_barrier_depends() do { } while(0) | 105 | #define read_barrier_depends() do { } while (0) |
106 | 106 | ||
107 | struct __xchg_dummy { | 107 | struct __xchg_dummy { |
108 | unsigned long a[100]; | 108 | unsigned long a[100]; |
diff --git a/arch/blackfin/kernel/gptimers.c b/arch/blackfin/kernel/gptimers.c index cdbe075de1dc..8b81dc04488a 100644 --- a/arch/blackfin/kernel/gptimers.c +++ b/arch/blackfin/kernel/gptimers.c | |||
@@ -268,7 +268,7 @@ void disable_gptimers(uint16_t mask) | |||
268 | _disable_gptimers(mask); | 268 | _disable_gptimers(mask); |
269 | for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i) | 269 | for (i = 0; i < MAX_BLACKFIN_GPTIMERS; ++i) |
270 | if (mask & (1 << i)) | 270 | if (mask & (1 << i)) |
271 | group_regs[BFIN_TIMER_OCTET(i)]->status |= trun_mask[i]; | 271 | group_regs[BFIN_TIMER_OCTET(i)]->status = trun_mask[i]; |
272 | SSYNC(); | 272 | SSYNC(); |
273 | } | 273 | } |
274 | EXPORT_SYMBOL(disable_gptimers); | 274 | EXPORT_SYMBOL(disable_gptimers); |
diff --git a/arch/blackfin/kernel/time-ts.c b/arch/blackfin/kernel/time-ts.c index 8c9a43daf80f..cdb4beb6bc8f 100644 --- a/arch/blackfin/kernel/time-ts.c +++ b/arch/blackfin/kernel/time-ts.c | |||
@@ -206,8 +206,14 @@ irqreturn_t bfin_gptmr0_interrupt(int irq, void *dev_id) | |||
206 | { | 206 | { |
207 | struct clock_event_device *evt = dev_id; | 207 | struct clock_event_device *evt = dev_id; |
208 | smp_mb(); | 208 | smp_mb(); |
209 | evt->event_handler(evt); | 209 | /* |
210 | * We want to ACK before we handle so that we can handle smaller timer | ||
211 | * intervals. This way if the timer expires again while we're handling | ||
212 | * things, we're more likely to see that 2nd int rather than swallowing | ||
213 | * it by ACKing the int at the end of this handler. | ||
214 | */ | ||
210 | bfin_gptmr0_ack(); | 215 | bfin_gptmr0_ack(); |
216 | evt->event_handler(evt); | ||
211 | return IRQ_HANDLED; | 217 | return IRQ_HANDLED; |
212 | } | 218 | } |
213 | 219 | ||
diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index 326bb86f4d29..1fbd94c44457 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c | |||
@@ -109,10 +109,23 @@ static void ipi_flush_icache(void *info) | |||
109 | struct blackfin_flush_data *fdata = info; | 109 | struct blackfin_flush_data *fdata = info; |
110 | 110 | ||
111 | /* Invalidate the memory holding the bounds of the flushed region. */ | 111 | /* Invalidate the memory holding the bounds of the flushed region. */ |
112 | invalidate_dcache_range((unsigned long)fdata, | 112 | blackfin_dcache_invalidate_range((unsigned long)fdata, |
113 | (unsigned long)fdata + sizeof(*fdata)); | 113 | (unsigned long)fdata + sizeof(*fdata)); |
114 | |||
115 | /* Make sure all write buffers in the data side of the core | ||
116 | * are flushed before trying to invalidate the icache. This | ||
117 | * needs to be after the data flush and before the icache | ||
118 | * flush so that the SSYNC does the right thing in preventing | ||
119 | * the instruction prefetcher from hitting things in cached | ||
120 | * memory at the wrong time -- it runs much further ahead than | ||
121 | * the pipeline. | ||
122 | */ | ||
123 | SSYNC(); | ||
114 | 124 | ||
115 | flush_icache_range(fdata->start, fdata->end); | 125 | /* ipi_flaush_icache is invoked by generic flush_icache_range, |
126 | * so call blackfin arch icache flush directly here. | ||
127 | */ | ||
128 | blackfin_icache_flush_range(fdata->start, fdata->end); | ||
116 | } | 129 | } |
117 | 130 | ||
118 | static void ipi_call_function(unsigned int cpu, struct ipi_message *msg) | 131 | static void ipi_call_function(unsigned int cpu, struct ipi_message *msg) |
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index 851b3bf6e962..eccdefe70d4e 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig | |||
@@ -6,7 +6,6 @@ config MICROBLAZE | |||
6 | select HAVE_FUNCTION_GRAPH_TRACER | 6 | select HAVE_FUNCTION_GRAPH_TRACER |
7 | select HAVE_DYNAMIC_FTRACE | 7 | select HAVE_DYNAMIC_FTRACE |
8 | select HAVE_FTRACE_MCOUNT_RECORD | 8 | select HAVE_FTRACE_MCOUNT_RECORD |
9 | select USB_ARCH_HAS_EHCI | ||
10 | select ARCH_WANT_OPTIONAL_GPIOLIB | 9 | select ARCH_WANT_OPTIONAL_GPIOLIB |
11 | select HAVE_OPROFILE | 10 | select HAVE_OPROFILE |
12 | select HAVE_ARCH_KGDB | 11 | select HAVE_ARCH_KGDB |
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index b6ff882f695b..8f4d50b0adfa 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -209,7 +209,7 @@ config ARCH_HIBERNATION_POSSIBLE | |||
209 | config ARCH_SUSPEND_POSSIBLE | 209 | config ARCH_SUSPEND_POSSIBLE |
210 | def_bool y | 210 | def_bool y |
211 | depends on ADB_PMU || PPC_EFIKA || PPC_LITE5200 || PPC_83xx || \ | 211 | depends on ADB_PMU || PPC_EFIKA || PPC_LITE5200 || PPC_83xx || \ |
212 | PPC_85xx || PPC_86xx || PPC_PSERIES || 44x || 40x | 212 | (PPC_85xx && !SMP) || PPC_86xx || PPC_PSERIES || 44x || 40x |
213 | 213 | ||
214 | config PPC_DCR_NATIVE | 214 | config PPC_DCR_NATIVE |
215 | bool | 215 | bool |
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index be3cdf9134ce..1833d1a07e79 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h | |||
@@ -382,10 +382,12 @@ extern const char *powerpc_base_platform; | |||
382 | #define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ | 382 | #define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ |
383 | CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \ | 383 | CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \ |
384 | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) | 384 | CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE) |
385 | #define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ | 385 | #define CPU_FTRS_E500MC (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \ |
386 | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \ | ||
387 | CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \ | 386 | CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \ |
388 | CPU_FTR_DBELL) | 387 | CPU_FTR_DBELL) |
388 | #define CPU_FTRS_E5500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \ | ||
389 | CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \ | ||
390 | CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD) | ||
389 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) | 391 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) |
390 | 392 | ||
391 | /* 64-bit CPUs */ | 393 | /* 64-bit CPUs */ |
@@ -435,11 +437,15 @@ extern const char *powerpc_base_platform; | |||
435 | #define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2) | 437 | #define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2) |
436 | 438 | ||
437 | #ifdef __powerpc64__ | 439 | #ifdef __powerpc64__ |
440 | #ifdef CONFIG_PPC_BOOK3E | ||
441 | #define CPU_FTRS_POSSIBLE (CPU_FTRS_E5500) | ||
442 | #else | ||
438 | #define CPU_FTRS_POSSIBLE \ | 443 | #define CPU_FTRS_POSSIBLE \ |
439 | (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ | 444 | (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ |
440 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \ | 445 | CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \ |
441 | CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \ | 446 | CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \ |
442 | CPU_FTR_1T_SEGMENT | CPU_FTR_VSX) | 447 | CPU_FTR_1T_SEGMENT | CPU_FTR_VSX) |
448 | #endif | ||
443 | #else | 449 | #else |
444 | enum { | 450 | enum { |
445 | CPU_FTRS_POSSIBLE = | 451 | CPU_FTRS_POSSIBLE = |
@@ -473,16 +479,21 @@ enum { | |||
473 | #endif | 479 | #endif |
474 | #ifdef CONFIG_E500 | 480 | #ifdef CONFIG_E500 |
475 | CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC | | 481 | CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC | |
482 | CPU_FTRS_E5500 | | ||
476 | #endif | 483 | #endif |
477 | 0, | 484 | 0, |
478 | }; | 485 | }; |
479 | #endif /* __powerpc64__ */ | 486 | #endif /* __powerpc64__ */ |
480 | 487 | ||
481 | #ifdef __powerpc64__ | 488 | #ifdef __powerpc64__ |
489 | #ifdef CONFIG_PPC_BOOK3E | ||
490 | #define CPU_FTRS_ALWAYS (CPU_FTRS_E5500) | ||
491 | #else | ||
482 | #define CPU_FTRS_ALWAYS \ | 492 | #define CPU_FTRS_ALWAYS \ |
483 | (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ | 493 | (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ |
484 | CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \ | 494 | CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \ |
485 | CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE) | 495 | CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE) |
496 | #endif | ||
486 | #else | 497 | #else |
487 | enum { | 498 | enum { |
488 | CPU_FTRS_ALWAYS = | 499 | CPU_FTRS_ALWAYS = |
@@ -513,6 +524,7 @@ enum { | |||
513 | #endif | 524 | #endif |
514 | #ifdef CONFIG_E500 | 525 | #ifdef CONFIG_E500 |
515 | CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC & | 526 | CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC & |
527 | CPU_FTRS_E5500 & | ||
516 | #endif | 528 | #endif |
517 | CPU_FTRS_POSSIBLE, | 529 | CPU_FTRS_POSSIBLE, |
518 | }; | 530 | }; |
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h index 811f04ac3660..8d1569c29042 100644 --- a/arch/powerpc/include/asm/pte-common.h +++ b/arch/powerpc/include/asm/pte-common.h | |||
@@ -162,7 +162,7 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); | |||
162 | * on platforms where such control is possible. | 162 | * on platforms where such control is possible. |
163 | */ | 163 | */ |
164 | #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\ | 164 | #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\ |
165 | defined(CONFIG_KPROBES) | 165 | defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE) |
166 | #define PAGE_KERNEL_TEXT PAGE_KERNEL_X | 166 | #define PAGE_KERNEL_TEXT PAGE_KERNEL_X |
167 | #else | 167 | #else |
168 | #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX | 168 | #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index c9b68d07ac4f..b9602ee06deb 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -1973,7 +1973,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1973 | .pvr_mask = 0xffff0000, | 1973 | .pvr_mask = 0xffff0000, |
1974 | .pvr_value = 0x80240000, | 1974 | .pvr_value = 0x80240000, |
1975 | .cpu_name = "e5500", | 1975 | .cpu_name = "e5500", |
1976 | .cpu_features = CPU_FTRS_E500MC, | 1976 | .cpu_features = CPU_FTRS_E5500, |
1977 | .cpu_user_features = COMMON_USER_BOOKE, | 1977 | .cpu_user_features = COMMON_USER_BOOKE, |
1978 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | | 1978 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | |
1979 | MMU_FTR_USE_TLBILX, | 1979 | MMU_FTR_USE_TLBILX, |
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index 3d3d416339dd..5b5e1f002a8e 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c | |||
@@ -163,7 +163,7 @@ static void crash_kexec_prepare_cpus(int cpu) | |||
163 | } | 163 | } |
164 | 164 | ||
165 | /* wait for all the CPUs to hit real mode but timeout if they don't come in */ | 165 | /* wait for all the CPUs to hit real mode but timeout if they don't come in */ |
166 | #if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP) | 166 | #ifdef CONFIG_PPC_STD_MMU_64 |
167 | static void crash_kexec_wait_realmode(int cpu) | 167 | static void crash_kexec_wait_realmode(int cpu) |
168 | { | 168 | { |
169 | unsigned int msecs; | 169 | unsigned int msecs; |
@@ -188,9 +188,7 @@ static void crash_kexec_wait_realmode(int cpu) | |||
188 | } | 188 | } |
189 | mb(); | 189 | mb(); |
190 | } | 190 | } |
191 | #else | 191 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
192 | static inline void crash_kexec_wait_realmode(int cpu) {} | ||
193 | #endif | ||
194 | 192 | ||
195 | /* | 193 | /* |
196 | * This function will be called by secondary cpus or by kexec cpu | 194 | * This function will be called by secondary cpus or by kexec cpu |
@@ -235,7 +233,9 @@ void crash_kexec_secondary(struct pt_regs *regs) | |||
235 | crash_ipi_callback(regs); | 233 | crash_ipi_callback(regs); |
236 | } | 234 | } |
237 | 235 | ||
238 | #else | 236 | #else /* ! CONFIG_SMP */ |
237 | static inline void crash_kexec_wait_realmode(int cpu) {} | ||
238 | |||
239 | static void crash_kexec_prepare_cpus(int cpu) | 239 | static void crash_kexec_prepare_cpus(int cpu) |
240 | { | 240 | { |
241 | /* | 241 | /* |
@@ -255,7 +255,7 @@ void crash_kexec_secondary(struct pt_regs *regs) | |||
255 | { | 255 | { |
256 | cpus_in_sr = CPU_MASK_NONE; | 256 | cpus_in_sr = CPU_MASK_NONE; |
257 | } | 257 | } |
258 | #endif | 258 | #endif /* CONFIG_SMP */ |
259 | 259 | ||
260 | /* | 260 | /* |
261 | * Register a function to be called on shutdown. Only use this if you | 261 | * Register a function to be called on shutdown. Only use this if you |
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c index c834757bebc0..2b97b80d6d7d 100644 --- a/arch/powerpc/kernel/legacy_serial.c +++ b/arch/powerpc/kernel/legacy_serial.c | |||
@@ -330,9 +330,11 @@ void __init find_legacy_serial_ports(void) | |||
330 | if (!parent) | 330 | if (!parent) |
331 | continue; | 331 | continue; |
332 | if (of_match_node(legacy_serial_parents, parent) != NULL) { | 332 | if (of_match_node(legacy_serial_parents, parent) != NULL) { |
333 | index = add_legacy_soc_port(np, np); | 333 | if (of_device_is_available(np)) { |
334 | if (index >= 0 && np == stdout) | 334 | index = add_legacy_soc_port(np, np); |
335 | legacy_serial_console = index; | 335 | if (index >= 0 && np == stdout) |
336 | legacy_serial_console = index; | ||
337 | } | ||
336 | } | 338 | } |
337 | of_node_put(parent); | 339 | of_node_put(parent); |
338 | } | 340 | } |
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c index c4063b7f49a0..822f63008ae1 100644 --- a/arch/powerpc/kernel/perf_event.c +++ b/arch/powerpc/kernel/perf_event.c | |||
@@ -398,6 +398,25 @@ static int check_excludes(struct perf_event **ctrs, unsigned int cflags[], | |||
398 | return 0; | 398 | return 0; |
399 | } | 399 | } |
400 | 400 | ||
401 | static u64 check_and_compute_delta(u64 prev, u64 val) | ||
402 | { | ||
403 | u64 delta = (val - prev) & 0xfffffffful; | ||
404 | |||
405 | /* | ||
406 | * POWER7 can roll back counter values, if the new value is smaller | ||
407 | * than the previous value it will cause the delta and the counter to | ||
408 | * have bogus values unless we rolled a counter over. If a coutner is | ||
409 | * rolled back, it will be smaller, but within 256, which is the maximum | ||
410 | * number of events to rollback at once. If we dectect a rollback | ||
411 | * return 0. This can lead to a small lack of precision in the | ||
412 | * counters. | ||
413 | */ | ||
414 | if (prev > val && (prev - val) < 256) | ||
415 | delta = 0; | ||
416 | |||
417 | return delta; | ||
418 | } | ||
419 | |||
401 | static void power_pmu_read(struct perf_event *event) | 420 | static void power_pmu_read(struct perf_event *event) |
402 | { | 421 | { |
403 | s64 val, delta, prev; | 422 | s64 val, delta, prev; |
@@ -416,10 +435,11 @@ static void power_pmu_read(struct perf_event *event) | |||
416 | prev = local64_read(&event->hw.prev_count); | 435 | prev = local64_read(&event->hw.prev_count); |
417 | barrier(); | 436 | barrier(); |
418 | val = read_pmc(event->hw.idx); | 437 | val = read_pmc(event->hw.idx); |
438 | delta = check_and_compute_delta(prev, val); | ||
439 | if (!delta) | ||
440 | return; | ||
419 | } while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev); | 441 | } while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev); |
420 | 442 | ||
421 | /* The counters are only 32 bits wide */ | ||
422 | delta = (val - prev) & 0xfffffffful; | ||
423 | local64_add(delta, &event->count); | 443 | local64_add(delta, &event->count); |
424 | local64_sub(delta, &event->hw.period_left); | 444 | local64_sub(delta, &event->hw.period_left); |
425 | } | 445 | } |
@@ -449,8 +469,9 @@ static void freeze_limited_counters(struct cpu_hw_events *cpuhw, | |||
449 | val = (event->hw.idx == 5) ? pmc5 : pmc6; | 469 | val = (event->hw.idx == 5) ? pmc5 : pmc6; |
450 | prev = local64_read(&event->hw.prev_count); | 470 | prev = local64_read(&event->hw.prev_count); |
451 | event->hw.idx = 0; | 471 | event->hw.idx = 0; |
452 | delta = (val - prev) & 0xfffffffful; | 472 | delta = check_and_compute_delta(prev, val); |
453 | local64_add(delta, &event->count); | 473 | if (delta) |
474 | local64_add(delta, &event->count); | ||
454 | } | 475 | } |
455 | } | 476 | } |
456 | 477 | ||
@@ -458,14 +479,16 @@ static void thaw_limited_counters(struct cpu_hw_events *cpuhw, | |||
458 | unsigned long pmc5, unsigned long pmc6) | 479 | unsigned long pmc5, unsigned long pmc6) |
459 | { | 480 | { |
460 | struct perf_event *event; | 481 | struct perf_event *event; |
461 | u64 val; | 482 | u64 val, prev; |
462 | int i; | 483 | int i; |
463 | 484 | ||
464 | for (i = 0; i < cpuhw->n_limited; ++i) { | 485 | for (i = 0; i < cpuhw->n_limited; ++i) { |
465 | event = cpuhw->limited_counter[i]; | 486 | event = cpuhw->limited_counter[i]; |
466 | event->hw.idx = cpuhw->limited_hwidx[i]; | 487 | event->hw.idx = cpuhw->limited_hwidx[i]; |
467 | val = (event->hw.idx == 5) ? pmc5 : pmc6; | 488 | val = (event->hw.idx == 5) ? pmc5 : pmc6; |
468 | local64_set(&event->hw.prev_count, val); | 489 | prev = local64_read(&event->hw.prev_count); |
490 | if (check_and_compute_delta(prev, val)) | ||
491 | local64_set(&event->hw.prev_count, val); | ||
469 | perf_event_update_userpage(event); | 492 | perf_event_update_userpage(event); |
470 | } | 493 | } |
471 | } | 494 | } |
@@ -1197,7 +1220,7 @@ static void record_and_restart(struct perf_event *event, unsigned long val, | |||
1197 | 1220 | ||
1198 | /* we don't have to worry about interrupts here */ | 1221 | /* we don't have to worry about interrupts here */ |
1199 | prev = local64_read(&event->hw.prev_count); | 1222 | prev = local64_read(&event->hw.prev_count); |
1200 | delta = (val - prev) & 0xfffffffful; | 1223 | delta = check_and_compute_delta(prev, val); |
1201 | local64_add(delta, &event->count); | 1224 | local64_add(delta, &event->count); |
1202 | 1225 | ||
1203 | /* | 1226 | /* |
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 375480c56eb9..f33acfd872ad 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c | |||
@@ -229,6 +229,9 @@ static u64 scan_dispatch_log(u64 stop_tb) | |||
229 | u64 stolen = 0; | 229 | u64 stolen = 0; |
230 | u64 dtb; | 230 | u64 dtb; |
231 | 231 | ||
232 | if (!dtl) | ||
233 | return 0; | ||
234 | |||
232 | if (i == vpa->dtl_idx) | 235 | if (i == vpa->dtl_idx) |
233 | return 0; | 236 | return 0; |
234 | while (i < vpa->dtl_idx) { | 237 | while (i < vpa->dtl_idx) { |
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c index a830c5e80657..bc5f0dc6ae1e 100644 --- a/arch/powerpc/platforms/powermac/smp.c +++ b/arch/powerpc/platforms/powermac/smp.c | |||
@@ -842,6 +842,7 @@ static void __devinit smp_core99_setup_cpu(int cpu_nr) | |||
842 | mpic_setup_this_cpu(); | 842 | mpic_setup_this_cpu(); |
843 | } | 843 | } |
844 | 844 | ||
845 | #ifdef CONFIG_PPC64 | ||
845 | #ifdef CONFIG_HOTPLUG_CPU | 846 | #ifdef CONFIG_HOTPLUG_CPU |
846 | static int smp_core99_cpu_notify(struct notifier_block *self, | 847 | static int smp_core99_cpu_notify(struct notifier_block *self, |
847 | unsigned long action, void *hcpu) | 848 | unsigned long action, void *hcpu) |
@@ -879,7 +880,6 @@ static struct notifier_block __cpuinitdata smp_core99_cpu_nb = { | |||
879 | 880 | ||
880 | static void __init smp_core99_bringup_done(void) | 881 | static void __init smp_core99_bringup_done(void) |
881 | { | 882 | { |
882 | #ifdef CONFIG_PPC64 | ||
883 | extern void g5_phy_disable_cpu1(void); | 883 | extern void g5_phy_disable_cpu1(void); |
884 | 884 | ||
885 | /* Close i2c bus if it was used for tb sync */ | 885 | /* Close i2c bus if it was used for tb sync */ |
@@ -894,14 +894,14 @@ static void __init smp_core99_bringup_done(void) | |||
894 | set_cpu_present(1, false); | 894 | set_cpu_present(1, false); |
895 | g5_phy_disable_cpu1(); | 895 | g5_phy_disable_cpu1(); |
896 | } | 896 | } |
897 | #endif /* CONFIG_PPC64 */ | ||
898 | |||
899 | #ifdef CONFIG_HOTPLUG_CPU | 897 | #ifdef CONFIG_HOTPLUG_CPU |
900 | register_cpu_notifier(&smp_core99_cpu_nb); | 898 | register_cpu_notifier(&smp_core99_cpu_nb); |
901 | #endif | 899 | #endif |
900 | |||
902 | if (ppc_md.progress) | 901 | if (ppc_md.progress) |
903 | ppc_md.progress("smp_core99_bringup_done", 0x349); | 902 | ppc_md.progress("smp_core99_bringup_done", 0x349); |
904 | } | 903 | } |
904 | #endif /* CONFIG_PPC64 */ | ||
905 | 905 | ||
906 | #ifdef CONFIG_HOTPLUG_CPU | 906 | #ifdef CONFIG_HOTPLUG_CPU |
907 | 907 | ||
@@ -975,7 +975,9 @@ static void pmac_cpu_die(void) | |||
975 | struct smp_ops_t core99_smp_ops = { | 975 | struct smp_ops_t core99_smp_ops = { |
976 | .message_pass = smp_mpic_message_pass, | 976 | .message_pass = smp_mpic_message_pass, |
977 | .probe = smp_core99_probe, | 977 | .probe = smp_core99_probe, |
978 | #ifdef CONFIG_PPC64 | ||
978 | .bringup_done = smp_core99_bringup_done, | 979 | .bringup_done = smp_core99_bringup_done, |
980 | #endif | ||
979 | .kick_cpu = smp_core99_kick_cpu, | 981 | .kick_cpu = smp_core99_kick_cpu, |
980 | .setup_cpu = smp_core99_setup_cpu, | 982 | .setup_cpu = smp_core99_setup_cpu, |
981 | .give_timebase = smp_core99_give_timebase, | 983 | .give_timebase = smp_core99_give_timebase, |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 000724149089..6c42cfde8415 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -287,14 +287,22 @@ static int alloc_dispatch_logs(void) | |||
287 | int cpu, ret; | 287 | int cpu, ret; |
288 | struct paca_struct *pp; | 288 | struct paca_struct *pp; |
289 | struct dtl_entry *dtl; | 289 | struct dtl_entry *dtl; |
290 | struct kmem_cache *dtl_cache; | ||
290 | 291 | ||
291 | if (!firmware_has_feature(FW_FEATURE_SPLPAR)) | 292 | if (!firmware_has_feature(FW_FEATURE_SPLPAR)) |
292 | return 0; | 293 | return 0; |
293 | 294 | ||
295 | dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES, | ||
296 | DISPATCH_LOG_BYTES, 0, NULL); | ||
297 | if (!dtl_cache) { | ||
298 | pr_warn("Failed to create dispatch trace log buffer cache\n"); | ||
299 | pr_warn("Stolen time statistics will be unreliable\n"); | ||
300 | return 0; | ||
301 | } | ||
302 | |||
294 | for_each_possible_cpu(cpu) { | 303 | for_each_possible_cpu(cpu) { |
295 | pp = &paca[cpu]; | 304 | pp = &paca[cpu]; |
296 | dtl = kmalloc_node(DISPATCH_LOG_BYTES, GFP_KERNEL, | 305 | dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL); |
297 | cpu_to_node(cpu)); | ||
298 | if (!dtl) { | 306 | if (!dtl) { |
299 | pr_warn("Failed to allocate dispatch trace log for cpu %d\n", | 307 | pr_warn("Failed to allocate dispatch trace log for cpu %d\n", |
300 | cpu); | 308 | cpu); |
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index f8f7f28c6343..68ca9290df94 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -324,6 +324,11 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) | |||
324 | struct resource rsrc; | 324 | struct resource rsrc; |
325 | const int *bus_range; | 325 | const int *bus_range; |
326 | 326 | ||
327 | if (!of_device_is_available(dev)) { | ||
328 | pr_warning("%s: disabled\n", dev->full_name); | ||
329 | return -ENODEV; | ||
330 | } | ||
331 | |||
327 | pr_debug("Adding PCI host bridge %s\n", dev->full_name); | 332 | pr_debug("Adding PCI host bridge %s\n", dev->full_name); |
328 | 333 | ||
329 | /* Fetch host bridge registers address */ | 334 | /* Fetch host bridge registers address */ |
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 14232d57369c..49798532b477 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c | |||
@@ -1457,7 +1457,6 @@ int fsl_rio_setup(struct platform_device *dev) | |||
1457 | port->ops = ops; | 1457 | port->ops = ops; |
1458 | port->priv = priv; | 1458 | port->priv = priv; |
1459 | port->phys_efptr = 0x100; | 1459 | port->phys_efptr = 0x100; |
1460 | rio_register_mport(port); | ||
1461 | 1460 | ||
1462 | priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); | 1461 | priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1); |
1463 | rio_regs_win = priv->regs_win; | 1462 | rio_regs_win = priv->regs_win; |
@@ -1504,6 +1503,9 @@ int fsl_rio_setup(struct platform_device *dev) | |||
1504 | dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n", | 1503 | dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n", |
1505 | port->sys_size ? 65536 : 256); | 1504 | port->sys_size ? 65536 : 256); |
1506 | 1505 | ||
1506 | if (rio_register_mport(port)) | ||
1507 | goto err; | ||
1508 | |||
1507 | if (port->host_deviceid >= 0) | 1509 | if (port->host_deviceid >= 0) |
1508 | out_be32(priv->regs_win + RIO_GCCSR, RIO_PORT_GEN_HOST | | 1510 | out_be32(priv->regs_win + RIO_GCCSR, RIO_PORT_GEN_HOST | |
1509 | RIO_PORT_GEN_MASTER | RIO_PORT_GEN_DISCOVERED); | 1511 | RIO_PORT_GEN_MASTER | RIO_PORT_GEN_DISCOVERED); |
diff --git a/arch/um/Kconfig.x86 b/arch/um/Kconfig.x86 index 02fb017fed47..a9da516a5274 100644 --- a/arch/um/Kconfig.x86 +++ b/arch/um/Kconfig.x86 | |||
@@ -4,6 +4,10 @@ menu "UML-specific options" | |||
4 | 4 | ||
5 | menu "Host processor type and features" | 5 | menu "Host processor type and features" |
6 | 6 | ||
7 | config CMPXCHG_LOCAL | ||
8 | bool | ||
9 | default n | ||
10 | |||
7 | source "arch/x86/Kconfig.cpu" | 11 | source "arch/x86/Kconfig.cpu" |
8 | 12 | ||
9 | endmenu | 13 | endmenu |
diff --git a/arch/um/include/asm/bug.h b/arch/um/include/asm/bug.h new file mode 100644 index 000000000000..9e33b864c359 --- /dev/null +++ b/arch/um/include/asm/bug.h | |||
@@ -0,0 +1,6 @@ | |||
1 | #ifndef __UM_BUG_H | ||
2 | #define __UM_BUG_H | ||
3 | |||
4 | #include <asm-generic/bug.h> | ||
5 | |||
6 | #endif | ||
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index fd5a1f365c95..3cce71413d0b 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -96,11 +96,15 @@ | |||
96 | #define MSR_IA32_MC0_ADDR 0x00000402 | 96 | #define MSR_IA32_MC0_ADDR 0x00000402 |
97 | #define MSR_IA32_MC0_MISC 0x00000403 | 97 | #define MSR_IA32_MC0_MISC 0x00000403 |
98 | 98 | ||
99 | #define MSR_AMD64_MC0_MASK 0xc0010044 | ||
100 | |||
99 | #define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x)) | 101 | #define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x)) |
100 | #define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x)) | 102 | #define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x)) |
101 | #define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x)) | 103 | #define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x)) |
102 | #define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x)) | 104 | #define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x)) |
103 | 105 | ||
106 | #define MSR_AMD64_MCx_MASK(x) (MSR_AMD64_MC0_MASK + (x)) | ||
107 | |||
104 | /* These are consecutive and not in the normal 4er MCE bank block */ | 108 | /* These are consecutive and not in the normal 4er MCE bank block */ |
105 | #define MSR_IA32_MC0_CTL2 0x00000280 | 109 | #define MSR_IA32_MC0_CTL2 0x00000280 |
106 | #define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x)) | 110 | #define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x)) |
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 3ecece0217ef..3532d3bf8105 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c | |||
@@ -615,6 +615,25 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
615 | /* As a rule processors have APIC timer running in deep C states */ | 615 | /* As a rule processors have APIC timer running in deep C states */ |
616 | if (c->x86 >= 0xf && !cpu_has_amd_erratum(amd_erratum_400)) | 616 | if (c->x86 >= 0xf && !cpu_has_amd_erratum(amd_erratum_400)) |
617 | set_cpu_cap(c, X86_FEATURE_ARAT); | 617 | set_cpu_cap(c, X86_FEATURE_ARAT); |
618 | |||
619 | /* | ||
620 | * Disable GART TLB Walk Errors on Fam10h. We do this here | ||
621 | * because this is always needed when GART is enabled, even in a | ||
622 | * kernel which has no MCE support built in. | ||
623 | */ | ||
624 | if (c->x86 == 0x10) { | ||
625 | /* | ||
626 | * BIOS should disable GartTlbWlk Errors themself. If | ||
627 | * it doesn't do it here as suggested by the BKDG. | ||
628 | * | ||
629 | * Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=33012 | ||
630 | */ | ||
631 | u64 mask; | ||
632 | |||
633 | rdmsrl(MSR_AMD64_MCx_MASK(4), mask); | ||
634 | mask |= (1 << 10); | ||
635 | wrmsrl(MSR_AMD64_MCx_MASK(4), mask); | ||
636 | } | ||
618 | } | 637 | } |
619 | 638 | ||
620 | #ifdef CONFIG_X86_32 | 639 | #ifdef CONFIG_X86_32 |
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index c2871d3c71b6..8ed8908cc9f7 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c | |||
@@ -312,6 +312,26 @@ void __cpuinit smp_store_cpu_info(int id) | |||
312 | identify_secondary_cpu(c); | 312 | identify_secondary_cpu(c); |
313 | } | 313 | } |
314 | 314 | ||
315 | static void __cpuinit check_cpu_siblings_on_same_node(int cpu1, int cpu2) | ||
316 | { | ||
317 | int node1 = early_cpu_to_node(cpu1); | ||
318 | int node2 = early_cpu_to_node(cpu2); | ||
319 | |||
320 | /* | ||
321 | * Our CPU scheduler assumes all logical cpus in the same physical cpu | ||
322 | * share the same node. But, buggy ACPI or NUMA emulation might assign | ||
323 | * them to different node. Fix it. | ||
324 | */ | ||
325 | if (node1 != node2) { | ||
326 | pr_warning("CPU %d in node %d and CPU %d in node %d are in the same physical CPU. forcing same node %d\n", | ||
327 | cpu1, node1, cpu2, node2, node2); | ||
328 | |||
329 | numa_remove_cpu(cpu1); | ||
330 | numa_set_node(cpu1, node2); | ||
331 | numa_add_cpu(cpu1); | ||
332 | } | ||
333 | } | ||
334 | |||
315 | static void __cpuinit link_thread_siblings(int cpu1, int cpu2) | 335 | static void __cpuinit link_thread_siblings(int cpu1, int cpu2) |
316 | { | 336 | { |
317 | cpumask_set_cpu(cpu1, cpu_sibling_mask(cpu2)); | 337 | cpumask_set_cpu(cpu1, cpu_sibling_mask(cpu2)); |
@@ -320,6 +340,7 @@ static void __cpuinit link_thread_siblings(int cpu1, int cpu2) | |||
320 | cpumask_set_cpu(cpu2, cpu_core_mask(cpu1)); | 340 | cpumask_set_cpu(cpu2, cpu_core_mask(cpu1)); |
321 | cpumask_set_cpu(cpu1, cpu_llc_shared_mask(cpu2)); | 341 | cpumask_set_cpu(cpu1, cpu_llc_shared_mask(cpu2)); |
322 | cpumask_set_cpu(cpu2, cpu_llc_shared_mask(cpu1)); | 342 | cpumask_set_cpu(cpu2, cpu_llc_shared_mask(cpu1)); |
343 | check_cpu_siblings_on_same_node(cpu1, cpu2); | ||
323 | } | 344 | } |
324 | 345 | ||
325 | 346 | ||
@@ -361,10 +382,12 @@ void __cpuinit set_cpu_sibling_map(int cpu) | |||
361 | per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) { | 382 | per_cpu(cpu_llc_id, cpu) == per_cpu(cpu_llc_id, i)) { |
362 | cpumask_set_cpu(i, cpu_llc_shared_mask(cpu)); | 383 | cpumask_set_cpu(i, cpu_llc_shared_mask(cpu)); |
363 | cpumask_set_cpu(cpu, cpu_llc_shared_mask(i)); | 384 | cpumask_set_cpu(cpu, cpu_llc_shared_mask(i)); |
385 | check_cpu_siblings_on_same_node(cpu, i); | ||
364 | } | 386 | } |
365 | if (c->phys_proc_id == cpu_data(i).phys_proc_id) { | 387 | if (c->phys_proc_id == cpu_data(i).phys_proc_id) { |
366 | cpumask_set_cpu(i, cpu_core_mask(cpu)); | 388 | cpumask_set_cpu(i, cpu_core_mask(cpu)); |
367 | cpumask_set_cpu(cpu, cpu_core_mask(i)); | 389 | cpumask_set_cpu(cpu, cpu_core_mask(i)); |
390 | check_cpu_siblings_on_same_node(cpu, i); | ||
368 | /* | 391 | /* |
369 | * Does this new cpu bringup a new core? | 392 | * Does this new cpu bringup a new core? |
370 | */ | 393 | */ |
diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts index dc701ea58546..2d6d226f2b10 100644 --- a/arch/x86/platform/ce4100/falconfalls.dts +++ b/arch/x86/platform/ce4100/falconfalls.dts | |||
@@ -74,6 +74,7 @@ | |||
74 | compatible = "intel,ce4100-pci", "pci"; | 74 | compatible = "intel,ce4100-pci", "pci"; |
75 | device_type = "pci"; | 75 | device_type = "pci"; |
76 | bus-range = <1 1>; | 76 | bus-range = <1 1>; |
77 | reg = <0x0800 0x0 0x0 0x0 0x0>; | ||
77 | ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>; | 78 | ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>; |
78 | 79 | ||
79 | interrupt-parent = <&ioapic2>; | 80 | interrupt-parent = <&ioapic2>; |
@@ -412,6 +413,7 @@ | |||
412 | #address-cells = <2>; | 413 | #address-cells = <2>; |
413 | #size-cells = <1>; | 414 | #size-cells = <1>; |
414 | compatible = "isa"; | 415 | compatible = "isa"; |
416 | reg = <0xf800 0x0 0x0 0x0 0x0>; | ||
415 | ranges = <1 0 0 0 0 0x100>; | 417 | ranges = <1 0 0 0 0 0x100>; |
416 | 418 | ||
417 | rtc@70 { | 419 | rtc@70 { |
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c index 5c0207bf959b..275dbc19e2cf 100644 --- a/arch/x86/platform/mrst/mrst.c +++ b/arch/x86/platform/mrst/mrst.c | |||
@@ -97,11 +97,11 @@ static int __init sfi_parse_mtmr(struct sfi_table_header *table) | |||
97 | pentry->freq_hz, pentry->irq); | 97 | pentry->freq_hz, pentry->irq); |
98 | if (!pentry->irq) | 98 | if (!pentry->irq) |
99 | continue; | 99 | continue; |
100 | mp_irq.type = MP_IOAPIC; | 100 | mp_irq.type = MP_INTSRC; |
101 | mp_irq.irqtype = mp_INT; | 101 | mp_irq.irqtype = mp_INT; |
102 | /* triggering mode edge bit 2-3, active high polarity bit 0-1 */ | 102 | /* triggering mode edge bit 2-3, active high polarity bit 0-1 */ |
103 | mp_irq.irqflag = 5; | 103 | mp_irq.irqflag = 5; |
104 | mp_irq.srcbus = 0; | 104 | mp_irq.srcbus = MP_BUS_ISA; |
105 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ | 105 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ |
106 | mp_irq.dstapic = MP_APIC_ALL; | 106 | mp_irq.dstapic = MP_APIC_ALL; |
107 | mp_irq.dstirq = pentry->irq; | 107 | mp_irq.dstirq = pentry->irq; |
@@ -168,10 +168,10 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table) | |||
168 | for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) { | 168 | for (totallen = 0; totallen < sfi_mrtc_num; totallen++, pentry++) { |
169 | pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n", | 169 | pr_debug("RTC[%d]: paddr = 0x%08x, irq = %d\n", |
170 | totallen, (u32)pentry->phys_addr, pentry->irq); | 170 | totallen, (u32)pentry->phys_addr, pentry->irq); |
171 | mp_irq.type = MP_IOAPIC; | 171 | mp_irq.type = MP_INTSRC; |
172 | mp_irq.irqtype = mp_INT; | 172 | mp_irq.irqtype = mp_INT; |
173 | mp_irq.irqflag = 0xf; /* level trigger and active low */ | 173 | mp_irq.irqflag = 0xf; /* level trigger and active low */ |
174 | mp_irq.srcbus = 0; | 174 | mp_irq.srcbus = MP_BUS_ISA; |
175 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ | 175 | mp_irq.srcbusirq = pentry->irq; /* IRQ */ |
176 | mp_irq.dstapic = MP_APIC_ALL; | 176 | mp_irq.dstapic = MP_APIC_ALL; |
177 | mp_irq.dstirq = pentry->irq; | 177 | mp_irq.dstirq = pentry->irq; |
@@ -282,7 +282,7 @@ void __init x86_mrst_early_setup(void) | |||
282 | /* Avoid searching for BIOS MP tables */ | 282 | /* Avoid searching for BIOS MP tables */ |
283 | x86_init.mpparse.find_smp_config = x86_init_noop; | 283 | x86_init.mpparse.find_smp_config = x86_init_noop; |
284 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; | 284 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; |
285 | 285 | set_bit(MP_BUS_ISA, mp_bus_not_pci); | |
286 | } | 286 | } |
287 | 287 | ||
288 | /* | 288 | /* |