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authorShawn Guo <shawn.guo@freescale.com>2013-07-08 09:45:20 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:00:37 -0400
commit35660c67e39a91c860650601ff8ae09758344226 (patch)
tree15becc4dd487da10055c0826a08ed0e5d784000e /arch
parent51f93c2d8352a93e82b4934aab602e0826a50bef (diff)
ARM: imx: let L2 initialization be a common function
Move imx6q L2 initialization function imx6q_init_l2cache() into system.c, and rename it imx_init_l2cache(), so that other platforms other than imx6q can also use the function. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-imx/common.h6
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c37
-rw-r--r--arch/arm/mach-imx/system.c35
3 files changed, 41 insertions, 37 deletions
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index ee78847abf47..32c751df7565 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -159,6 +159,12 @@ extern int mx51_neon_fixup(void);
159static inline int mx51_neon_fixup(void) { return 0; } 159static inline int mx51_neon_fixup(void) { return 0; }
160#endif 160#endif
161 161
162#ifdef CONFIG_CACHE_L2X0
163extern void imx_init_l2cache(void);
164#else
165static inline void imx_init_l2cache(void) {}
166#endif
167
162extern struct smp_operations imx_smp_ops; 168extern struct smp_operations imx_smp_ops;
163 169
164#endif 170#endif
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 5ab972567ef6..f3c521f20b7d 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -31,7 +31,6 @@
31#include <linux/micrel_phy.h> 31#include <linux/micrel_phy.h>
32#include <linux/mfd/syscon.h> 32#include <linux/mfd/syscon.h>
33#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 33#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
34#include <asm/hardware/cache-l2x0.h>
35#include <asm/mach/arch.h> 34#include <asm/mach/arch.h>
36#include <asm/mach/map.h> 35#include <asm/mach/map.h>
37#include <asm/system_misc.h> 36#include <asm/system_misc.h>
@@ -257,44 +256,10 @@ static void __init imx6q_map_io(void)
257 imx_scu_map_io(); 256 imx_scu_map_io();
258} 257}
259 258
260#ifdef CONFIG_CACHE_L2X0
261static void __init imx6q_init_l2cache(void)
262{
263 void __iomem *l2x0_base;
264 struct device_node *np;
265 unsigned int val;
266
267 np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
268 if (!np)
269 goto out;
270
271 l2x0_base = of_iomap(np, 0);
272 if (!l2x0_base) {
273 of_node_put(np);
274 goto out;
275 }
276
277 /* Configure the L2 PREFETCH and POWER registers */
278 val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
279 val |= 0x70800000;
280 writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
281 val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
282 writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);
283
284 iounmap(l2x0_base);
285 of_node_put(np);
286
287out:
288 l2x0_of_init(0, ~0UL);
289}
290#else
291static inline void imx6q_init_l2cache(void) {}
292#endif
293
294static void __init imx6q_init_irq(void) 259static void __init imx6q_init_irq(void)
295{ 260{
296 imx6q_init_revision(); 261 imx6q_init_revision();
297 imx6q_init_l2cache(); 262 imx_init_l2cache();
298 imx_src_init(); 263 imx_src_init();
299 imx_gpc_init(); 264 imx_gpc_init();
300 irqchip_init(); 265 irqchip_init();
diff --git a/arch/arm/mach-imx/system.c b/arch/arm/mach-imx/system.c
index 7cdc79a9657c..6fbe5563c50f 100644
--- a/arch/arm/mach-imx/system.c
+++ b/arch/arm/mach-imx/system.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Copyright (C) 1999 ARM Limited 2 * Copyright (C) 1999 ARM Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd 3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. 4 * Copyright (C) 2006-2013 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de 5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
6 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com 6 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
7 * 7 *
@@ -27,6 +27,7 @@
27#include <asm/system_misc.h> 27#include <asm/system_misc.h>
28#include <asm/proc-fns.h> 28#include <asm/proc-fns.h>
29#include <asm/mach-types.h> 29#include <asm/mach-types.h>
30#include <asm/hardware/cache-l2x0.h>
30 31
31#include "common.h" 32#include "common.h"
32#include "hardware.h" 33#include "hardware.h"
@@ -95,3 +96,35 @@ void __init mxc_arch_reset_init_dt(void)
95 96
96 clk_prepare(wdog_clk); 97 clk_prepare(wdog_clk);
97} 98}
99
100#ifdef CONFIG_CACHE_L2X0
101static void __init imx_init_l2cache(void)
102{
103 void __iomem *l2x0_base;
104 struct device_node *np;
105 unsigned int val;
106
107 np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
108 if (!np)
109 goto out;
110
111 l2x0_base = of_iomap(np, 0);
112 if (!l2x0_base) {
113 of_node_put(np);
114 goto out;
115 }
116
117 /* Configure the L2 PREFETCH and POWER registers */
118 val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
119 val |= 0x70800000;
120 writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
121 val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
122 writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);
123
124 iounmap(l2x0_base);
125 of_node_put(np);
126
127out:
128 l2x0_of_init(0, ~0UL);
129}
130#endif