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authorNicolin Chen <b42378@freescale.com>2013-06-13 07:50:57 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:00:42 -0400
commit3013328d3a4c42e7db257a36ed1d78680f3f2532 (patch)
tree04411f4cdcb7dc8e0403b43120fce14b88639f8b /arch
parent27b523a36e0252b6806f5ffd61de4d86c518bb2d (diff)
ARM: dts: imx6qdl-sabresd: add clko1 iomux configuration
Commit 521b43d41cd41ac8763603a7b923703d5d368bc9 upstream. Setting GPIO_0 pad as clko1 clock output to provide MCLK for WM8962. Signed-off-by: Nicolin Chen <b42378@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 0b8bb5541a15..d8d68d08a6db 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -65,6 +65,7 @@
65 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 65 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
66 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 66 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
67 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 67 MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
68 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
68 >; 69 >;
69 }; 70 };
70 }; 71 };