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authorPaul Walmsley <paul@pwsan.com>2011-07-09 21:14:06 -0400
committerPaul Walmsley <paul@pwsan.com>2011-07-09 21:14:06 -0400
commit212738a4499d278254ed6fdb400e3b4be4cb1de2 (patch)
treecaa57aa80c343a20eaa7a5e32b7205132b561669 /arch
parentded11383fc14a7483cf30700ffc253caf37c9933 (diff)
omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays
Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and users of these arrays used the ARRAY_SIZE() macro to determine the length of the array. However, ARRAY_SIZE() only works when the array is in the same scope as the macro user. So far this hasn't been a problem. However, to reduce duplicated data, a subsequent patch will move common data to a separate, shared file. When this is done, ARRAY_SIZE() will no longer be usable. This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs arrays and uses a sentinel value (irq == -1) as the array terminator instead. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c30
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2420_data.c56
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2430_data.c72
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c92
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c127
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h8
6 files changed, 205 insertions, 180 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 77094d75367f..21e3eb8e83c1 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -679,6 +679,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
679} 679}
680 680
681/** 681/**
682 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
683 * @oh: struct omap_hwmod *oh
684 *
685 * Count and return the number of MPU IRQs associated with the hwmod
686 * @oh. Used to allocate struct resource data. Returns 0 if @oh is
687 * NULL.
688 */
689static int _count_mpu_irqs(struct omap_hwmod *oh)
690{
691 struct omap_hwmod_irq_info *ohii;
692 int i = 0;
693
694 if (!oh || !oh->mpu_irqs)
695 return 0;
696
697 do {
698 ohii = &oh->mpu_irqs[i++];
699 } while (ohii->irq != -1);
700
701 return i;
702}
703
704/**
682 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh 705 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
683 * @oh: struct omap_hwmod *oh 706 * @oh: struct omap_hwmod *oh
684 * 707 *
@@ -1964,7 +1987,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
1964{ 1987{
1965 int ret, i; 1988 int ret, i;
1966 1989
1967 ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; 1990 ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt;
1968 1991
1969 for (i = 0; i < oh->slaves_cnt; i++) 1992 for (i = 0; i < oh->slaves_cnt; i++)
1970 ret += _count_ocp_if_addr_spaces(oh->slaves[i]); 1993 ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
@@ -1984,12 +2007,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
1984 */ 2007 */
1985int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) 2008int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1986{ 2009{
1987 int i, j; 2010 int i, j, mpu_irqs_cnt;
1988 int r = 0; 2011 int r = 0;
1989 2012
1990 /* For each IRQ, DMA, memory area, fill in array.*/ 2013 /* For each IRQ, DMA, memory area, fill in array.*/
1991 2014
1992 for (i = 0; i < oh->mpu_irqs_cnt; i++) { 2015 mpu_irqs_cnt = _count_mpu_irqs(oh);
2016 for (i = 0; i < mpu_irqs_cnt; i++) {
1993 (res + r)->name = (oh->mpu_irqs + i)->name; 2017 (res + r)->name = (oh->mpu_irqs + i)->name;
1994 (res + r)->start = (oh->mpu_irqs + i)->irq; 2018 (res + r)->start = (oh->mpu_irqs + i)->irq;
1995 (res + r)->end = (oh->mpu_irqs + i)->irq; 2019 (res + r)->end = (oh->mpu_irqs + i)->irq;
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index 3ec625c40c1f..04730d33ba5c 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -296,6 +296,7 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = {
296static struct omap_hwmod omap2420_timer1_hwmod; 296static struct omap_hwmod omap2420_timer1_hwmod;
297static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { 297static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = {
298 { .irq = 37, }, 298 { .irq = 37, },
299 { .irq = -1 }
299}; 300};
300 301
301static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { 302static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = {
@@ -325,7 +326,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = {
325static struct omap_hwmod omap2420_timer1_hwmod = { 326static struct omap_hwmod omap2420_timer1_hwmod = {
326 .name = "timer1", 327 .name = "timer1",
327 .mpu_irqs = omap2420_timer1_mpu_irqs, 328 .mpu_irqs = omap2420_timer1_mpu_irqs,
328 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer1_mpu_irqs),
329 .main_clk = "gpt1_fck", 329 .main_clk = "gpt1_fck",
330 .prcm = { 330 .prcm = {
331 .omap2 = { 331 .omap2 = {
@@ -346,6 +346,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
346static struct omap_hwmod omap2420_timer2_hwmod; 346static struct omap_hwmod omap2420_timer2_hwmod;
347static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { 347static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = {
348 { .irq = 38, }, 348 { .irq = 38, },
349 { .irq = -1 }
349}; 350};
350 351
351 352
@@ -367,7 +368,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = {
367static struct omap_hwmod omap2420_timer2_hwmod = { 368static struct omap_hwmod omap2420_timer2_hwmod = {
368 .name = "timer2", 369 .name = "timer2",
369 .mpu_irqs = omap2420_timer2_mpu_irqs, 370 .mpu_irqs = omap2420_timer2_mpu_irqs,
370 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer2_mpu_irqs),
371 .main_clk = "gpt2_fck", 371 .main_clk = "gpt2_fck",
372 .prcm = { 372 .prcm = {
373 .omap2 = { 373 .omap2 = {
@@ -388,6 +388,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
388static struct omap_hwmod omap2420_timer3_hwmod; 388static struct omap_hwmod omap2420_timer3_hwmod;
389static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { 389static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = {
390 { .irq = 39, }, 390 { .irq = 39, },
391 { .irq = -1 }
391}; 392};
392 393
393/* l4_core -> timer3 */ 394/* l4_core -> timer3 */
@@ -408,7 +409,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = {
408static struct omap_hwmod omap2420_timer3_hwmod = { 409static struct omap_hwmod omap2420_timer3_hwmod = {
409 .name = "timer3", 410 .name = "timer3",
410 .mpu_irqs = omap2420_timer3_mpu_irqs, 411 .mpu_irqs = omap2420_timer3_mpu_irqs,
411 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer3_mpu_irqs),
412 .main_clk = "gpt3_fck", 412 .main_clk = "gpt3_fck",
413 .prcm = { 413 .prcm = {
414 .omap2 = { 414 .omap2 = {
@@ -429,6 +429,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
429static struct omap_hwmod omap2420_timer4_hwmod; 429static struct omap_hwmod omap2420_timer4_hwmod;
430static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { 430static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = {
431 { .irq = 40, }, 431 { .irq = 40, },
432 { .irq = -1 }
432}; 433};
433 434
434/* l4_core -> timer4 */ 435/* l4_core -> timer4 */
@@ -449,7 +450,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = {
449static struct omap_hwmod omap2420_timer4_hwmod = { 450static struct omap_hwmod omap2420_timer4_hwmod = {
450 .name = "timer4", 451 .name = "timer4",
451 .mpu_irqs = omap2420_timer4_mpu_irqs, 452 .mpu_irqs = omap2420_timer4_mpu_irqs,
452 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer4_mpu_irqs),
453 .main_clk = "gpt4_fck", 453 .main_clk = "gpt4_fck",
454 .prcm = { 454 .prcm = {
455 .omap2 = { 455 .omap2 = {
@@ -470,6 +470,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
470static struct omap_hwmod omap2420_timer5_hwmod; 470static struct omap_hwmod omap2420_timer5_hwmod;
471static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { 471static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = {
472 { .irq = 41, }, 472 { .irq = 41, },
473 { .irq = -1 }
473}; 474};
474 475
475/* l4_core -> timer5 */ 476/* l4_core -> timer5 */
@@ -490,7 +491,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = {
490static struct omap_hwmod omap2420_timer5_hwmod = { 491static struct omap_hwmod omap2420_timer5_hwmod = {
491 .name = "timer5", 492 .name = "timer5",
492 .mpu_irqs = omap2420_timer5_mpu_irqs, 493 .mpu_irqs = omap2420_timer5_mpu_irqs,
493 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer5_mpu_irqs),
494 .main_clk = "gpt5_fck", 494 .main_clk = "gpt5_fck",
495 .prcm = { 495 .prcm = {
496 .omap2 = { 496 .omap2 = {
@@ -512,6 +512,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
512static struct omap_hwmod omap2420_timer6_hwmod; 512static struct omap_hwmod omap2420_timer6_hwmod;
513static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { 513static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = {
514 { .irq = 42, }, 514 { .irq = 42, },
515 { .irq = -1 }
515}; 516};
516 517
517/* l4_core -> timer6 */ 518/* l4_core -> timer6 */
@@ -532,7 +533,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = {
532static struct omap_hwmod omap2420_timer6_hwmod = { 533static struct omap_hwmod omap2420_timer6_hwmod = {
533 .name = "timer6", 534 .name = "timer6",
534 .mpu_irqs = omap2420_timer6_mpu_irqs, 535 .mpu_irqs = omap2420_timer6_mpu_irqs,
535 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer6_mpu_irqs),
536 .main_clk = "gpt6_fck", 536 .main_clk = "gpt6_fck",
537 .prcm = { 537 .prcm = {
538 .omap2 = { 538 .omap2 = {
@@ -553,6 +553,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
553static struct omap_hwmod omap2420_timer7_hwmod; 553static struct omap_hwmod omap2420_timer7_hwmod;
554static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { 554static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = {
555 { .irq = 43, }, 555 { .irq = 43, },
556 { .irq = -1 }
556}; 557};
557 558
558/* l4_core -> timer7 */ 559/* l4_core -> timer7 */
@@ -573,7 +574,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = {
573static struct omap_hwmod omap2420_timer7_hwmod = { 574static struct omap_hwmod omap2420_timer7_hwmod = {
574 .name = "timer7", 575 .name = "timer7",
575 .mpu_irqs = omap2420_timer7_mpu_irqs, 576 .mpu_irqs = omap2420_timer7_mpu_irqs,
576 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer7_mpu_irqs),
577 .main_clk = "gpt7_fck", 577 .main_clk = "gpt7_fck",
578 .prcm = { 578 .prcm = {
579 .omap2 = { 579 .omap2 = {
@@ -594,6 +594,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
594static struct omap_hwmod omap2420_timer8_hwmod; 594static struct omap_hwmod omap2420_timer8_hwmod;
595static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { 595static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = {
596 { .irq = 44, }, 596 { .irq = 44, },
597 { .irq = -1 }
597}; 598};
598 599
599/* l4_core -> timer8 */ 600/* l4_core -> timer8 */
@@ -614,7 +615,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = {
614static struct omap_hwmod omap2420_timer8_hwmod = { 615static struct omap_hwmod omap2420_timer8_hwmod = {
615 .name = "timer8", 616 .name = "timer8",
616 .mpu_irqs = omap2420_timer8_mpu_irqs, 617 .mpu_irqs = omap2420_timer8_mpu_irqs,
617 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer8_mpu_irqs),
618 .main_clk = "gpt8_fck", 618 .main_clk = "gpt8_fck",
619 .prcm = { 619 .prcm = {
620 .omap2 = { 620 .omap2 = {
@@ -635,6 +635,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
635static struct omap_hwmod omap2420_timer9_hwmod; 635static struct omap_hwmod omap2420_timer9_hwmod;
636static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { 636static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = {
637 { .irq = 45, }, 637 { .irq = 45, },
638 { .irq = -1 }
638}; 639};
639 640
640/* l4_core -> timer9 */ 641/* l4_core -> timer9 */
@@ -655,7 +656,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = {
655static struct omap_hwmod omap2420_timer9_hwmod = { 656static struct omap_hwmod omap2420_timer9_hwmod = {
656 .name = "timer9", 657 .name = "timer9",
657 .mpu_irqs = omap2420_timer9_mpu_irqs, 658 .mpu_irqs = omap2420_timer9_mpu_irqs,
658 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer9_mpu_irqs),
659 .main_clk = "gpt9_fck", 659 .main_clk = "gpt9_fck",
660 .prcm = { 660 .prcm = {
661 .omap2 = { 661 .omap2 = {
@@ -676,6 +676,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
676static struct omap_hwmod omap2420_timer10_hwmod; 676static struct omap_hwmod omap2420_timer10_hwmod;
677static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { 677static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = {
678 { .irq = 46, }, 678 { .irq = 46, },
679 { .irq = -1 }
679}; 680};
680 681
681/* l4_core -> timer10 */ 682/* l4_core -> timer10 */
@@ -696,7 +697,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = {
696static struct omap_hwmod omap2420_timer10_hwmod = { 697static struct omap_hwmod omap2420_timer10_hwmod = {
697 .name = "timer10", 698 .name = "timer10",
698 .mpu_irqs = omap2420_timer10_mpu_irqs, 699 .mpu_irqs = omap2420_timer10_mpu_irqs,
699 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer10_mpu_irqs),
700 .main_clk = "gpt10_fck", 700 .main_clk = "gpt10_fck",
701 .prcm = { 701 .prcm = {
702 .omap2 = { 702 .omap2 = {
@@ -717,6 +717,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = {
717static struct omap_hwmod omap2420_timer11_hwmod; 717static struct omap_hwmod omap2420_timer11_hwmod;
718static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { 718static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = {
719 { .irq = 47, }, 719 { .irq = 47, },
720 { .irq = -1 }
720}; 721};
721 722
722/* l4_core -> timer11 */ 723/* l4_core -> timer11 */
@@ -737,7 +738,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = {
737static struct omap_hwmod omap2420_timer11_hwmod = { 738static struct omap_hwmod omap2420_timer11_hwmod = {
738 .name = "timer11", 739 .name = "timer11",
739 .mpu_irqs = omap2420_timer11_mpu_irqs, 740 .mpu_irqs = omap2420_timer11_mpu_irqs,
740 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer11_mpu_irqs),
741 .main_clk = "gpt11_fck", 741 .main_clk = "gpt11_fck",
742 .prcm = { 742 .prcm = {
743 .omap2 = { 743 .omap2 = {
@@ -758,6 +758,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = {
758static struct omap_hwmod omap2420_timer12_hwmod; 758static struct omap_hwmod omap2420_timer12_hwmod;
759static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { 759static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = {
760 { .irq = 48, }, 760 { .irq = 48, },
761 { .irq = -1 }
761}; 762};
762 763
763/* l4_core -> timer12 */ 764/* l4_core -> timer12 */
@@ -778,7 +779,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = {
778static struct omap_hwmod omap2420_timer12_hwmod = { 779static struct omap_hwmod omap2420_timer12_hwmod = {
779 .name = "timer12", 780 .name = "timer12",
780 .mpu_irqs = omap2420_timer12_mpu_irqs, 781 .mpu_irqs = omap2420_timer12_mpu_irqs,
781 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer12_mpu_irqs),
782 .main_clk = "gpt12_fck", 782 .main_clk = "gpt12_fck",
783 .prcm = { 783 .prcm = {
784 .omap2 = { 784 .omap2 = {
@@ -879,6 +879,7 @@ static struct omap_hwmod_class uart_class = {
879 879
880static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { 880static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
881 { .irq = INT_24XX_UART1_IRQ, }, 881 { .irq = INT_24XX_UART1_IRQ, },
882 { .irq = -1 }
882}; 883};
883 884
884static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 885static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
@@ -893,7 +894,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
893static struct omap_hwmod omap2420_uart1_hwmod = { 894static struct omap_hwmod omap2420_uart1_hwmod = {
894 .name = "uart1", 895 .name = "uart1",
895 .mpu_irqs = uart1_mpu_irqs, 896 .mpu_irqs = uart1_mpu_irqs,
896 .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
897 .sdma_reqs = uart1_sdma_reqs, 897 .sdma_reqs = uart1_sdma_reqs,
898 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), 898 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
899 .main_clk = "uart1_fck", 899 .main_clk = "uart1_fck",
@@ -916,6 +916,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
916 916
917static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { 917static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
918 { .irq = INT_24XX_UART2_IRQ, }, 918 { .irq = INT_24XX_UART2_IRQ, },
919 { .irq = -1 }
919}; 920};
920 921
921static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 922static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
@@ -930,7 +931,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
930static struct omap_hwmod omap2420_uart2_hwmod = { 931static struct omap_hwmod omap2420_uart2_hwmod = {
931 .name = "uart2", 932 .name = "uart2",
932 .mpu_irqs = uart2_mpu_irqs, 933 .mpu_irqs = uart2_mpu_irqs,
933 .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
934 .sdma_reqs = uart2_sdma_reqs, 934 .sdma_reqs = uart2_sdma_reqs,
935 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), 935 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
936 .main_clk = "uart2_fck", 936 .main_clk = "uart2_fck",
@@ -953,6 +953,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
953 953
954static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { 954static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
955 { .irq = INT_24XX_UART3_IRQ, }, 955 { .irq = INT_24XX_UART3_IRQ, },
956 { .irq = -1 }
956}; 957};
957 958
958static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 959static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
@@ -967,7 +968,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
967static struct omap_hwmod omap2420_uart3_hwmod = { 968static struct omap_hwmod omap2420_uart3_hwmod = {
968 .name = "uart3", 969 .name = "uart3",
969 .mpu_irqs = uart3_mpu_irqs, 970 .mpu_irqs = uart3_mpu_irqs,
970 .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
971 .sdma_reqs = uart3_sdma_reqs, 971 .sdma_reqs = uart3_sdma_reqs,
972 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), 972 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
973 .main_clk = "uart3_fck", 973 .main_clk = "uart3_fck",
@@ -1087,6 +1087,7 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = {
1087 1087
1088static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { 1088static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = {
1089 { .irq = 25 }, 1089 { .irq = 25 },
1090 { .irq = -1 }
1090}; 1091};
1091 1092
1092/* l4_core -> dss_dispc */ 1093/* l4_core -> dss_dispc */
@@ -1113,7 +1114,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
1113 .name = "dss_dispc", 1114 .name = "dss_dispc",
1114 .class = &omap2420_dispc_hwmod_class, 1115 .class = &omap2420_dispc_hwmod_class,
1115 .mpu_irqs = omap2420_dispc_irqs, 1116 .mpu_irqs = omap2420_dispc_irqs,
1116 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs),
1117 .main_clk = "dss1_fck", 1117 .main_clk = "dss1_fck",
1118 .prcm = { 1118 .prcm = {
1119 .omap2 = { 1119 .omap2 = {
@@ -1254,6 +1254,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr;
1254 1254
1255static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { 1255static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
1256 { .irq = INT_24XX_I2C1_IRQ, }, 1256 { .irq = INT_24XX_I2C1_IRQ, },
1257 { .irq = -1 }
1257}; 1258};
1258 1259
1259static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 1260static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
@@ -1268,7 +1269,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = {
1268static struct omap_hwmod omap2420_i2c1_hwmod = { 1269static struct omap_hwmod omap2420_i2c1_hwmod = {
1269 .name = "i2c1", 1270 .name = "i2c1",
1270 .mpu_irqs = i2c1_mpu_irqs, 1271 .mpu_irqs = i2c1_mpu_irqs,
1271 .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
1272 .sdma_reqs = i2c1_sdma_reqs, 1272 .sdma_reqs = i2c1_sdma_reqs,
1273 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), 1273 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
1274 .main_clk = "i2c1_fck", 1274 .main_clk = "i2c1_fck",
@@ -1293,6 +1293,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
1293 1293
1294static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { 1294static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
1295 { .irq = INT_24XX_I2C2_IRQ, }, 1295 { .irq = INT_24XX_I2C2_IRQ, },
1296 { .irq = -1 }
1296}; 1297};
1297 1298
1298static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 1299static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
@@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = {
1307static struct omap_hwmod omap2420_i2c2_hwmod = { 1308static struct omap_hwmod omap2420_i2c2_hwmod = {
1308 .name = "i2c2", 1309 .name = "i2c2",
1309 .mpu_irqs = i2c2_mpu_irqs, 1310 .mpu_irqs = i2c2_mpu_irqs,
1310 .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs),
1311 .sdma_reqs = i2c2_sdma_reqs, 1311 .sdma_reqs = i2c2_sdma_reqs,
1312 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), 1312 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
1313 .main_clk = "i2c2_fck", 1313 .main_clk = "i2c2_fck",
@@ -1430,6 +1430,7 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = {
1430/* gpio1 */ 1430/* gpio1 */
1431static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { 1431static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = {
1432 { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ 1432 { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
1433 { .irq = -1 }
1433}; 1434};
1434 1435
1435static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { 1436static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = {
@@ -1440,7 +1441,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
1440 .name = "gpio1", 1441 .name = "gpio1",
1441 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1442 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1442 .mpu_irqs = omap242x_gpio1_irqs, 1443 .mpu_irqs = omap242x_gpio1_irqs,
1443 .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs),
1444 .main_clk = "gpios_fck", 1444 .main_clk = "gpios_fck",
1445 .prcm = { 1445 .prcm = {
1446 .omap2 = { 1446 .omap2 = {
@@ -1461,6 +1461,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
1461/* gpio2 */ 1461/* gpio2 */
1462static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { 1462static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = {
1463 { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ 1463 { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
1464 { .irq = -1 }
1464}; 1465};
1465 1466
1466static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { 1467static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = {
@@ -1471,7 +1472,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
1471 .name = "gpio2", 1472 .name = "gpio2",
1472 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1473 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1473 .mpu_irqs = omap242x_gpio2_irqs, 1474 .mpu_irqs = omap242x_gpio2_irqs,
1474 .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs),
1475 .main_clk = "gpios_fck", 1475 .main_clk = "gpios_fck",
1476 .prcm = { 1476 .prcm = {
1477 .omap2 = { 1477 .omap2 = {
@@ -1492,6 +1492,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
1492/* gpio3 */ 1492/* gpio3 */
1493static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { 1493static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = {
1494 { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ 1494 { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
1495 { .irq = -1 }
1495}; 1496};
1496 1497
1497static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { 1498static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = {
@@ -1502,7 +1503,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
1502 .name = "gpio3", 1503 .name = "gpio3",
1503 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1504 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1504 .mpu_irqs = omap242x_gpio3_irqs, 1505 .mpu_irqs = omap242x_gpio3_irqs,
1505 .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs),
1506 .main_clk = "gpios_fck", 1506 .main_clk = "gpios_fck",
1507 .prcm = { 1507 .prcm = {
1508 .omap2 = { 1508 .omap2 = {
@@ -1523,6 +1523,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
1523/* gpio4 */ 1523/* gpio4 */
1524static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { 1524static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = {
1525 { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ 1525 { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
1526 { .irq = -1 }
1526}; 1527};
1527 1528
1528static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { 1529static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = {
@@ -1533,7 +1534,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
1533 .name = "gpio4", 1534 .name = "gpio4",
1534 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1535 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1535 .mpu_irqs = omap242x_gpio4_irqs, 1536 .mpu_irqs = omap242x_gpio4_irqs,
1536 .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs),
1537 .main_clk = "gpios_fck", 1537 .main_clk = "gpios_fck",
1538 .prcm = { 1538 .prcm = {
1539 .omap2 = { 1539 .omap2 = {
@@ -1580,6 +1580,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = {
1580 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ 1580 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
1581 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ 1581 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
1582 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ 1582 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
1583 { .irq = -1 }
1583}; 1584};
1584 1585
1585/* dma_system -> L3 */ 1586/* dma_system -> L3 */
@@ -1613,7 +1614,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
1613 .name = "dma", 1614 .name = "dma",
1614 .class = &omap2420_dma_hwmod_class, 1615 .class = &omap2420_dma_hwmod_class,
1615 .mpu_irqs = omap2420_dma_system_irqs, 1616 .mpu_irqs = omap2420_dma_system_irqs,
1616 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs),
1617 .main_clk = "core_l3_ck", 1617 .main_clk = "core_l3_ck",
1618 .slaves = omap2420_dma_system_slaves, 1618 .slaves = omap2420_dma_system_slaves,
1619 .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), 1619 .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves),
@@ -1650,6 +1650,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod;
1650static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { 1650static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = {
1651 { .name = "dsp", .irq = 26 }, 1651 { .name = "dsp", .irq = 26 },
1652 { .name = "iva", .irq = 34 }, 1652 { .name = "iva", .irq = 34 },
1653 { .irq = -1 }
1653}; 1654};
1654 1655
1655/* l4_core -> mailbox */ 1656/* l4_core -> mailbox */
@@ -1669,7 +1670,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
1669 .name = "mailbox", 1670 .name = "mailbox",
1670 .class = &omap2420_mailbox_hwmod_class, 1671 .class = &omap2420_mailbox_hwmod_class,
1671 .mpu_irqs = omap2420_mailbox_irqs, 1672 .mpu_irqs = omap2420_mailbox_irqs,
1672 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mailbox_irqs),
1673 .main_clk = "mailboxes_ick", 1673 .main_clk = "mailboxes_ick",
1674 .prcm = { 1674 .prcm = {
1675 .omap2 = { 1675 .omap2 = {
@@ -1711,6 +1711,7 @@ static struct omap_hwmod_class omap2420_mcspi_class = {
1711/* mcspi1 */ 1711/* mcspi1 */
1712static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { 1712static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = {
1713 { .irq = 65 }, 1713 { .irq = 65 },
1714 { .irq = -1 }
1714}; 1715};
1715 1716
1716static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { 1717static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = {
@@ -1735,7 +1736,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
1735static struct omap_hwmod omap2420_mcspi1_hwmod = { 1736static struct omap_hwmod omap2420_mcspi1_hwmod = {
1736 .name = "mcspi1_hwmod", 1737 .name = "mcspi1_hwmod",
1737 .mpu_irqs = omap2420_mcspi1_mpu_irqs, 1738 .mpu_irqs = omap2420_mcspi1_mpu_irqs,
1738 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs),
1739 .sdma_reqs = omap2420_mcspi1_sdma_reqs, 1739 .sdma_reqs = omap2420_mcspi1_sdma_reqs,
1740 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), 1740 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs),
1741 .main_clk = "mcspi1_fck", 1741 .main_clk = "mcspi1_fck",
@@ -1758,6 +1758,7 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
1758/* mcspi2 */ 1758/* mcspi2 */
1759static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { 1759static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = {
1760 { .irq = 66 }, 1760 { .irq = 66 },
1761 { .irq = -1 }
1761}; 1762};
1762 1763
1763static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { 1764static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = {
@@ -1778,7 +1779,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
1778static struct omap_hwmod omap2420_mcspi2_hwmod = { 1779static struct omap_hwmod omap2420_mcspi2_hwmod = {
1779 .name = "mcspi2_hwmod", 1780 .name = "mcspi2_hwmod",
1780 .mpu_irqs = omap2420_mcspi2_mpu_irqs, 1781 .mpu_irqs = omap2420_mcspi2_mpu_irqs,
1781 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs),
1782 .sdma_reqs = omap2420_mcspi2_sdma_reqs, 1782 .sdma_reqs = omap2420_mcspi2_sdma_reqs,
1783 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), 1783 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs),
1784 .main_clk = "mcspi2_fck", 1784 .main_clk = "mcspi2_fck",
@@ -1811,6 +1811,7 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = {
1811static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { 1811static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = {
1812 { .name = "tx", .irq = 59 }, 1812 { .name = "tx", .irq = 59 },
1813 { .name = "rx", .irq = 60 }, 1813 { .name = "rx", .irq = 60 },
1814 { .irq = -1 }
1814}; 1815};
1815 1816
1816static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { 1817static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = {
@@ -1836,7 +1837,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
1836 .name = "mcbsp1", 1837 .name = "mcbsp1",
1837 .class = &omap2420_mcbsp_hwmod_class, 1838 .class = &omap2420_mcbsp_hwmod_class,
1838 .mpu_irqs = omap2420_mcbsp1_irqs, 1839 .mpu_irqs = omap2420_mcbsp1_irqs,
1839 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs),
1840 .sdma_reqs = omap2420_mcbsp1_sdma_chs, 1840 .sdma_reqs = omap2420_mcbsp1_sdma_chs,
1841 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), 1841 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs),
1842 .main_clk = "mcbsp1_fck", 1842 .main_clk = "mcbsp1_fck",
@@ -1858,6 +1858,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
1858static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { 1858static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = {
1859 { .name = "tx", .irq = 62 }, 1859 { .name = "tx", .irq = 62 },
1860 { .name = "rx", .irq = 63 }, 1860 { .name = "rx", .irq = 63 },
1861 { .irq = -1 }
1861}; 1862};
1862 1863
1863static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { 1864static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = {
@@ -1883,7 +1884,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
1883 .name = "mcbsp2", 1884 .name = "mcbsp2",
1884 .class = &omap2420_mcbsp_hwmod_class, 1885 .class = &omap2420_mcbsp_hwmod_class,
1885 .mpu_irqs = omap2420_mcbsp2_irqs, 1886 .mpu_irqs = omap2420_mcbsp2_irqs,
1886 .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs),
1887 .sdma_reqs = omap2420_mcbsp2_sdma_chs, 1887 .sdma_reqs = omap2420_mcbsp2_sdma_chs,
1888 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), 1888 .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs),
1889 .main_clk = "mcbsp2_fck", 1889 .main_clk = "mcbsp2_fck",
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 9531ef2802f2..2c28468a37f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -369,6 +369,7 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = {
369static struct omap_hwmod omap2430_timer1_hwmod; 369static struct omap_hwmod omap2430_timer1_hwmod;
370static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { 370static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = {
371 { .irq = 37, }, 371 { .irq = 37, },
372 { .irq = -1 }
372}; 373};
373 374
374static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { 375static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = {
@@ -398,7 +399,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = {
398static struct omap_hwmod omap2430_timer1_hwmod = { 399static struct omap_hwmod omap2430_timer1_hwmod = {
399 .name = "timer1", 400 .name = "timer1",
400 .mpu_irqs = omap2430_timer1_mpu_irqs, 401 .mpu_irqs = omap2430_timer1_mpu_irqs,
401 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer1_mpu_irqs),
402 .main_clk = "gpt1_fck", 402 .main_clk = "gpt1_fck",
403 .prcm = { 403 .prcm = {
404 .omap2 = { 404 .omap2 = {
@@ -419,6 +419,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = {
419static struct omap_hwmod omap2430_timer2_hwmod; 419static struct omap_hwmod omap2430_timer2_hwmod;
420static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { 420static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = {
421 { .irq = 38, }, 421 { .irq = 38, },
422 { .irq = -1 }
422}; 423};
423 424
424/* l4_core -> timer2 */ 425/* l4_core -> timer2 */
@@ -439,7 +440,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = {
439static struct omap_hwmod omap2430_timer2_hwmod = { 440static struct omap_hwmod omap2430_timer2_hwmod = {
440 .name = "timer2", 441 .name = "timer2",
441 .mpu_irqs = omap2430_timer2_mpu_irqs, 442 .mpu_irqs = omap2430_timer2_mpu_irqs,
442 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer2_mpu_irqs),
443 .main_clk = "gpt2_fck", 443 .main_clk = "gpt2_fck",
444 .prcm = { 444 .prcm = {
445 .omap2 = { 445 .omap2 = {
@@ -460,6 +460,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = {
460static struct omap_hwmod omap2430_timer3_hwmod; 460static struct omap_hwmod omap2430_timer3_hwmod;
461static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { 461static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = {
462 { .irq = 39, }, 462 { .irq = 39, },
463 { .irq = -1 }
463}; 464};
464 465
465/* l4_core -> timer3 */ 466/* l4_core -> timer3 */
@@ -480,7 +481,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = {
480static struct omap_hwmod omap2430_timer3_hwmod = { 481static struct omap_hwmod omap2430_timer3_hwmod = {
481 .name = "timer3", 482 .name = "timer3",
482 .mpu_irqs = omap2430_timer3_mpu_irqs, 483 .mpu_irqs = omap2430_timer3_mpu_irqs,
483 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer3_mpu_irqs),
484 .main_clk = "gpt3_fck", 484 .main_clk = "gpt3_fck",
485 .prcm = { 485 .prcm = {
486 .omap2 = { 486 .omap2 = {
@@ -501,6 +501,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = {
501static struct omap_hwmod omap2430_timer4_hwmod; 501static struct omap_hwmod omap2430_timer4_hwmod;
502static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { 502static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = {
503 { .irq = 40, }, 503 { .irq = 40, },
504 { .irq = -1 }
504}; 505};
505 506
506/* l4_core -> timer4 */ 507/* l4_core -> timer4 */
@@ -521,7 +522,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = {
521static struct omap_hwmod omap2430_timer4_hwmod = { 522static struct omap_hwmod omap2430_timer4_hwmod = {
522 .name = "timer4", 523 .name = "timer4",
523 .mpu_irqs = omap2430_timer4_mpu_irqs, 524 .mpu_irqs = omap2430_timer4_mpu_irqs,
524 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer4_mpu_irqs),
525 .main_clk = "gpt4_fck", 525 .main_clk = "gpt4_fck",
526 .prcm = { 526 .prcm = {
527 .omap2 = { 527 .omap2 = {
@@ -542,6 +542,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = {
542static struct omap_hwmod omap2430_timer5_hwmod; 542static struct omap_hwmod omap2430_timer5_hwmod;
543static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { 543static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = {
544 { .irq = 41, }, 544 { .irq = 41, },
545 { .irq = -1 }
545}; 546};
546 547
547/* l4_core -> timer5 */ 548/* l4_core -> timer5 */
@@ -562,7 +563,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = {
562static struct omap_hwmod omap2430_timer5_hwmod = { 563static struct omap_hwmod omap2430_timer5_hwmod = {
563 .name = "timer5", 564 .name = "timer5",
564 .mpu_irqs = omap2430_timer5_mpu_irqs, 565 .mpu_irqs = omap2430_timer5_mpu_irqs,
565 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer5_mpu_irqs),
566 .main_clk = "gpt5_fck", 566 .main_clk = "gpt5_fck",
567 .prcm = { 567 .prcm = {
568 .omap2 = { 568 .omap2 = {
@@ -583,6 +583,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = {
583static struct omap_hwmod omap2430_timer6_hwmod; 583static struct omap_hwmod omap2430_timer6_hwmod;
584static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { 584static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = {
585 { .irq = 42, }, 585 { .irq = 42, },
586 { .irq = -1 }
586}; 587};
587 588
588/* l4_core -> timer6 */ 589/* l4_core -> timer6 */
@@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = {
603static struct omap_hwmod omap2430_timer6_hwmod = { 604static struct omap_hwmod omap2430_timer6_hwmod = {
604 .name = "timer6", 605 .name = "timer6",
605 .mpu_irqs = omap2430_timer6_mpu_irqs, 606 .mpu_irqs = omap2430_timer6_mpu_irqs,
606 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer6_mpu_irqs),
607 .main_clk = "gpt6_fck", 607 .main_clk = "gpt6_fck",
608 .prcm = { 608 .prcm = {
609 .omap2 = { 609 .omap2 = {
@@ -624,6 +624,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = {
624static struct omap_hwmod omap2430_timer7_hwmod; 624static struct omap_hwmod omap2430_timer7_hwmod;
625static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { 625static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = {
626 { .irq = 43, }, 626 { .irq = 43, },
627 { .irq = -1 }
627}; 628};
628 629
629/* l4_core -> timer7 */ 630/* l4_core -> timer7 */
@@ -644,7 +645,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = {
644static struct omap_hwmod omap2430_timer7_hwmod = { 645static struct omap_hwmod omap2430_timer7_hwmod = {
645 .name = "timer7", 646 .name = "timer7",
646 .mpu_irqs = omap2430_timer7_mpu_irqs, 647 .mpu_irqs = omap2430_timer7_mpu_irqs,
647 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer7_mpu_irqs),
648 .main_clk = "gpt7_fck", 648 .main_clk = "gpt7_fck",
649 .prcm = { 649 .prcm = {
650 .omap2 = { 650 .omap2 = {
@@ -665,6 +665,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = {
665static struct omap_hwmod omap2430_timer8_hwmod; 665static struct omap_hwmod omap2430_timer8_hwmod;
666static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { 666static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = {
667 { .irq = 44, }, 667 { .irq = 44, },
668 { .irq = -1 }
668}; 669};
669 670
670/* l4_core -> timer8 */ 671/* l4_core -> timer8 */
@@ -685,7 +686,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = {
685static struct omap_hwmod omap2430_timer8_hwmod = { 686static struct omap_hwmod omap2430_timer8_hwmod = {
686 .name = "timer8", 687 .name = "timer8",
687 .mpu_irqs = omap2430_timer8_mpu_irqs, 688 .mpu_irqs = omap2430_timer8_mpu_irqs,
688 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer8_mpu_irqs),
689 .main_clk = "gpt8_fck", 689 .main_clk = "gpt8_fck",
690 .prcm = { 690 .prcm = {
691 .omap2 = { 691 .omap2 = {
@@ -706,6 +706,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = {
706static struct omap_hwmod omap2430_timer9_hwmod; 706static struct omap_hwmod omap2430_timer9_hwmod;
707static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { 707static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = {
708 { .irq = 45, }, 708 { .irq = 45, },
709 { .irq = -1 }
709}; 710};
710 711
711/* l4_core -> timer9 */ 712/* l4_core -> timer9 */
@@ -726,7 +727,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = {
726static struct omap_hwmod omap2430_timer9_hwmod = { 727static struct omap_hwmod omap2430_timer9_hwmod = {
727 .name = "timer9", 728 .name = "timer9",
728 .mpu_irqs = omap2430_timer9_mpu_irqs, 729 .mpu_irqs = omap2430_timer9_mpu_irqs,
729 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer9_mpu_irqs),
730 .main_clk = "gpt9_fck", 730 .main_clk = "gpt9_fck",
731 .prcm = { 731 .prcm = {
732 .omap2 = { 732 .omap2 = {
@@ -747,6 +747,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = {
747static struct omap_hwmod omap2430_timer10_hwmod; 747static struct omap_hwmod omap2430_timer10_hwmod;
748static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { 748static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = {
749 { .irq = 46, }, 749 { .irq = 46, },
750 { .irq = -1 }
750}; 751};
751 752
752/* l4_core -> timer10 */ 753/* l4_core -> timer10 */
@@ -767,7 +768,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = {
767static struct omap_hwmod omap2430_timer10_hwmod = { 768static struct omap_hwmod omap2430_timer10_hwmod = {
768 .name = "timer10", 769 .name = "timer10",
769 .mpu_irqs = omap2430_timer10_mpu_irqs, 770 .mpu_irqs = omap2430_timer10_mpu_irqs,
770 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer10_mpu_irqs),
771 .main_clk = "gpt10_fck", 771 .main_clk = "gpt10_fck",
772 .prcm = { 772 .prcm = {
773 .omap2 = { 773 .omap2 = {
@@ -788,6 +788,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = {
788static struct omap_hwmod omap2430_timer11_hwmod; 788static struct omap_hwmod omap2430_timer11_hwmod;
789static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { 789static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = {
790 { .irq = 47, }, 790 { .irq = 47, },
791 { .irq = -1 }
791}; 792};
792 793
793/* l4_core -> timer11 */ 794/* l4_core -> timer11 */
@@ -808,7 +809,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = {
808static struct omap_hwmod omap2430_timer11_hwmod = { 809static struct omap_hwmod omap2430_timer11_hwmod = {
809 .name = "timer11", 810 .name = "timer11",
810 .mpu_irqs = omap2430_timer11_mpu_irqs, 811 .mpu_irqs = omap2430_timer11_mpu_irqs,
811 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer11_mpu_irqs),
812 .main_clk = "gpt11_fck", 812 .main_clk = "gpt11_fck",
813 .prcm = { 813 .prcm = {
814 .omap2 = { 814 .omap2 = {
@@ -829,6 +829,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = {
829static struct omap_hwmod omap2430_timer12_hwmod; 829static struct omap_hwmod omap2430_timer12_hwmod;
830static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { 830static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = {
831 { .irq = 48, }, 831 { .irq = 48, },
832 { .irq = -1 }
832}; 833};
833 834
834/* l4_core -> timer12 */ 835/* l4_core -> timer12 */
@@ -849,7 +850,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = {
849static struct omap_hwmod omap2430_timer12_hwmod = { 850static struct omap_hwmod omap2430_timer12_hwmod = {
850 .name = "timer12", 851 .name = "timer12",
851 .mpu_irqs = omap2430_timer12_mpu_irqs, 852 .mpu_irqs = omap2430_timer12_mpu_irqs,
852 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer12_mpu_irqs),
853 .main_clk = "gpt12_fck", 853 .main_clk = "gpt12_fck",
854 .prcm = { 854 .prcm = {
855 .omap2 = { 855 .omap2 = {
@@ -950,6 +950,7 @@ static struct omap_hwmod_class uart_class = {
950 950
951static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { 951static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
952 { .irq = INT_24XX_UART1_IRQ, }, 952 { .irq = INT_24XX_UART1_IRQ, },
953 { .irq = -1 }
953}; 954};
954 955
955static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 956static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
@@ -964,7 +965,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = {
964static struct omap_hwmod omap2430_uart1_hwmod = { 965static struct omap_hwmod omap2430_uart1_hwmod = {
965 .name = "uart1", 966 .name = "uart1",
966 .mpu_irqs = uart1_mpu_irqs, 967 .mpu_irqs = uart1_mpu_irqs,
967 .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
968 .sdma_reqs = uart1_sdma_reqs, 968 .sdma_reqs = uart1_sdma_reqs,
969 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), 969 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
970 .main_clk = "uart1_fck", 970 .main_clk = "uart1_fck",
@@ -987,6 +987,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
987 987
988static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { 988static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
989 { .irq = INT_24XX_UART2_IRQ, }, 989 { .irq = INT_24XX_UART2_IRQ, },
990 { .irq = -1 }
990}; 991};
991 992
992static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 993static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
@@ -1001,7 +1002,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = {
1001static struct omap_hwmod omap2430_uart2_hwmod = { 1002static struct omap_hwmod omap2430_uart2_hwmod = {
1002 .name = "uart2", 1003 .name = "uart2",
1003 .mpu_irqs = uart2_mpu_irqs, 1004 .mpu_irqs = uart2_mpu_irqs,
1004 .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
1005 .sdma_reqs = uart2_sdma_reqs, 1005 .sdma_reqs = uart2_sdma_reqs,
1006 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), 1006 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
1007 .main_clk = "uart2_fck", 1007 .main_clk = "uart2_fck",
@@ -1024,6 +1024,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
1024 1024
1025static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { 1025static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
1026 { .irq = INT_24XX_UART3_IRQ, }, 1026 { .irq = INT_24XX_UART3_IRQ, },
1027 { .irq = -1 }
1027}; 1028};
1028 1029
1029static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 1030static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
@@ -1038,7 +1039,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = {
1038static struct omap_hwmod omap2430_uart3_hwmod = { 1039static struct omap_hwmod omap2430_uart3_hwmod = {
1039 .name = "uart3", 1040 .name = "uart3",
1040 .mpu_irqs = uart3_mpu_irqs, 1041 .mpu_irqs = uart3_mpu_irqs,
1041 .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
1042 .sdma_reqs = uart3_sdma_reqs, 1042 .sdma_reqs = uart3_sdma_reqs,
1043 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), 1043 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
1044 .main_clk = "uart3_fck", 1044 .main_clk = "uart3_fck",
@@ -1152,6 +1152,7 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = {
1152 1152
1153static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { 1153static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = {
1154 { .irq = 25 }, 1154 { .irq = 25 },
1155 { .irq = -1 }
1155}; 1156};
1156 1157
1157/* l4_core -> dss_dispc */ 1158/* l4_core -> dss_dispc */
@@ -1172,7 +1173,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
1172 .name = "dss_dispc", 1173 .name = "dss_dispc",
1173 .class = &omap2430_dispc_hwmod_class, 1174 .class = &omap2430_dispc_hwmod_class,
1174 .mpu_irqs = omap2430_dispc_irqs, 1175 .mpu_irqs = omap2430_dispc_irqs,
1175 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs),
1176 .main_clk = "dss1_fck", 1176 .main_clk = "dss1_fck",
1177 .prcm = { 1177 .prcm = {
1178 .omap2 = { 1178 .omap2 = {
@@ -1304,6 +1304,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
1304 1304
1305static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { 1305static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
1306 { .irq = INT_24XX_I2C1_IRQ, }, 1306 { .irq = INT_24XX_I2C1_IRQ, },
1307 { .irq = -1 }
1307}; 1308};
1308 1309
1309static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 1310static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
@@ -1318,7 +1319,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = {
1318static struct omap_hwmod omap2430_i2c1_hwmod = { 1319static struct omap_hwmod omap2430_i2c1_hwmod = {
1319 .name = "i2c1", 1320 .name = "i2c1",
1320 .mpu_irqs = i2c1_mpu_irqs, 1321 .mpu_irqs = i2c1_mpu_irqs,
1321 .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
1322 .sdma_reqs = i2c1_sdma_reqs, 1322 .sdma_reqs = i2c1_sdma_reqs,
1323 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), 1323 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
1324 .main_clk = "i2chs1_fck", 1324 .main_clk = "i2chs1_fck",
@@ -1350,6 +1350,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
1350 1350
1351static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { 1351static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
1352 { .irq = INT_24XX_I2C2_IRQ, }, 1352 { .irq = INT_24XX_I2C2_IRQ, },
1353 { .irq = -1 }
1353}; 1354};
1354 1355
1355static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 1356static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
@@ -1364,7 +1365,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = {
1364static struct omap_hwmod omap2430_i2c2_hwmod = { 1365static struct omap_hwmod omap2430_i2c2_hwmod = {
1365 .name = "i2c2", 1366 .name = "i2c2",
1366 .mpu_irqs = i2c2_mpu_irqs, 1367 .mpu_irqs = i2c2_mpu_irqs,
1367 .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs),
1368 .sdma_reqs = i2c2_sdma_reqs, 1368 .sdma_reqs = i2c2_sdma_reqs,
1369 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), 1369 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
1370 .main_clk = "i2chs2_fck", 1370 .main_clk = "i2chs2_fck",
@@ -1504,6 +1504,7 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = {
1504/* gpio1 */ 1504/* gpio1 */
1505static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { 1505static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = {
1506 { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ 1506 { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */
1507 { .irq = -1 }
1507}; 1508};
1508 1509
1509static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { 1510static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = {
@@ -1514,7 +1515,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
1514 .name = "gpio1", 1515 .name = "gpio1",
1515 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1516 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1516 .mpu_irqs = omap243x_gpio1_irqs, 1517 .mpu_irqs = omap243x_gpio1_irqs,
1517 .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs),
1518 .main_clk = "gpios_fck", 1518 .main_clk = "gpios_fck",
1519 .prcm = { 1519 .prcm = {
1520 .omap2 = { 1520 .omap2 = {
@@ -1535,6 +1535,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
1535/* gpio2 */ 1535/* gpio2 */
1536static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { 1536static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = {
1537 { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ 1537 { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */
1538 { .irq = -1 }
1538}; 1539};
1539 1540
1540static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { 1541static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = {
@@ -1545,7 +1546,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
1545 .name = "gpio2", 1546 .name = "gpio2",
1546 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1547 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1547 .mpu_irqs = omap243x_gpio2_irqs, 1548 .mpu_irqs = omap243x_gpio2_irqs,
1548 .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs),
1549 .main_clk = "gpios_fck", 1549 .main_clk = "gpios_fck",
1550 .prcm = { 1550 .prcm = {
1551 .omap2 = { 1551 .omap2 = {
@@ -1566,6 +1566,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
1566/* gpio3 */ 1566/* gpio3 */
1567static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { 1567static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = {
1568 { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ 1568 { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */
1569 { .irq = -1 }
1569}; 1570};
1570 1571
1571static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { 1572static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = {
@@ -1576,7 +1577,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
1576 .name = "gpio3", 1577 .name = "gpio3",
1577 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1578 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1578 .mpu_irqs = omap243x_gpio3_irqs, 1579 .mpu_irqs = omap243x_gpio3_irqs,
1579 .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs),
1580 .main_clk = "gpios_fck", 1580 .main_clk = "gpios_fck",
1581 .prcm = { 1581 .prcm = {
1582 .omap2 = { 1582 .omap2 = {
@@ -1597,6 +1597,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
1597/* gpio4 */ 1597/* gpio4 */
1598static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { 1598static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = {
1599 { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ 1599 { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */
1600 { .irq = -1 }
1600}; 1601};
1601 1602
1602static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { 1603static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = {
@@ -1607,7 +1608,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
1607 .name = "gpio4", 1608 .name = "gpio4",
1608 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1609 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1609 .mpu_irqs = omap243x_gpio4_irqs, 1610 .mpu_irqs = omap243x_gpio4_irqs,
1610 .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs),
1611 .main_clk = "gpios_fck", 1611 .main_clk = "gpios_fck",
1612 .prcm = { 1612 .prcm = {
1613 .omap2 = { 1613 .omap2 = {
@@ -1628,6 +1628,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
1628/* gpio5 */ 1628/* gpio5 */
1629static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { 1629static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = {
1630 { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ 1630 { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */
1631 { .irq = -1 }
1631}; 1632};
1632 1633
1633static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { 1634static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = {
@@ -1638,7 +1639,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
1638 .name = "gpio5", 1639 .name = "gpio5",
1639 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1640 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1640 .mpu_irqs = omap243x_gpio5_irqs, 1641 .mpu_irqs = omap243x_gpio5_irqs,
1641 .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs),
1642 .main_clk = "gpio5_fck", 1642 .main_clk = "gpio5_fck",
1643 .prcm = { 1643 .prcm = {
1644 .omap2 = { 1644 .omap2 = {
@@ -1685,6 +1685,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = {
1685 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ 1685 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
1686 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ 1686 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
1687 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ 1687 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
1688 { .irq = -1 }
1688}; 1689};
1689 1690
1690/* dma_system -> L3 */ 1691/* dma_system -> L3 */
@@ -1718,7 +1719,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
1718 .name = "dma", 1719 .name = "dma",
1719 .class = &omap2430_dma_hwmod_class, 1720 .class = &omap2430_dma_hwmod_class,
1720 .mpu_irqs = omap2430_dma_system_irqs, 1721 .mpu_irqs = omap2430_dma_system_irqs,
1721 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs),
1722 .main_clk = "core_l3_ck", 1722 .main_clk = "core_l3_ck",
1723 .slaves = omap2430_dma_system_slaves, 1723 .slaves = omap2430_dma_system_slaves,
1724 .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), 1724 .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves),
@@ -1754,6 +1754,7 @@ static struct omap_hwmod_class omap2430_mailbox_hwmod_class = {
1754static struct omap_hwmod omap2430_mailbox_hwmod; 1754static struct omap_hwmod omap2430_mailbox_hwmod;
1755static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { 1755static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = {
1756 { .irq = 26 }, 1756 { .irq = 26 },
1757 { .irq = -1 }
1757}; 1758};
1758 1759
1759/* l4_core -> mailbox */ 1760/* l4_core -> mailbox */
@@ -1773,7 +1774,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
1773 .name = "mailbox", 1774 .name = "mailbox",
1774 .class = &omap2430_mailbox_hwmod_class, 1775 .class = &omap2430_mailbox_hwmod_class,
1775 .mpu_irqs = omap2430_mailbox_irqs, 1776 .mpu_irqs = omap2430_mailbox_irqs,
1776 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mailbox_irqs),
1777 .main_clk = "mailboxes_ick", 1777 .main_clk = "mailboxes_ick",
1778 .prcm = { 1778 .prcm = {
1779 .omap2 = { 1779 .omap2 = {
@@ -1815,6 +1815,7 @@ static struct omap_hwmod_class omap2430_mcspi_class = {
1815/* mcspi1 */ 1815/* mcspi1 */
1816static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { 1816static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = {
1817 { .irq = 65 }, 1817 { .irq = 65 },
1818 { .irq = -1 }
1818}; 1819};
1819 1820
1820static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { 1821static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = {
@@ -1839,7 +1840,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
1839static struct omap_hwmod omap2430_mcspi1_hwmod = { 1840static struct omap_hwmod omap2430_mcspi1_hwmod = {
1840 .name = "mcspi1_hwmod", 1841 .name = "mcspi1_hwmod",
1841 .mpu_irqs = omap2430_mcspi1_mpu_irqs, 1842 .mpu_irqs = omap2430_mcspi1_mpu_irqs,
1842 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs),
1843 .sdma_reqs = omap2430_mcspi1_sdma_reqs, 1843 .sdma_reqs = omap2430_mcspi1_sdma_reqs,
1844 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), 1844 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs),
1845 .main_clk = "mcspi1_fck", 1845 .main_clk = "mcspi1_fck",
@@ -1862,6 +1862,7 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
1862/* mcspi2 */ 1862/* mcspi2 */
1863static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { 1863static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = {
1864 { .irq = 66 }, 1864 { .irq = 66 },
1865 { .irq = -1 }
1865}; 1866};
1866 1867
1867static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { 1868static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = {
@@ -1882,7 +1883,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
1882static struct omap_hwmod omap2430_mcspi2_hwmod = { 1883static struct omap_hwmod omap2430_mcspi2_hwmod = {
1883 .name = "mcspi2_hwmod", 1884 .name = "mcspi2_hwmod",
1884 .mpu_irqs = omap2430_mcspi2_mpu_irqs, 1885 .mpu_irqs = omap2430_mcspi2_mpu_irqs,
1885 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs),
1886 .sdma_reqs = omap2430_mcspi2_sdma_reqs, 1886 .sdma_reqs = omap2430_mcspi2_sdma_reqs,
1887 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), 1887 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs),
1888 .main_clk = "mcspi2_fck", 1888 .main_clk = "mcspi2_fck",
@@ -1905,6 +1905,7 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = {
1905/* mcspi3 */ 1905/* mcspi3 */
1906static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { 1906static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = {
1907 { .irq = 91 }, 1907 { .irq = 91 },
1908 { .irq = -1 }
1908}; 1909};
1909 1910
1910static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { 1911static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = {
@@ -1925,7 +1926,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
1925static struct omap_hwmod omap2430_mcspi3_hwmod = { 1926static struct omap_hwmod omap2430_mcspi3_hwmod = {
1926 .name = "mcspi3_hwmod", 1927 .name = "mcspi3_hwmod",
1927 .mpu_irqs = omap2430_mcspi3_mpu_irqs, 1928 .mpu_irqs = omap2430_mcspi3_mpu_irqs,
1928 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs),
1929 .sdma_reqs = omap2430_mcspi3_sdma_reqs, 1929 .sdma_reqs = omap2430_mcspi3_sdma_reqs,
1930 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), 1930 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs),
1931 .main_clk = "mcspi3_fck", 1931 .main_clk = "mcspi3_fck",
@@ -1970,12 +1970,12 @@ static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = {
1970 1970
1971 { .name = "mc", .irq = 92 }, 1971 { .name = "mc", .irq = 92 },
1972 { .name = "dma", .irq = 93 }, 1972 { .name = "dma", .irq = 93 },
1973 { .irq = -1 }
1973}; 1974};
1974 1975
1975static struct omap_hwmod omap2430_usbhsotg_hwmod = { 1976static struct omap_hwmod omap2430_usbhsotg_hwmod = {
1976 .name = "usb_otg_hs", 1977 .name = "usb_otg_hs",
1977 .mpu_irqs = omap2430_usbhsotg_mpu_irqs, 1978 .mpu_irqs = omap2430_usbhsotg_mpu_irqs,
1978 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs),
1979 .main_clk = "usbhs_ick", 1979 .main_clk = "usbhs_ick",
1980 .prcm = { 1980 .prcm = {
1981 .omap2 = { 1981 .omap2 = {
@@ -2025,6 +2025,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = {
2025 { .name = "rx", .irq = 60 }, 2025 { .name = "rx", .irq = 60 },
2026 { .name = "ovr", .irq = 61 }, 2026 { .name = "ovr", .irq = 61 },
2027 { .name = "common", .irq = 64 }, 2027 { .name = "common", .irq = 64 },
2028 { .irq = -1 }
2028}; 2029};
2029 2030
2030static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { 2031static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = {
@@ -2050,7 +2051,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
2050 .name = "mcbsp1", 2051 .name = "mcbsp1",
2051 .class = &omap2430_mcbsp_hwmod_class, 2052 .class = &omap2430_mcbsp_hwmod_class,
2052 .mpu_irqs = omap2430_mcbsp1_irqs, 2053 .mpu_irqs = omap2430_mcbsp1_irqs,
2053 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs),
2054 .sdma_reqs = omap2430_mcbsp1_sdma_chs, 2054 .sdma_reqs = omap2430_mcbsp1_sdma_chs,
2055 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), 2055 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs),
2056 .main_clk = "mcbsp1_fck", 2056 .main_clk = "mcbsp1_fck",
@@ -2073,6 +2073,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = {
2073 { .name = "tx", .irq = 62 }, 2073 { .name = "tx", .irq = 62 },
2074 { .name = "rx", .irq = 63 }, 2074 { .name = "rx", .irq = 63 },
2075 { .name = "common", .irq = 16 }, 2075 { .name = "common", .irq = 16 },
2076 { .irq = -1 }
2076}; 2077};
2077 2078
2078static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { 2079static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = {
@@ -2098,7 +2099,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
2098 .name = "mcbsp2", 2099 .name = "mcbsp2",
2099 .class = &omap2430_mcbsp_hwmod_class, 2100 .class = &omap2430_mcbsp_hwmod_class,
2100 .mpu_irqs = omap2430_mcbsp2_irqs, 2101 .mpu_irqs = omap2430_mcbsp2_irqs,
2101 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs),
2102 .sdma_reqs = omap2430_mcbsp2_sdma_chs, 2102 .sdma_reqs = omap2430_mcbsp2_sdma_chs,
2103 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), 2103 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs),
2104 .main_clk = "mcbsp2_fck", 2104 .main_clk = "mcbsp2_fck",
@@ -2121,6 +2121,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = {
2121 { .name = "tx", .irq = 89 }, 2121 { .name = "tx", .irq = 89 },
2122 { .name = "rx", .irq = 90 }, 2122 { .name = "rx", .irq = 90 },
2123 { .name = "common", .irq = 17 }, 2123 { .name = "common", .irq = 17 },
2124 { .irq = -1 }
2124}; 2125};
2125 2126
2126static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { 2127static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = {
@@ -2156,7 +2157,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
2156 .name = "mcbsp3", 2157 .name = "mcbsp3",
2157 .class = &omap2430_mcbsp_hwmod_class, 2158 .class = &omap2430_mcbsp_hwmod_class,
2158 .mpu_irqs = omap2430_mcbsp3_irqs, 2159 .mpu_irqs = omap2430_mcbsp3_irqs,
2159 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs),
2160 .sdma_reqs = omap2430_mcbsp3_sdma_chs, 2160 .sdma_reqs = omap2430_mcbsp3_sdma_chs,
2161 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), 2161 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs),
2162 .main_clk = "mcbsp3_fck", 2162 .main_clk = "mcbsp3_fck",
@@ -2179,6 +2179,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = {
2179 { .name = "tx", .irq = 54 }, 2179 { .name = "tx", .irq = 54 },
2180 { .name = "rx", .irq = 55 }, 2180 { .name = "rx", .irq = 55 },
2181 { .name = "common", .irq = 18 }, 2181 { .name = "common", .irq = 18 },
2182 { .irq = -1 }
2182}; 2183};
2183 2184
2184static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { 2185static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = {
@@ -2214,7 +2215,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
2214 .name = "mcbsp4", 2215 .name = "mcbsp4",
2215 .class = &omap2430_mcbsp_hwmod_class, 2216 .class = &omap2430_mcbsp_hwmod_class,
2216 .mpu_irqs = omap2430_mcbsp4_irqs, 2217 .mpu_irqs = omap2430_mcbsp4_irqs,
2217 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs),
2218 .sdma_reqs = omap2430_mcbsp4_sdma_chs, 2218 .sdma_reqs = omap2430_mcbsp4_sdma_chs,
2219 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), 2219 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs),
2220 .main_clk = "mcbsp4_fck", 2220 .main_clk = "mcbsp4_fck",
@@ -2237,6 +2237,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = {
2237 { .name = "tx", .irq = 81 }, 2237 { .name = "tx", .irq = 81 },
2238 { .name = "rx", .irq = 82 }, 2238 { .name = "rx", .irq = 82 },
2239 { .name = "common", .irq = 19 }, 2239 { .name = "common", .irq = 19 },
2240 { .irq = -1 }
2240}; 2241};
2241 2242
2242static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { 2243static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = {
@@ -2272,7 +2273,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
2272 .name = "mcbsp5", 2273 .name = "mcbsp5",
2273 .class = &omap2430_mcbsp_hwmod_class, 2274 .class = &omap2430_mcbsp_hwmod_class,
2274 .mpu_irqs = omap2430_mcbsp5_irqs, 2275 .mpu_irqs = omap2430_mcbsp5_irqs,
2275 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs),
2276 .sdma_reqs = omap2430_mcbsp5_sdma_chs, 2276 .sdma_reqs = omap2430_mcbsp5_sdma_chs,
2277 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), 2277 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs),
2278 .main_clk = "mcbsp5_fck", 2278 .main_clk = "mcbsp5_fck",
@@ -2312,6 +2312,7 @@ static struct omap_hwmod_class omap2430_mmc_class = {
2312 2312
2313static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { 2313static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = {
2314 { .irq = 83 }, 2314 { .irq = 83 },
2315 { .irq = -1 }
2315}; 2316};
2316 2317
2317static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { 2318static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = {
@@ -2335,7 +2336,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
2335 .name = "mmc1", 2336 .name = "mmc1",
2336 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2337 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2337 .mpu_irqs = omap2430_mmc1_mpu_irqs, 2338 .mpu_irqs = omap2430_mmc1_mpu_irqs,
2338 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc1_mpu_irqs),
2339 .sdma_reqs = omap2430_mmc1_sdma_reqs, 2339 .sdma_reqs = omap2430_mmc1_sdma_reqs,
2340 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), 2340 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs),
2341 .opt_clks = omap2430_mmc1_opt_clks, 2341 .opt_clks = omap2430_mmc1_opt_clks,
@@ -2361,6 +2361,7 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
2361 2361
2362static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { 2362static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = {
2363 { .irq = 86 }, 2363 { .irq = 86 },
2364 { .irq = -1 }
2364}; 2365};
2365 2366
2366static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { 2367static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = {
@@ -2380,7 +2381,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
2380 .name = "mmc2", 2381 .name = "mmc2",
2381 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2382 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2382 .mpu_irqs = omap2430_mmc2_mpu_irqs, 2383 .mpu_irqs = omap2430_mmc2_mpu_irqs,
2383 .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc2_mpu_irqs),
2384 .sdma_reqs = omap2430_mmc2_sdma_reqs, 2384 .sdma_reqs = omap2430_mmc2_sdma_reqs,
2385 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), 2385 .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs),
2386 .opt_clks = omap2430_mmc2_opt_clks, 2386 .opt_clks = omap2430_mmc2_opt_clks,
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 791f9b290e81..cc178b573fe2 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -103,6 +103,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = {
103static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = { 103static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = {
104 { .irq = INT_34XX_L3_DBG_IRQ }, 104 { .irq = INT_34XX_L3_DBG_IRQ },
105 { .irq = INT_34XX_L3_APP_IRQ }, 105 { .irq = INT_34XX_L3_APP_IRQ },
106 { .irq = -1 }
106}; 107};
107 108
108static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { 109static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = {
@@ -151,7 +152,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = {
151 .name = "l3_main", 152 .name = "l3_main",
152 .class = &l3_hwmod_class, 153 .class = &l3_hwmod_class,
153 .mpu_irqs = omap3xxx_l3_main_irqs, 154 .mpu_irqs = omap3xxx_l3_main_irqs,
154 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_l3_main_irqs),
155 .masters = omap3xxx_l3_main_masters, 155 .masters = omap3xxx_l3_main_masters,
156 .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), 156 .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters),
157 .slaves = omap3xxx_l3_main_slaves, 157 .slaves = omap3xxx_l3_main_slaves,
@@ -574,6 +574,7 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
574static struct omap_hwmod omap3xxx_timer1_hwmod; 574static struct omap_hwmod omap3xxx_timer1_hwmod;
575static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { 575static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = {
576 { .irq = 37, }, 576 { .irq = 37, },
577 { .irq = -1 }
577}; 578};
578 579
579static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { 580static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = {
@@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = {
603static struct omap_hwmod omap3xxx_timer1_hwmod = { 604static struct omap_hwmod omap3xxx_timer1_hwmod = {
604 .name = "timer1", 605 .name = "timer1",
605 .mpu_irqs = omap3xxx_timer1_mpu_irqs, 606 .mpu_irqs = omap3xxx_timer1_mpu_irqs,
606 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs),
607 .main_clk = "gpt1_fck", 607 .main_clk = "gpt1_fck",
608 .prcm = { 608 .prcm = {
609 .omap2 = { 609 .omap2 = {
@@ -624,6 +624,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
624static struct omap_hwmod omap3xxx_timer2_hwmod; 624static struct omap_hwmod omap3xxx_timer2_hwmod;
625static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { 625static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = {
626 { .irq = 38, }, 626 { .irq = 38, },
627 { .irq = -1 }
627}; 628};
628 629
629static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { 630static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = {
@@ -653,7 +654,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = {
653static struct omap_hwmod omap3xxx_timer2_hwmod = { 654static struct omap_hwmod omap3xxx_timer2_hwmod = {
654 .name = "timer2", 655 .name = "timer2",
655 .mpu_irqs = omap3xxx_timer2_mpu_irqs, 656 .mpu_irqs = omap3xxx_timer2_mpu_irqs,
656 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer2_mpu_irqs),
657 .main_clk = "gpt2_fck", 657 .main_clk = "gpt2_fck",
658 .prcm = { 658 .prcm = {
659 .omap2 = { 659 .omap2 = {
@@ -674,6 +674,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
674static struct omap_hwmod omap3xxx_timer3_hwmod; 674static struct omap_hwmod omap3xxx_timer3_hwmod;
675static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { 675static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = {
676 { .irq = 39, }, 676 { .irq = 39, },
677 { .irq = -1 }
677}; 678};
678 679
679static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { 680static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = {
@@ -703,7 +704,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = {
703static struct omap_hwmod omap3xxx_timer3_hwmod = { 704static struct omap_hwmod omap3xxx_timer3_hwmod = {
704 .name = "timer3", 705 .name = "timer3",
705 .mpu_irqs = omap3xxx_timer3_mpu_irqs, 706 .mpu_irqs = omap3xxx_timer3_mpu_irqs,
706 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer3_mpu_irqs),
707 .main_clk = "gpt3_fck", 707 .main_clk = "gpt3_fck",
708 .prcm = { 708 .prcm = {
709 .omap2 = { 709 .omap2 = {
@@ -724,6 +724,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
724static struct omap_hwmod omap3xxx_timer4_hwmod; 724static struct omap_hwmod omap3xxx_timer4_hwmod;
725static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { 725static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = {
726 { .irq = 40, }, 726 { .irq = 40, },
727 { .irq = -1 }
727}; 728};
728 729
729static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { 730static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = {
@@ -753,7 +754,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = {
753static struct omap_hwmod omap3xxx_timer4_hwmod = { 754static struct omap_hwmod omap3xxx_timer4_hwmod = {
754 .name = "timer4", 755 .name = "timer4",
755 .mpu_irqs = omap3xxx_timer4_mpu_irqs, 756 .mpu_irqs = omap3xxx_timer4_mpu_irqs,
756 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer4_mpu_irqs),
757 .main_clk = "gpt4_fck", 757 .main_clk = "gpt4_fck",
758 .prcm = { 758 .prcm = {
759 .omap2 = { 759 .omap2 = {
@@ -774,6 +774,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
774static struct omap_hwmod omap3xxx_timer5_hwmod; 774static struct omap_hwmod omap3xxx_timer5_hwmod;
775static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { 775static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = {
776 { .irq = 41, }, 776 { .irq = 41, },
777 { .irq = -1 }
777}; 778};
778 779
779static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { 780static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = {
@@ -803,7 +804,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = {
803static struct omap_hwmod omap3xxx_timer5_hwmod = { 804static struct omap_hwmod omap3xxx_timer5_hwmod = {
804 .name = "timer5", 805 .name = "timer5",
805 .mpu_irqs = omap3xxx_timer5_mpu_irqs, 806 .mpu_irqs = omap3xxx_timer5_mpu_irqs,
806 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer5_mpu_irqs),
807 .main_clk = "gpt5_fck", 807 .main_clk = "gpt5_fck",
808 .prcm = { 808 .prcm = {
809 .omap2 = { 809 .omap2 = {
@@ -824,6 +824,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
824static struct omap_hwmod omap3xxx_timer6_hwmod; 824static struct omap_hwmod omap3xxx_timer6_hwmod;
825static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { 825static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = {
826 { .irq = 42, }, 826 { .irq = 42, },
827 { .irq = -1 }
827}; 828};
828 829
829static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { 830static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = {
@@ -853,7 +854,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = {
853static struct omap_hwmod omap3xxx_timer6_hwmod = { 854static struct omap_hwmod omap3xxx_timer6_hwmod = {
854 .name = "timer6", 855 .name = "timer6",
855 .mpu_irqs = omap3xxx_timer6_mpu_irqs, 856 .mpu_irqs = omap3xxx_timer6_mpu_irqs,
856 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer6_mpu_irqs),
857 .main_clk = "gpt6_fck", 857 .main_clk = "gpt6_fck",
858 .prcm = { 858 .prcm = {
859 .omap2 = { 859 .omap2 = {
@@ -874,6 +874,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
874static struct omap_hwmod omap3xxx_timer7_hwmod; 874static struct omap_hwmod omap3xxx_timer7_hwmod;
875static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { 875static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = {
876 { .irq = 43, }, 876 { .irq = 43, },
877 { .irq = -1 }
877}; 878};
878 879
879static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { 880static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = {
@@ -903,7 +904,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = {
903static struct omap_hwmod omap3xxx_timer7_hwmod = { 904static struct omap_hwmod omap3xxx_timer7_hwmod = {
904 .name = "timer7", 905 .name = "timer7",
905 .mpu_irqs = omap3xxx_timer7_mpu_irqs, 906 .mpu_irqs = omap3xxx_timer7_mpu_irqs,
906 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer7_mpu_irqs),
907 .main_clk = "gpt7_fck", 907 .main_clk = "gpt7_fck",
908 .prcm = { 908 .prcm = {
909 .omap2 = { 909 .omap2 = {
@@ -924,6 +924,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
924static struct omap_hwmod omap3xxx_timer8_hwmod; 924static struct omap_hwmod omap3xxx_timer8_hwmod;
925static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { 925static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = {
926 { .irq = 44, }, 926 { .irq = 44, },
927 { .irq = -1 }
927}; 928};
928 929
929static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { 930static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = {
@@ -953,7 +954,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = {
953static struct omap_hwmod omap3xxx_timer8_hwmod = { 954static struct omap_hwmod omap3xxx_timer8_hwmod = {
954 .name = "timer8", 955 .name = "timer8",
955 .mpu_irqs = omap3xxx_timer8_mpu_irqs, 956 .mpu_irqs = omap3xxx_timer8_mpu_irqs,
956 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer8_mpu_irqs),
957 .main_clk = "gpt8_fck", 957 .main_clk = "gpt8_fck",
958 .prcm = { 958 .prcm = {
959 .omap2 = { 959 .omap2 = {
@@ -974,6 +974,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
974static struct omap_hwmod omap3xxx_timer9_hwmod; 974static struct omap_hwmod omap3xxx_timer9_hwmod;
975static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { 975static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = {
976 { .irq = 45, }, 976 { .irq = 45, },
977 { .irq = -1 }
977}; 978};
978 979
979static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { 980static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = {
@@ -1003,7 +1004,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = {
1003static struct omap_hwmod omap3xxx_timer9_hwmod = { 1004static struct omap_hwmod omap3xxx_timer9_hwmod = {
1004 .name = "timer9", 1005 .name = "timer9",
1005 .mpu_irqs = omap3xxx_timer9_mpu_irqs, 1006 .mpu_irqs = omap3xxx_timer9_mpu_irqs,
1006 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer9_mpu_irqs),
1007 .main_clk = "gpt9_fck", 1007 .main_clk = "gpt9_fck",
1008 .prcm = { 1008 .prcm = {
1009 .omap2 = { 1009 .omap2 = {
@@ -1024,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
1024static struct omap_hwmod omap3xxx_timer10_hwmod; 1024static struct omap_hwmod omap3xxx_timer10_hwmod;
1025static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { 1025static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = {
1026 { .irq = 46, }, 1026 { .irq = 46, },
1027 { .irq = -1 }
1027}; 1028};
1028 1029
1029/* l4_core -> timer10 */ 1030/* l4_core -> timer10 */
@@ -1044,7 +1045,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = {
1044static struct omap_hwmod omap3xxx_timer10_hwmod = { 1045static struct omap_hwmod omap3xxx_timer10_hwmod = {
1045 .name = "timer10", 1046 .name = "timer10",
1046 .mpu_irqs = omap3xxx_timer10_mpu_irqs, 1047 .mpu_irqs = omap3xxx_timer10_mpu_irqs,
1047 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer10_mpu_irqs),
1048 .main_clk = "gpt10_fck", 1048 .main_clk = "gpt10_fck",
1049 .prcm = { 1049 .prcm = {
1050 .omap2 = { 1050 .omap2 = {
@@ -1065,6 +1065,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
1065static struct omap_hwmod omap3xxx_timer11_hwmod; 1065static struct omap_hwmod omap3xxx_timer11_hwmod;
1066static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { 1066static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = {
1067 { .irq = 47, }, 1067 { .irq = 47, },
1068 { .irq = -1 }
1068}; 1069};
1069 1070
1070/* l4_core -> timer11 */ 1071/* l4_core -> timer11 */
@@ -1085,7 +1086,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = {
1085static struct omap_hwmod omap3xxx_timer11_hwmod = { 1086static struct omap_hwmod omap3xxx_timer11_hwmod = {
1086 .name = "timer11", 1087 .name = "timer11",
1087 .mpu_irqs = omap3xxx_timer11_mpu_irqs, 1088 .mpu_irqs = omap3xxx_timer11_mpu_irqs,
1088 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer11_mpu_irqs),
1089 .main_clk = "gpt11_fck", 1089 .main_clk = "gpt11_fck",
1090 .prcm = { 1090 .prcm = {
1091 .omap2 = { 1091 .omap2 = {
@@ -1106,6 +1106,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
1106static struct omap_hwmod omap3xxx_timer12_hwmod; 1106static struct omap_hwmod omap3xxx_timer12_hwmod;
1107static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = { 1107static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = {
1108 { .irq = 95, }, 1108 { .irq = 95, },
1109 { .irq = -1 }
1109}; 1110};
1110 1111
1111static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { 1112static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = {
@@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = {
1135static struct omap_hwmod omap3xxx_timer12_hwmod = { 1136static struct omap_hwmod omap3xxx_timer12_hwmod = {
1136 .name = "timer12", 1137 .name = "timer12",
1137 .mpu_irqs = omap3xxx_timer12_mpu_irqs, 1138 .mpu_irqs = omap3xxx_timer12_mpu_irqs,
1138 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer12_mpu_irqs),
1139 .main_clk = "gpt12_fck", 1139 .main_clk = "gpt12_fck",
1140 .prcm = { 1140 .prcm = {
1141 .omap2 = { 1141 .omap2 = {
@@ -1256,6 +1256,7 @@ static struct omap_hwmod_class uart_class = {
1256 1256
1257static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { 1257static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
1258 { .irq = INT_24XX_UART1_IRQ, }, 1258 { .irq = INT_24XX_UART1_IRQ, },
1259 { .irq = -1 }
1259}; 1260};
1260 1261
1261static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 1262static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
@@ -1270,7 +1271,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = {
1270static struct omap_hwmod omap3xxx_uart1_hwmod = { 1271static struct omap_hwmod omap3xxx_uart1_hwmod = {
1271 .name = "uart1", 1272 .name = "uart1",
1272 .mpu_irqs = uart1_mpu_irqs, 1273 .mpu_irqs = uart1_mpu_irqs,
1273 .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
1274 .sdma_reqs = uart1_sdma_reqs, 1274 .sdma_reqs = uart1_sdma_reqs,
1275 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), 1275 .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
1276 .main_clk = "uart1_fck", 1276 .main_clk = "uart1_fck",
@@ -1293,6 +1293,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
1293 1293
1294static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { 1294static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
1295 { .irq = INT_24XX_UART2_IRQ, }, 1295 { .irq = INT_24XX_UART2_IRQ, },
1296 { .irq = -1 }
1296}; 1297};
1297 1298
1298static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 1299static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
@@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = {
1307static struct omap_hwmod omap3xxx_uart2_hwmod = { 1308static struct omap_hwmod omap3xxx_uart2_hwmod = {
1308 .name = "uart2", 1309 .name = "uart2",
1309 .mpu_irqs = uart2_mpu_irqs, 1310 .mpu_irqs = uart2_mpu_irqs,
1310 .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
1311 .sdma_reqs = uart2_sdma_reqs, 1311 .sdma_reqs = uart2_sdma_reqs,
1312 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), 1312 .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
1313 .main_clk = "uart2_fck", 1313 .main_clk = "uart2_fck",
@@ -1330,6 +1330,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
1330 1330
1331static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { 1331static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
1332 { .irq = INT_24XX_UART3_IRQ, }, 1332 { .irq = INT_24XX_UART3_IRQ, },
1333 { .irq = -1 }
1333}; 1334};
1334 1335
1335static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 1336static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
@@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = {
1344static struct omap_hwmod omap3xxx_uart3_hwmod = { 1345static struct omap_hwmod omap3xxx_uart3_hwmod = {
1345 .name = "uart3", 1346 .name = "uart3",
1346 .mpu_irqs = uart3_mpu_irqs, 1347 .mpu_irqs = uart3_mpu_irqs,
1347 .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
1348 .sdma_reqs = uart3_sdma_reqs, 1348 .sdma_reqs = uart3_sdma_reqs,
1349 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), 1349 .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
1350 .main_clk = "uart3_fck", 1350 .main_clk = "uart3_fck",
@@ -1367,6 +1367,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
1367 1367
1368static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { 1368static struct omap_hwmod_irq_info uart4_mpu_irqs[] = {
1369 { .irq = INT_36XX_UART4_IRQ, }, 1369 { .irq = INT_36XX_UART4_IRQ, },
1370 { .irq = -1 }
1370}; 1371};
1371 1372
1372static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { 1373static struct omap_hwmod_dma_info uart4_sdma_reqs[] = {
@@ -1381,7 +1382,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = {
1381static struct omap_hwmod omap3xxx_uart4_hwmod = { 1382static struct omap_hwmod omap3xxx_uart4_hwmod = {
1382 .name = "uart4", 1383 .name = "uart4",
1383 .mpu_irqs = uart4_mpu_irqs, 1384 .mpu_irqs = uart4_mpu_irqs,
1384 .mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs),
1385 .sdma_reqs = uart4_sdma_reqs, 1385 .sdma_reqs = uart4_sdma_reqs,
1386 .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), 1386 .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs),
1387 .main_clk = "uart4_fck", 1387 .main_clk = "uart4_fck",
@@ -1557,6 +1557,7 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = {
1557 1557
1558static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { 1558static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = {
1559 { .irq = 25 }, 1559 { .irq = 25 },
1560 { .irq = -1 }
1560}; 1561};
1561 1562
1562/* l4_core -> dss_dispc */ 1563/* l4_core -> dss_dispc */
@@ -1584,7 +1585,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
1584 .name = "dss_dispc", 1585 .name = "dss_dispc",
1585 .class = &omap3xxx_dispc_hwmod_class, 1586 .class = &omap3xxx_dispc_hwmod_class,
1586 .mpu_irqs = omap3xxx_dispc_irqs, 1587 .mpu_irqs = omap3xxx_dispc_irqs,
1587 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs),
1588 .main_clk = "dss1_alwon_fck", 1588 .main_clk = "dss1_alwon_fck",
1589 .prcm = { 1589 .prcm = {
1590 .omap2 = { 1590 .omap2 = {
@@ -1612,6 +1612,7 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = {
1612 1612
1613static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { 1613static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = {
1614 { .irq = 25 }, 1614 { .irq = 25 },
1615 { .irq = -1 }
1615}; 1616};
1616 1617
1617/* dss_dsi1 */ 1618/* dss_dsi1 */
@@ -1648,7 +1649,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
1648 .name = "dss_dsi1", 1649 .name = "dss_dsi1",
1649 .class = &omap3xxx_dsi_hwmod_class, 1650 .class = &omap3xxx_dsi_hwmod_class,
1650 .mpu_irqs = omap3xxx_dsi1_irqs, 1651 .mpu_irqs = omap3xxx_dsi1_irqs,
1651 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs),
1652 .main_clk = "dss1_alwon_fck", 1652 .main_clk = "dss1_alwon_fck",
1653 .prcm = { 1653 .prcm = {
1654 .omap2 = { 1654 .omap2 = {
@@ -1783,6 +1783,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = {
1783 1783
1784static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { 1784static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
1785 { .irq = INT_24XX_I2C1_IRQ, }, 1785 { .irq = INT_24XX_I2C1_IRQ, },
1786 { .irq = -1 }
1786}; 1787};
1787 1788
1788static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 1789static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = {
@@ -1797,7 +1798,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
1797static struct omap_hwmod omap3xxx_i2c1_hwmod = { 1798static struct omap_hwmod omap3xxx_i2c1_hwmod = {
1798 .name = "i2c1", 1799 .name = "i2c1",
1799 .mpu_irqs = i2c1_mpu_irqs, 1800 .mpu_irqs = i2c1_mpu_irqs,
1800 .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs),
1801 .sdma_reqs = i2c1_sdma_reqs, 1801 .sdma_reqs = i2c1_sdma_reqs,
1802 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), 1802 .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs),
1803 .main_clk = "i2c1_fck", 1803 .main_clk = "i2c1_fck",
@@ -1825,6 +1825,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = {
1825 1825
1826static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { 1826static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
1827 { .irq = INT_24XX_I2C2_IRQ, }, 1827 { .irq = INT_24XX_I2C2_IRQ, },
1828 { .irq = -1 }
1828}; 1829};
1829 1830
1830static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 1831static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = {
@@ -1839,7 +1840,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
1839static struct omap_hwmod omap3xxx_i2c2_hwmod = { 1840static struct omap_hwmod omap3xxx_i2c2_hwmod = {
1840 .name = "i2c2", 1841 .name = "i2c2",
1841 .mpu_irqs = i2c2_mpu_irqs, 1842 .mpu_irqs = i2c2_mpu_irqs,
1842 .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs),
1843 .sdma_reqs = i2c2_sdma_reqs, 1843 .sdma_reqs = i2c2_sdma_reqs,
1844 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), 1844 .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs),
1845 .main_clk = "i2c2_fck", 1845 .main_clk = "i2c2_fck",
@@ -1867,6 +1867,7 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = {
1867 1867
1868static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { 1868static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
1869 { .irq = INT_34XX_I2C3_IRQ, }, 1869 { .irq = INT_34XX_I2C3_IRQ, },
1870 { .irq = -1 }
1870}; 1871};
1871 1872
1872static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { 1873static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = {
@@ -1881,7 +1882,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
1881static struct omap_hwmod omap3xxx_i2c3_hwmod = { 1882static struct omap_hwmod omap3xxx_i2c3_hwmod = {
1882 .name = "i2c3", 1883 .name = "i2c3",
1883 .mpu_irqs = i2c3_mpu_irqs, 1884 .mpu_irqs = i2c3_mpu_irqs,
1884 .mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs),
1885 .sdma_reqs = i2c3_sdma_reqs, 1885 .sdma_reqs = i2c3_sdma_reqs,
1886 .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), 1886 .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs),
1887 .main_clk = "i2c3_fck", 1887 .main_clk = "i2c3_fck",
@@ -2034,6 +2034,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
2034/* gpio1 */ 2034/* gpio1 */
2035static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { 2035static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = {
2036 { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ 2036 { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */
2037 { .irq = -1 }
2037}; 2038};
2038 2039
2039static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { 2040static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
@@ -2048,7 +2049,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
2048 .name = "gpio1", 2049 .name = "gpio1",
2049 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2050 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2050 .mpu_irqs = omap3xxx_gpio1_irqs, 2051 .mpu_irqs = omap3xxx_gpio1_irqs,
2051 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs),
2052 .main_clk = "gpio1_ick", 2052 .main_clk = "gpio1_ick",
2053 .opt_clks = gpio1_opt_clks, 2053 .opt_clks = gpio1_opt_clks,
2054 .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), 2054 .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks),
@@ -2071,6 +2071,7 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
2071/* gpio2 */ 2071/* gpio2 */
2072static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { 2072static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = {
2073 { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ 2073 { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */
2074 { .irq = -1 }
2074}; 2075};
2075 2076
2076static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { 2077static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
@@ -2085,7 +2086,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
2085 .name = "gpio2", 2086 .name = "gpio2",
2086 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2087 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2087 .mpu_irqs = omap3xxx_gpio2_irqs, 2088 .mpu_irqs = omap3xxx_gpio2_irqs,
2088 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs),
2089 .main_clk = "gpio2_ick", 2089 .main_clk = "gpio2_ick",
2090 .opt_clks = gpio2_opt_clks, 2090 .opt_clks = gpio2_opt_clks,
2091 .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), 2091 .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks),
@@ -2108,6 +2108,7 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
2108/* gpio3 */ 2108/* gpio3 */
2109static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { 2109static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = {
2110 { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ 2110 { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */
2111 { .irq = -1 }
2111}; 2112};
2112 2113
2113static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { 2114static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
@@ -2122,7 +2123,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
2122 .name = "gpio3", 2123 .name = "gpio3",
2123 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2124 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2124 .mpu_irqs = omap3xxx_gpio3_irqs, 2125 .mpu_irqs = omap3xxx_gpio3_irqs,
2125 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs),
2126 .main_clk = "gpio3_ick", 2126 .main_clk = "gpio3_ick",
2127 .opt_clks = gpio3_opt_clks, 2127 .opt_clks = gpio3_opt_clks,
2128 .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), 2128 .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks),
@@ -2145,6 +2145,7 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
2145/* gpio4 */ 2145/* gpio4 */
2146static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { 2146static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = {
2147 { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ 2147 { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */
2148 { .irq = -1 }
2148}; 2149};
2149 2150
2150static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { 2151static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
@@ -2159,7 +2160,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
2159 .name = "gpio4", 2160 .name = "gpio4",
2160 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2161 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2161 .mpu_irqs = omap3xxx_gpio4_irqs, 2162 .mpu_irqs = omap3xxx_gpio4_irqs,
2162 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs),
2163 .main_clk = "gpio4_ick", 2163 .main_clk = "gpio4_ick",
2164 .opt_clks = gpio4_opt_clks, 2164 .opt_clks = gpio4_opt_clks,
2165 .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), 2165 .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks),
@@ -2182,6 +2182,7 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
2182/* gpio5 */ 2182/* gpio5 */
2183static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = { 2183static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = {
2184 { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */ 2184 { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */
2185 { .irq = -1 }
2185}; 2186};
2186 2187
2187static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { 2188static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
@@ -2196,7 +2197,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
2196 .name = "gpio5", 2197 .name = "gpio5",
2197 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2198 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2198 .mpu_irqs = omap3xxx_gpio5_irqs, 2199 .mpu_irqs = omap3xxx_gpio5_irqs,
2199 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs),
2200 .main_clk = "gpio5_ick", 2200 .main_clk = "gpio5_ick",
2201 .opt_clks = gpio5_opt_clks, 2201 .opt_clks = gpio5_opt_clks,
2202 .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), 2202 .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks),
@@ -2219,6 +2219,7 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
2219/* gpio6 */ 2219/* gpio6 */
2220static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = { 2220static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = {
2221 { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */ 2221 { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */
2222 { .irq = -1 }
2222}; 2223};
2223 2224
2224static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { 2225static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
@@ -2233,7 +2234,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
2233 .name = "gpio6", 2234 .name = "gpio6",
2234 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2235 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2235 .mpu_irqs = omap3xxx_gpio6_irqs, 2236 .mpu_irqs = omap3xxx_gpio6_irqs,
2236 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs),
2237 .main_clk = "gpio6_ick", 2237 .main_clk = "gpio6_ick",
2238 .opt_clks = gpio6_opt_clks, 2238 .opt_clks = gpio6_opt_clks,
2239 .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), 2239 .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks),
@@ -2292,6 +2292,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = {
2292 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ 2292 { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */
2293 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ 2293 { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */
2294 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ 2294 { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */
2295 { .irq = -1 }
2295}; 2296};
2296 2297
2297static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { 2298static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = {
@@ -2326,7 +2327,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {
2326 .name = "dma", 2327 .name = "dma",
2327 .class = &omap3xxx_dma_hwmod_class, 2328 .class = &omap3xxx_dma_hwmod_class,
2328 .mpu_irqs = omap3xxx_dma_system_irqs, 2329 .mpu_irqs = omap3xxx_dma_system_irqs,
2329 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs),
2330 .main_clk = "core_l3_ick", 2330 .main_clk = "core_l3_ick",
2331 .prcm = { 2331 .prcm = {
2332 .omap2 = { 2332 .omap2 = {
@@ -2371,6 +2371,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = {
2371 { .name = "irq", .irq = 16 }, 2371 { .name = "irq", .irq = 16 },
2372 { .name = "tx", .irq = 59 }, 2372 { .name = "tx", .irq = 59 },
2373 { .name = "rx", .irq = 60 }, 2373 { .name = "rx", .irq = 60 },
2374 { .irq = -1 }
2374}; 2375};
2375 2376
2376static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { 2377static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = {
@@ -2406,7 +2407,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
2406 .name = "mcbsp1", 2407 .name = "mcbsp1",
2407 .class = &omap3xxx_mcbsp_hwmod_class, 2408 .class = &omap3xxx_mcbsp_hwmod_class,
2408 .mpu_irqs = omap3xxx_mcbsp1_irqs, 2409 .mpu_irqs = omap3xxx_mcbsp1_irqs,
2409 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs),
2410 .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, 2410 .sdma_reqs = omap3xxx_mcbsp1_sdma_chs,
2411 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), 2411 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs),
2412 .main_clk = "mcbsp1_fck", 2412 .main_clk = "mcbsp1_fck",
@@ -2429,6 +2429,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = {
2429 { .name = "irq", .irq = 17 }, 2429 { .name = "irq", .irq = 17 },
2430 { .name = "tx", .irq = 62 }, 2430 { .name = "tx", .irq = 62 },
2431 { .name = "rx", .irq = 63 }, 2431 { .name = "rx", .irq = 63 },
2432 { .irq = -1 }
2432}; 2433};
2433 2434
2434static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { 2435static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = {
@@ -2469,7 +2470,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
2469 .name = "mcbsp2", 2470 .name = "mcbsp2",
2470 .class = &omap3xxx_mcbsp_hwmod_class, 2471 .class = &omap3xxx_mcbsp_hwmod_class,
2471 .mpu_irqs = omap3xxx_mcbsp2_irqs, 2472 .mpu_irqs = omap3xxx_mcbsp2_irqs,
2472 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs),
2473 .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, 2473 .sdma_reqs = omap3xxx_mcbsp2_sdma_chs,
2474 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), 2474 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs),
2475 .main_clk = "mcbsp2_fck", 2475 .main_clk = "mcbsp2_fck",
@@ -2493,6 +2493,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = {
2493 { .name = "irq", .irq = 22 }, 2493 { .name = "irq", .irq = 22 },
2494 { .name = "tx", .irq = 89 }, 2494 { .name = "tx", .irq = 89 },
2495 { .name = "rx", .irq = 90 }, 2495 { .name = "rx", .irq = 90 },
2496 { .irq = -1 }
2496}; 2497};
2497 2498
2498static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { 2499static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = {
@@ -2532,7 +2533,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
2532 .name = "mcbsp3", 2533 .name = "mcbsp3",
2533 .class = &omap3xxx_mcbsp_hwmod_class, 2534 .class = &omap3xxx_mcbsp_hwmod_class,
2534 .mpu_irqs = omap3xxx_mcbsp3_irqs, 2535 .mpu_irqs = omap3xxx_mcbsp3_irqs,
2535 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs),
2536 .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, 2536 .sdma_reqs = omap3xxx_mcbsp3_sdma_chs,
2537 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), 2537 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs),
2538 .main_clk = "mcbsp3_fck", 2538 .main_clk = "mcbsp3_fck",
@@ -2556,6 +2556,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = {
2556 { .name = "irq", .irq = 23 }, 2556 { .name = "irq", .irq = 23 },
2557 { .name = "tx", .irq = 54 }, 2557 { .name = "tx", .irq = 54 },
2558 { .name = "rx", .irq = 55 }, 2558 { .name = "rx", .irq = 55 },
2559 { .irq = -1 }
2559}; 2560};
2560 2561
2561static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { 2562static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = {
@@ -2591,7 +2592,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
2591 .name = "mcbsp4", 2592 .name = "mcbsp4",
2592 .class = &omap3xxx_mcbsp_hwmod_class, 2593 .class = &omap3xxx_mcbsp_hwmod_class,
2593 .mpu_irqs = omap3xxx_mcbsp4_irqs, 2594 .mpu_irqs = omap3xxx_mcbsp4_irqs,
2594 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs),
2595 .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, 2595 .sdma_reqs = omap3xxx_mcbsp4_sdma_chs,
2596 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), 2596 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs),
2597 .main_clk = "mcbsp4_fck", 2597 .main_clk = "mcbsp4_fck",
@@ -2614,6 +2614,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = {
2614 { .name = "irq", .irq = 27 }, 2614 { .name = "irq", .irq = 27 },
2615 { .name = "tx", .irq = 81 }, 2615 { .name = "tx", .irq = 81 },
2616 { .name = "rx", .irq = 82 }, 2616 { .name = "rx", .irq = 82 },
2617 { .irq = -1 }
2617}; 2618};
2618 2619
2619static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { 2620static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = {
@@ -2649,7 +2650,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
2649 .name = "mcbsp5", 2650 .name = "mcbsp5",
2650 .class = &omap3xxx_mcbsp_hwmod_class, 2651 .class = &omap3xxx_mcbsp_hwmod_class,
2651 .mpu_irqs = omap3xxx_mcbsp5_irqs, 2652 .mpu_irqs = omap3xxx_mcbsp5_irqs,
2652 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs),
2653 .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, 2653 .sdma_reqs = omap3xxx_mcbsp5_sdma_chs,
2654 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), 2654 .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs),
2655 .main_clk = "mcbsp5_fck", 2655 .main_clk = "mcbsp5_fck",
@@ -2682,6 +2682,7 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = {
2682/* mcbsp2_sidetone */ 2682/* mcbsp2_sidetone */
2683static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = { 2683static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = {
2684 { .name = "irq", .irq = 4 }, 2684 { .name = "irq", .irq = 4 },
2685 { .irq = -1 }
2685}; 2686};
2686 2687
2687static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { 2688static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = {
@@ -2712,7 +2713,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
2712 .name = "mcbsp2_sidetone", 2713 .name = "mcbsp2_sidetone",
2713 .class = &omap3xxx_mcbsp_sidetone_hwmod_class, 2714 .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
2714 .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, 2715 .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs,
2715 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs),
2716 .main_clk = "mcbsp2_fck", 2716 .main_clk = "mcbsp2_fck",
2717 .prcm = { 2717 .prcm = {
2718 .omap2 = { 2718 .omap2 = {
@@ -2731,6 +2731,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
2731/* mcbsp3_sidetone */ 2731/* mcbsp3_sidetone */
2732static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = { 2732static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = {
2733 { .name = "irq", .irq = 5 }, 2733 { .name = "irq", .irq = 5 },
2734 { .irq = -1 }
2734}; 2735};
2735 2736
2736static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { 2737static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = {
@@ -2761,7 +2762,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
2761 .name = "mcbsp3_sidetone", 2762 .name = "mcbsp3_sidetone",
2762 .class = &omap3xxx_mcbsp_sidetone_hwmod_class, 2763 .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
2763 .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, 2764 .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs,
2764 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs),
2765 .main_clk = "mcbsp3_fck", 2765 .main_clk = "mcbsp3_fck",
2766 .prcm = { 2766 .prcm = {
2767 .omap2 = { 2767 .omap2 = {
@@ -2931,6 +2931,7 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = {
2931static struct omap_hwmod omap3xxx_mailbox_hwmod; 2931static struct omap_hwmod omap3xxx_mailbox_hwmod;
2932static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { 2932static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = {
2933 { .irq = 26 }, 2933 { .irq = 26 },
2934 { .irq = -1 }
2934}; 2935};
2935 2936
2936static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { 2937static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = {
@@ -2959,7 +2960,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
2959 .name = "mailbox", 2960 .name = "mailbox",
2960 .class = &omap3xxx_mailbox_hwmod_class, 2961 .class = &omap3xxx_mailbox_hwmod_class,
2961 .mpu_irqs = omap3xxx_mailbox_irqs, 2962 .mpu_irqs = omap3xxx_mailbox_irqs,
2962 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mailbox_irqs),
2963 .main_clk = "mailboxes_ick", 2963 .main_clk = "mailboxes_ick",
2964 .prcm = { 2964 .prcm = {
2965 .omap2 = { 2965 .omap2 = {
@@ -3046,6 +3046,7 @@ static struct omap_hwmod_class omap34xx_mcspi_class = {
3046/* mcspi1 */ 3046/* mcspi1 */
3047static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { 3047static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = {
3048 { .name = "irq", .irq = 65 }, 3048 { .name = "irq", .irq = 65 },
3049 { .irq = -1 }
3049}; 3050};
3050 3051
3051static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { 3052static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = {
@@ -3070,7 +3071,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = {
3070static struct omap_hwmod omap34xx_mcspi1 = { 3071static struct omap_hwmod omap34xx_mcspi1 = {
3071 .name = "mcspi1", 3072 .name = "mcspi1",
3072 .mpu_irqs = omap34xx_mcspi1_mpu_irqs, 3073 .mpu_irqs = omap34xx_mcspi1_mpu_irqs,
3073 .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_mpu_irqs),
3074 .sdma_reqs = omap34xx_mcspi1_sdma_reqs, 3074 .sdma_reqs = omap34xx_mcspi1_sdma_reqs,
3075 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), 3075 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs),
3076 .main_clk = "mcspi1_fck", 3076 .main_clk = "mcspi1_fck",
@@ -3093,6 +3093,7 @@ static struct omap_hwmod omap34xx_mcspi1 = {
3093/* mcspi2 */ 3093/* mcspi2 */
3094static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { 3094static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = {
3095 { .name = "irq", .irq = 66 }, 3095 { .name = "irq", .irq = 66 },
3096 { .irq = -1 }
3096}; 3097};
3097 3098
3098static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { 3099static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = {
@@ -3113,7 +3114,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = {
3113static struct omap_hwmod omap34xx_mcspi2 = { 3114static struct omap_hwmod omap34xx_mcspi2 = {
3114 .name = "mcspi2", 3115 .name = "mcspi2",
3115 .mpu_irqs = omap34xx_mcspi2_mpu_irqs, 3116 .mpu_irqs = omap34xx_mcspi2_mpu_irqs,
3116 .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_mpu_irqs),
3117 .sdma_reqs = omap34xx_mcspi2_sdma_reqs, 3117 .sdma_reqs = omap34xx_mcspi2_sdma_reqs,
3118 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), 3118 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs),
3119 .main_clk = "mcspi2_fck", 3119 .main_clk = "mcspi2_fck",
@@ -3136,6 +3136,7 @@ static struct omap_hwmod omap34xx_mcspi2 = {
3136/* mcspi3 */ 3136/* mcspi3 */
3137static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = { 3137static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = {
3138 { .name = "irq", .irq = 91 }, /* 91 */ 3138 { .name = "irq", .irq = 91 }, /* 91 */
3139 { .irq = -1 }
3139}; 3140};
3140 3141
3141static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { 3142static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = {
@@ -3156,7 +3157,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = {
3156static struct omap_hwmod omap34xx_mcspi3 = { 3157static struct omap_hwmod omap34xx_mcspi3 = {
3157 .name = "mcspi3", 3158 .name = "mcspi3",
3158 .mpu_irqs = omap34xx_mcspi3_mpu_irqs, 3159 .mpu_irqs = omap34xx_mcspi3_mpu_irqs,
3159 .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_mpu_irqs),
3160 .sdma_reqs = omap34xx_mcspi3_sdma_reqs, 3160 .sdma_reqs = omap34xx_mcspi3_sdma_reqs,
3161 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), 3161 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs),
3162 .main_clk = "mcspi3_fck", 3162 .main_clk = "mcspi3_fck",
@@ -3179,6 +3179,7 @@ static struct omap_hwmod omap34xx_mcspi3 = {
3179/* SPI4 */ 3179/* SPI4 */
3180static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { 3180static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = {
3181 { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */ 3181 { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */
3182 { .irq = -1 }
3182}; 3183};
3183 3184
3184static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { 3185static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = {
@@ -3197,7 +3198,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = {
3197static struct omap_hwmod omap34xx_mcspi4 = { 3198static struct omap_hwmod omap34xx_mcspi4 = {
3198 .name = "mcspi4", 3199 .name = "mcspi4",
3199 .mpu_irqs = omap34xx_mcspi4_mpu_irqs, 3200 .mpu_irqs = omap34xx_mcspi4_mpu_irqs,
3200 .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_mpu_irqs),
3201 .sdma_reqs = omap34xx_mcspi4_sdma_reqs, 3201 .sdma_reqs = omap34xx_mcspi4_sdma_reqs,
3202 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), 3202 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs),
3203 .main_clk = "mcspi4_fck", 3203 .main_clk = "mcspi4_fck",
@@ -3241,12 +3241,12 @@ static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = {
3241 3241
3242 { .name = "mc", .irq = 92 }, 3242 { .name = "mc", .irq = 92 },
3243 { .name = "dma", .irq = 93 }, 3243 { .name = "dma", .irq = 93 },
3244 { .irq = -1 }
3244}; 3245};
3245 3246
3246static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { 3247static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
3247 .name = "usb_otg_hs", 3248 .name = "usb_otg_hs",
3248 .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, 3249 .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs,
3249 .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs),
3250 .main_clk = "hsotgusb_ick", 3250 .main_clk = "hsotgusb_ick",
3251 .prcm = { 3251 .prcm = {
3252 .omap2 = { 3252 .omap2 = {
@@ -3278,6 +3278,7 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
3278static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = { 3278static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = {
3279 3279
3280 { .name = "mc", .irq = 71 }, 3280 { .name = "mc", .irq = 71 },
3281 { .irq = -1 }
3281}; 3282};
3282 3283
3283static struct omap_hwmod_class am35xx_usbotg_class = { 3284static struct omap_hwmod_class am35xx_usbotg_class = {
@@ -3288,7 +3289,6 @@ static struct omap_hwmod_class am35xx_usbotg_class = {
3288static struct omap_hwmod am35xx_usbhsotg_hwmod = { 3289static struct omap_hwmod am35xx_usbhsotg_hwmod = {
3289 .name = "am35x_otg_hs", 3290 .name = "am35x_otg_hs",
3290 .mpu_irqs = am35xx_usbhsotg_mpu_irqs, 3291 .mpu_irqs = am35xx_usbhsotg_mpu_irqs,
3291 .mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs),
3292 .main_clk = NULL, 3292 .main_clk = NULL,
3293 .prcm = { 3293 .prcm = {
3294 .omap2 = { 3294 .omap2 = {
@@ -3324,6 +3324,7 @@ static struct omap_hwmod_class omap34xx_mmc_class = {
3324 3324
3325static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { 3325static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = {
3326 { .irq = 83, }, 3326 { .irq = 83, },
3327 { .irq = -1 }
3327}; 3328};
3328 3329
3329static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { 3330static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = {
@@ -3346,7 +3347,6 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
3346static struct omap_hwmod omap3xxx_mmc1_hwmod = { 3347static struct omap_hwmod omap3xxx_mmc1_hwmod = {
3347 .name = "mmc1", 3348 .name = "mmc1",
3348 .mpu_irqs = omap34xx_mmc1_mpu_irqs, 3349 .mpu_irqs = omap34xx_mmc1_mpu_irqs,
3349 .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc1_mpu_irqs),
3350 .sdma_reqs = omap34xx_mmc1_sdma_reqs, 3350 .sdma_reqs = omap34xx_mmc1_sdma_reqs,
3351 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), 3351 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs),
3352 .opt_clks = omap34xx_mmc1_opt_clks, 3352 .opt_clks = omap34xx_mmc1_opt_clks,
@@ -3372,6 +3372,7 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = {
3372 3372
3373static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { 3373static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = {
3374 { .irq = INT_24XX_MMC2_IRQ, }, 3374 { .irq = INT_24XX_MMC2_IRQ, },
3375 { .irq = -1 }
3375}; 3376};
3376 3377
3377static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { 3378static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = {
@@ -3390,7 +3391,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {
3390static struct omap_hwmod omap3xxx_mmc2_hwmod = { 3391static struct omap_hwmod omap3xxx_mmc2_hwmod = {
3391 .name = "mmc2", 3392 .name = "mmc2",
3392 .mpu_irqs = omap34xx_mmc2_mpu_irqs, 3393 .mpu_irqs = omap34xx_mmc2_mpu_irqs,
3393 .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc2_mpu_irqs),
3394 .sdma_reqs = omap34xx_mmc2_sdma_reqs, 3394 .sdma_reqs = omap34xx_mmc2_sdma_reqs,
3395 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), 3395 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs),
3396 .opt_clks = omap34xx_mmc2_opt_clks, 3396 .opt_clks = omap34xx_mmc2_opt_clks,
@@ -3415,6 +3415,7 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = {
3415 3415
3416static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { 3416static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = {
3417 { .irq = 94, }, 3417 { .irq = 94, },
3418 { .irq = -1 }
3418}; 3419};
3419 3420
3420static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { 3421static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = {
@@ -3433,7 +3434,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = {
3433static struct omap_hwmod omap3xxx_mmc3_hwmod = { 3434static struct omap_hwmod omap3xxx_mmc3_hwmod = {
3434 .name = "mmc3", 3435 .name = "mmc3",
3435 .mpu_irqs = omap34xx_mmc3_mpu_irqs, 3436 .mpu_irqs = omap34xx_mmc3_mpu_irqs,
3436 .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc3_mpu_irqs),
3437 .sdma_reqs = omap34xx_mmc3_sdma_reqs, 3437 .sdma_reqs = omap34xx_mmc3_sdma_reqs,
3438 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), 3438 .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs),
3439 .opt_clks = omap34xx_mmc3_opt_clks, 3439 .opt_clks = omap34xx_mmc3_opt_clks,
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 81fd313bb1ad..bbfc4db664b3 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -115,6 +115,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = {
115 115
116static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { 116static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {
117 { .irq = 113 + OMAP44XX_IRQ_GIC_START }, 117 { .irq = 113 + OMAP44XX_IRQ_GIC_START },
118 { .irq = -1 }
118}; 119};
119 120
120static struct omap_hwmod omap44xx_dmm_hwmod = { 121static struct omap_hwmod omap44xx_dmm_hwmod = {
@@ -123,7 +124,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = {
123 .slaves = omap44xx_dmm_slaves, 124 .slaves = omap44xx_dmm_slaves,
124 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), 125 .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves),
125 .mpu_irqs = omap44xx_dmm_irqs, 126 .mpu_irqs = omap44xx_dmm_irqs,
126 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmm_irqs),
127 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 127 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
128}; 128};
129 129
@@ -268,6 +268,7 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = {
268static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { 268static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = {
269 { .irq = 9 + OMAP44XX_IRQ_GIC_START }, 269 { .irq = 9 + OMAP44XX_IRQ_GIC_START },
270 { .irq = 10 + OMAP44XX_IRQ_GIC_START }, 270 { .irq = 10 + OMAP44XX_IRQ_GIC_START },
271 { .irq = -1 }
271}; 272};
272 273
273static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { 274static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = {
@@ -303,7 +304,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
303 .name = "l3_main_1", 304 .name = "l3_main_1",
304 .class = &omap44xx_l3_hwmod_class, 305 .class = &omap44xx_l3_hwmod_class,
305 .mpu_irqs = omap44xx_l3_targ_irqs, 306 .mpu_irqs = omap44xx_l3_targ_irqs,
306 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_l3_targ_irqs),
307 .slaves = omap44xx_l3_main_1_slaves, 307 .slaves = omap44xx_l3_main_1_slaves,
308 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), 308 .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
309 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 309 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
@@ -672,6 +672,7 @@ static struct omap_hwmod_class omap44xx_aess_hwmod_class = {
672/* aess */ 672/* aess */
673static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = { 673static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = {
674 { .irq = 99 + OMAP44XX_IRQ_GIC_START }, 674 { .irq = 99 + OMAP44XX_IRQ_GIC_START },
675 { .irq = -1 }
675}; 676};
676 677
677static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { 678static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = {
@@ -736,7 +737,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
736 .name = "aess", 737 .name = "aess",
737 .class = &omap44xx_aess_hwmod_class, 738 .class = &omap44xx_aess_hwmod_class,
738 .mpu_irqs = omap44xx_aess_irqs, 739 .mpu_irqs = omap44xx_aess_irqs,
739 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_aess_irqs),
740 .sdma_reqs = omap44xx_aess_sdma_reqs, 740 .sdma_reqs = omap44xx_aess_sdma_reqs,
741 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), 741 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs),
742 .main_clk = "aess_fck", 742 .main_clk = "aess_fck",
@@ -875,6 +875,7 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = {
875 { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START }, 875 { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START },
876 { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START }, 876 { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START },
877 { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START }, 877 { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START },
878 { .irq = -1 }
878}; 879};
879 880
880/* dma_system master ports */ 881/* dma_system master ports */
@@ -909,7 +910,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
909 .name = "dma_system", 910 .name = "dma_system",
910 .class = &omap44xx_dma_hwmod_class, 911 .class = &omap44xx_dma_hwmod_class,
911 .mpu_irqs = omap44xx_dma_system_irqs, 912 .mpu_irqs = omap44xx_dma_system_irqs,
912 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs),
913 .main_clk = "l3_div_ck", 913 .main_clk = "l3_div_ck",
914 .prcm = { 914 .prcm = {
915 .omap4 = { 915 .omap4 = {
@@ -948,6 +948,7 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = {
948static struct omap_hwmod omap44xx_dmic_hwmod; 948static struct omap_hwmod omap44xx_dmic_hwmod;
949static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { 949static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = {
950 { .irq = 114 + OMAP44XX_IRQ_GIC_START }, 950 { .irq = 114 + OMAP44XX_IRQ_GIC_START },
951 { .irq = -1 }
951}; 952};
952 953
953static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { 954static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {
@@ -1000,7 +1001,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
1000 .name = "dmic", 1001 .name = "dmic",
1001 .class = &omap44xx_dmic_hwmod_class, 1002 .class = &omap44xx_dmic_hwmod_class,
1002 .mpu_irqs = omap44xx_dmic_irqs, 1003 .mpu_irqs = omap44xx_dmic_irqs,
1003 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmic_irqs),
1004 .sdma_reqs = omap44xx_dmic_sdma_reqs, 1004 .sdma_reqs = omap44xx_dmic_sdma_reqs,
1005 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), 1005 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs),
1006 .main_clk = "dmic_fck", 1006 .main_clk = "dmic_fck",
@@ -1026,6 +1026,7 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = {
1026/* dsp */ 1026/* dsp */
1027static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = { 1027static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = {
1028 { .irq = 28 + OMAP44XX_IRQ_GIC_START }, 1028 { .irq = 28 + OMAP44XX_IRQ_GIC_START },
1029 { .irq = -1 }
1029}; 1030};
1030 1031
1031static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = { 1032static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = {
@@ -1082,7 +1083,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
1082 .name = "dsp", 1083 .name = "dsp",
1083 .class = &omap44xx_dsp_hwmod_class, 1084 .class = &omap44xx_dsp_hwmod_class,
1084 .mpu_irqs = omap44xx_dsp_irqs, 1085 .mpu_irqs = omap44xx_dsp_irqs,
1085 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dsp_irqs),
1086 .rst_lines = omap44xx_dsp_resets, 1086 .rst_lines = omap44xx_dsp_resets,
1087 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), 1087 .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets),
1088 .main_clk = "dsp_fck", 1088 .main_clk = "dsp_fck",
@@ -1215,6 +1215,7 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = {
1215static struct omap_hwmod omap44xx_dss_dispc_hwmod; 1215static struct omap_hwmod omap44xx_dss_dispc_hwmod;
1216static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { 1216static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = {
1217 { .irq = 25 + OMAP44XX_IRQ_GIC_START }, 1217 { .irq = 25 + OMAP44XX_IRQ_GIC_START },
1218 { .irq = -1 }
1218}; 1219};
1219 1220
1220static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { 1221static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = {
@@ -1267,7 +1268,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
1267 .name = "dss_dispc", 1268 .name = "dss_dispc",
1268 .class = &omap44xx_dispc_hwmod_class, 1269 .class = &omap44xx_dispc_hwmod_class,
1269 .mpu_irqs = omap44xx_dss_dispc_irqs, 1270 .mpu_irqs = omap44xx_dss_dispc_irqs,
1270 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs),
1271 .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, 1271 .sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
1272 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), 1272 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs),
1273 .main_clk = "dss_fck", 1273 .main_clk = "dss_fck",
@@ -1306,6 +1306,7 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = {
1306static struct omap_hwmod omap44xx_dss_dsi1_hwmod; 1306static struct omap_hwmod omap44xx_dss_dsi1_hwmod;
1307static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { 1307static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = {
1308 { .irq = 53 + OMAP44XX_IRQ_GIC_START }, 1308 { .irq = 53 + OMAP44XX_IRQ_GIC_START },
1309 { .irq = -1 }
1309}; 1310};
1310 1311
1311static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { 1312static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = {
@@ -1358,7 +1359,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
1358 .name = "dss_dsi1", 1359 .name = "dss_dsi1",
1359 .class = &omap44xx_dsi_hwmod_class, 1360 .class = &omap44xx_dsi_hwmod_class,
1360 .mpu_irqs = omap44xx_dss_dsi1_irqs, 1361 .mpu_irqs = omap44xx_dss_dsi1_irqs,
1361 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs),
1362 .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, 1362 .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
1363 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), 1363 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs),
1364 .main_clk = "dss_fck", 1364 .main_clk = "dss_fck",
@@ -1376,6 +1376,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
1376static struct omap_hwmod omap44xx_dss_dsi2_hwmod; 1376static struct omap_hwmod omap44xx_dss_dsi2_hwmod;
1377static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { 1377static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = {
1378 { .irq = 84 + OMAP44XX_IRQ_GIC_START }, 1378 { .irq = 84 + OMAP44XX_IRQ_GIC_START },
1379 { .irq = -1 }
1379}; 1380};
1380 1381
1381static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { 1382static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = {
@@ -1428,7 +1429,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
1428 .name = "dss_dsi2", 1429 .name = "dss_dsi2",
1429 .class = &omap44xx_dsi_hwmod_class, 1430 .class = &omap44xx_dsi_hwmod_class,
1430 .mpu_irqs = omap44xx_dss_dsi2_irqs, 1431 .mpu_irqs = omap44xx_dss_dsi2_irqs,
1431 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs),
1432 .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, 1432 .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
1433 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), 1433 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs),
1434 .main_clk = "dss_fck", 1434 .main_clk = "dss_fck",
@@ -1466,6 +1466,7 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = {
1466static struct omap_hwmod omap44xx_dss_hdmi_hwmod; 1466static struct omap_hwmod omap44xx_dss_hdmi_hwmod;
1467static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { 1467static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = {
1468 { .irq = 101 + OMAP44XX_IRQ_GIC_START }, 1468 { .irq = 101 + OMAP44XX_IRQ_GIC_START },
1469 { .irq = -1 }
1469}; 1470};
1470 1471
1471static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { 1472static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = {
@@ -1518,7 +1519,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
1518 .name = "dss_hdmi", 1519 .name = "dss_hdmi",
1519 .class = &omap44xx_hdmi_hwmod_class, 1520 .class = &omap44xx_hdmi_hwmod_class,
1520 .mpu_irqs = omap44xx_dss_hdmi_irqs, 1521 .mpu_irqs = omap44xx_dss_hdmi_irqs,
1521 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs),
1522 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, 1522 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
1523 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), 1523 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs),
1524 .main_clk = "dss_fck", 1524 .main_clk = "dss_fck",
@@ -1716,6 +1716,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
1716static struct omap_hwmod omap44xx_gpio1_hwmod; 1716static struct omap_hwmod omap44xx_gpio1_hwmod;
1717static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = { 1717static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = {
1718 { .irq = 29 + OMAP44XX_IRQ_GIC_START }, 1718 { .irq = 29 + OMAP44XX_IRQ_GIC_START },
1719 { .irq = -1 }
1719}; 1720};
1720 1721
1721static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { 1722static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = {
@@ -1749,7 +1750,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
1749 .name = "gpio1", 1750 .name = "gpio1",
1750 .class = &omap44xx_gpio_hwmod_class, 1751 .class = &omap44xx_gpio_hwmod_class,
1751 .mpu_irqs = omap44xx_gpio1_irqs, 1752 .mpu_irqs = omap44xx_gpio1_irqs,
1752 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio1_irqs),
1753 .main_clk = "gpio1_ick", 1753 .main_clk = "gpio1_ick",
1754 .prcm = { 1754 .prcm = {
1755 .omap4 = { 1755 .omap4 = {
@@ -1768,6 +1768,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
1768static struct omap_hwmod omap44xx_gpio2_hwmod; 1768static struct omap_hwmod omap44xx_gpio2_hwmod;
1769static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = { 1769static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = {
1770 { .irq = 30 + OMAP44XX_IRQ_GIC_START }, 1770 { .irq = 30 + OMAP44XX_IRQ_GIC_START },
1771 { .irq = -1 }
1771}; 1772};
1772 1773
1773static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { 1774static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = {
@@ -1802,7 +1803,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
1802 .class = &omap44xx_gpio_hwmod_class, 1803 .class = &omap44xx_gpio_hwmod_class,
1803 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1804 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1804 .mpu_irqs = omap44xx_gpio2_irqs, 1805 .mpu_irqs = omap44xx_gpio2_irqs,
1805 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs),
1806 .main_clk = "gpio2_ick", 1806 .main_clk = "gpio2_ick",
1807 .prcm = { 1807 .prcm = {
1808 .omap4 = { 1808 .omap4 = {
@@ -1821,6 +1821,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
1821static struct omap_hwmod omap44xx_gpio3_hwmod; 1821static struct omap_hwmod omap44xx_gpio3_hwmod;
1822static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = { 1822static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = {
1823 { .irq = 31 + OMAP44XX_IRQ_GIC_START }, 1823 { .irq = 31 + OMAP44XX_IRQ_GIC_START },
1824 { .irq = -1 }
1824}; 1825};
1825 1826
1826static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { 1827static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = {
@@ -1855,7 +1856,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
1855 .class = &omap44xx_gpio_hwmod_class, 1856 .class = &omap44xx_gpio_hwmod_class,
1856 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1857 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1857 .mpu_irqs = omap44xx_gpio3_irqs, 1858 .mpu_irqs = omap44xx_gpio3_irqs,
1858 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs),
1859 .main_clk = "gpio3_ick", 1859 .main_clk = "gpio3_ick",
1860 .prcm = { 1860 .prcm = {
1861 .omap4 = { 1861 .omap4 = {
@@ -1874,6 +1874,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
1874static struct omap_hwmod omap44xx_gpio4_hwmod; 1874static struct omap_hwmod omap44xx_gpio4_hwmod;
1875static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = { 1875static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = {
1876 { .irq = 32 + OMAP44XX_IRQ_GIC_START }, 1876 { .irq = 32 + OMAP44XX_IRQ_GIC_START },
1877 { .irq = -1 }
1877}; 1878};
1878 1879
1879static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { 1880static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = {
@@ -1908,7 +1909,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
1908 .class = &omap44xx_gpio_hwmod_class, 1909 .class = &omap44xx_gpio_hwmod_class,
1909 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1910 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1910 .mpu_irqs = omap44xx_gpio4_irqs, 1911 .mpu_irqs = omap44xx_gpio4_irqs,
1911 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs),
1912 .main_clk = "gpio4_ick", 1912 .main_clk = "gpio4_ick",
1913 .prcm = { 1913 .prcm = {
1914 .omap4 = { 1914 .omap4 = {
@@ -1927,6 +1927,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
1927static struct omap_hwmod omap44xx_gpio5_hwmod; 1927static struct omap_hwmod omap44xx_gpio5_hwmod;
1928static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = { 1928static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = {
1929 { .irq = 33 + OMAP44XX_IRQ_GIC_START }, 1929 { .irq = 33 + OMAP44XX_IRQ_GIC_START },
1930 { .irq = -1 }
1930}; 1931};
1931 1932
1932static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { 1933static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = {
@@ -1961,7 +1962,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
1961 .class = &omap44xx_gpio_hwmod_class, 1962 .class = &omap44xx_gpio_hwmod_class,
1962 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1963 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
1963 .mpu_irqs = omap44xx_gpio5_irqs, 1964 .mpu_irqs = omap44xx_gpio5_irqs,
1964 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs),
1965 .main_clk = "gpio5_ick", 1965 .main_clk = "gpio5_ick",
1966 .prcm = { 1966 .prcm = {
1967 .omap4 = { 1967 .omap4 = {
@@ -1980,6 +1980,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
1980static struct omap_hwmod omap44xx_gpio6_hwmod; 1980static struct omap_hwmod omap44xx_gpio6_hwmod;
1981static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = { 1981static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = {
1982 { .irq = 34 + OMAP44XX_IRQ_GIC_START }, 1982 { .irq = 34 + OMAP44XX_IRQ_GIC_START },
1983 { .irq = -1 }
1983}; 1984};
1984 1985
1985static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { 1986static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = {
@@ -2014,7 +2015,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
2014 .class = &omap44xx_gpio_hwmod_class, 2015 .class = &omap44xx_gpio_hwmod_class,
2015 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2016 .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
2016 .mpu_irqs = omap44xx_gpio6_irqs, 2017 .mpu_irqs = omap44xx_gpio6_irqs,
2017 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs),
2018 .main_clk = "gpio6_ick", 2018 .main_clk = "gpio6_ick",
2019 .prcm = { 2019 .prcm = {
2020 .omap4 = { 2020 .omap4 = {
@@ -2058,6 +2058,7 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = {
2058 { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START }, 2058 { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START },
2059 { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START }, 2059 { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START },
2060 { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START }, 2060 { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START },
2061 { .irq = -1 }
2061}; 2062};
2062 2063
2063/* hsi master ports */ 2064/* hsi master ports */
@@ -2092,7 +2093,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {
2092 .name = "hsi", 2093 .name = "hsi",
2093 .class = &omap44xx_hsi_hwmod_class, 2094 .class = &omap44xx_hsi_hwmod_class,
2094 .mpu_irqs = omap44xx_hsi_irqs, 2095 .mpu_irqs = omap44xx_hsi_irqs,
2095 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_hsi_irqs),
2096 .main_clk = "hsi_fck", 2096 .main_clk = "hsi_fck",
2097 .prcm = { 2097 .prcm = {
2098 .omap4 = { 2098 .omap4 = {
@@ -2131,6 +2131,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = {
2131static struct omap_hwmod omap44xx_i2c1_hwmod; 2131static struct omap_hwmod omap44xx_i2c1_hwmod;
2132static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { 2132static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = {
2133 { .irq = 56 + OMAP44XX_IRQ_GIC_START }, 2133 { .irq = 56 + OMAP44XX_IRQ_GIC_START },
2134 { .irq = -1 }
2134}; 2135};
2135 2136
2136static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { 2137static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {
@@ -2166,7 +2167,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
2166 .class = &omap44xx_i2c_hwmod_class, 2167 .class = &omap44xx_i2c_hwmod_class,
2167 .flags = HWMOD_INIT_NO_RESET, 2168 .flags = HWMOD_INIT_NO_RESET,
2168 .mpu_irqs = omap44xx_i2c1_irqs, 2169 .mpu_irqs = omap44xx_i2c1_irqs,
2169 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs),
2170 .sdma_reqs = omap44xx_i2c1_sdma_reqs, 2170 .sdma_reqs = omap44xx_i2c1_sdma_reqs,
2171 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), 2171 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs),
2172 .main_clk = "i2c1_fck", 2172 .main_clk = "i2c1_fck",
@@ -2184,6 +2184,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
2184static struct omap_hwmod omap44xx_i2c2_hwmod; 2184static struct omap_hwmod omap44xx_i2c2_hwmod;
2185static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { 2185static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = {
2186 { .irq = 57 + OMAP44XX_IRQ_GIC_START }, 2186 { .irq = 57 + OMAP44XX_IRQ_GIC_START },
2187 { .irq = -1 }
2187}; 2188};
2188 2189
2189static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { 2190static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = {
@@ -2219,7 +2220,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
2219 .class = &omap44xx_i2c_hwmod_class, 2220 .class = &omap44xx_i2c_hwmod_class,
2220 .flags = HWMOD_INIT_NO_RESET, 2221 .flags = HWMOD_INIT_NO_RESET,
2221 .mpu_irqs = omap44xx_i2c2_irqs, 2222 .mpu_irqs = omap44xx_i2c2_irqs,
2222 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs),
2223 .sdma_reqs = omap44xx_i2c2_sdma_reqs, 2223 .sdma_reqs = omap44xx_i2c2_sdma_reqs,
2224 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), 2224 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs),
2225 .main_clk = "i2c2_fck", 2225 .main_clk = "i2c2_fck",
@@ -2237,6 +2237,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
2237static struct omap_hwmod omap44xx_i2c3_hwmod; 2237static struct omap_hwmod omap44xx_i2c3_hwmod;
2238static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { 2238static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = {
2239 { .irq = 61 + OMAP44XX_IRQ_GIC_START }, 2239 { .irq = 61 + OMAP44XX_IRQ_GIC_START },
2240 { .irq = -1 }
2240}; 2241};
2241 2242
2242static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { 2243static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = {
@@ -2272,7 +2273,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
2272 .class = &omap44xx_i2c_hwmod_class, 2273 .class = &omap44xx_i2c_hwmod_class,
2273 .flags = HWMOD_INIT_NO_RESET, 2274 .flags = HWMOD_INIT_NO_RESET,
2274 .mpu_irqs = omap44xx_i2c3_irqs, 2275 .mpu_irqs = omap44xx_i2c3_irqs,
2275 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs),
2276 .sdma_reqs = omap44xx_i2c3_sdma_reqs, 2276 .sdma_reqs = omap44xx_i2c3_sdma_reqs,
2277 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), 2277 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs),
2278 .main_clk = "i2c3_fck", 2278 .main_clk = "i2c3_fck",
@@ -2290,6 +2290,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
2290static struct omap_hwmod omap44xx_i2c4_hwmod; 2290static struct omap_hwmod omap44xx_i2c4_hwmod;
2291static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { 2291static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = {
2292 { .irq = 62 + OMAP44XX_IRQ_GIC_START }, 2292 { .irq = 62 + OMAP44XX_IRQ_GIC_START },
2293 { .irq = -1 }
2293}; 2294};
2294 2295
2295static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { 2296static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = {
@@ -2325,7 +2326,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
2325 .class = &omap44xx_i2c_hwmod_class, 2326 .class = &omap44xx_i2c_hwmod_class,
2326 .flags = HWMOD_INIT_NO_RESET, 2327 .flags = HWMOD_INIT_NO_RESET,
2327 .mpu_irqs = omap44xx_i2c4_irqs, 2328 .mpu_irqs = omap44xx_i2c4_irqs,
2328 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs),
2329 .sdma_reqs = omap44xx_i2c4_sdma_reqs, 2329 .sdma_reqs = omap44xx_i2c4_sdma_reqs,
2330 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), 2330 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs),
2331 .main_clk = "i2c4_fck", 2331 .main_clk = "i2c4_fck",
@@ -2351,6 +2351,7 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = {
2351/* ipu */ 2351/* ipu */
2352static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = { 2352static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = {
2353 { .irq = 100 + OMAP44XX_IRQ_GIC_START }, 2353 { .irq = 100 + OMAP44XX_IRQ_GIC_START },
2354 { .irq = -1 }
2354}; 2355};
2355 2356
2356static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = { 2357static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = {
@@ -2417,7 +2418,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
2417 .name = "ipu", 2418 .name = "ipu",
2418 .class = &omap44xx_ipu_hwmod_class, 2419 .class = &omap44xx_ipu_hwmod_class,
2419 .mpu_irqs = omap44xx_ipu_irqs, 2420 .mpu_irqs = omap44xx_ipu_irqs,
2420 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ipu_irqs),
2421 .rst_lines = omap44xx_ipu_resets, 2421 .rst_lines = omap44xx_ipu_resets,
2422 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), 2422 .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets),
2423 .main_clk = "ipu_fck", 2423 .main_clk = "ipu_fck",
@@ -2458,6 +2458,7 @@ static struct omap_hwmod_class omap44xx_iss_hwmod_class = {
2458/* iss */ 2458/* iss */
2459static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = { 2459static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = {
2460 { .irq = 24 + OMAP44XX_IRQ_GIC_START }, 2460 { .irq = 24 + OMAP44XX_IRQ_GIC_START },
2461 { .irq = -1 }
2461}; 2462};
2462 2463
2463static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { 2464static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = {
@@ -2503,7 +2504,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
2503 .name = "iss", 2504 .name = "iss",
2504 .class = &omap44xx_iss_hwmod_class, 2505 .class = &omap44xx_iss_hwmod_class,
2505 .mpu_irqs = omap44xx_iss_irqs, 2506 .mpu_irqs = omap44xx_iss_irqs,
2506 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iss_irqs),
2507 .sdma_reqs = omap44xx_iss_sdma_reqs, 2507 .sdma_reqs = omap44xx_iss_sdma_reqs,
2508 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), 2508 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs),
2509 .main_clk = "iss_fck", 2509 .main_clk = "iss_fck",
@@ -2535,6 +2535,7 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = {
2535 { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START }, 2535 { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START },
2536 { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START }, 2536 { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START },
2537 { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START }, 2537 { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START },
2538 { .irq = -1 }
2538}; 2539};
2539 2540
2540static struct omap_hwmod_rst_info omap44xx_iva_resets[] = { 2541static struct omap_hwmod_rst_info omap44xx_iva_resets[] = {
@@ -2613,7 +2614,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
2613 .name = "iva", 2614 .name = "iva",
2614 .class = &omap44xx_iva_hwmod_class, 2615 .class = &omap44xx_iva_hwmod_class,
2615 .mpu_irqs = omap44xx_iva_irqs, 2616 .mpu_irqs = omap44xx_iva_irqs,
2616 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iva_irqs),
2617 .rst_lines = omap44xx_iva_resets, 2617 .rst_lines = omap44xx_iva_resets,
2618 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), 2618 .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets),
2619 .main_clk = "iva_fck", 2619 .main_clk = "iva_fck",
@@ -2656,6 +2656,7 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = {
2656static struct omap_hwmod omap44xx_kbd_hwmod; 2656static struct omap_hwmod omap44xx_kbd_hwmod;
2657static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = { 2657static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = {
2658 { .irq = 120 + OMAP44XX_IRQ_GIC_START }, 2658 { .irq = 120 + OMAP44XX_IRQ_GIC_START },
2659 { .irq = -1 }
2659}; 2660};
2660 2661
2661static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { 2662static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = {
@@ -2685,7 +2686,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {
2685 .name = "kbd", 2686 .name = "kbd",
2686 .class = &omap44xx_kbd_hwmod_class, 2687 .class = &omap44xx_kbd_hwmod_class,
2687 .mpu_irqs = omap44xx_kbd_irqs, 2688 .mpu_irqs = omap44xx_kbd_irqs,
2688 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_kbd_irqs),
2689 .main_clk = "kbd_fck", 2689 .main_clk = "kbd_fck",
2690 .prcm = { 2690 .prcm = {
2691 .omap4 = { 2691 .omap4 = {
@@ -2721,6 +2721,7 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = {
2721static struct omap_hwmod omap44xx_mailbox_hwmod; 2721static struct omap_hwmod omap44xx_mailbox_hwmod;
2722static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = { 2722static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = {
2723 { .irq = 26 + OMAP44XX_IRQ_GIC_START }, 2723 { .irq = 26 + OMAP44XX_IRQ_GIC_START },
2724 { .irq = -1 }
2724}; 2725};
2725 2726
2726static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { 2727static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = {
@@ -2750,7 +2751,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = {
2750 .name = "mailbox", 2751 .name = "mailbox",
2751 .class = &omap44xx_mailbox_hwmod_class, 2752 .class = &omap44xx_mailbox_hwmod_class,
2752 .mpu_irqs = omap44xx_mailbox_irqs, 2753 .mpu_irqs = omap44xx_mailbox_irqs,
2753 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs),
2754 .prcm = { 2754 .prcm = {
2755 .omap4 = { 2755 .omap4 = {
2756 .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, 2756 .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL,
@@ -2784,6 +2784,7 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
2784static struct omap_hwmod omap44xx_mcbsp1_hwmod; 2784static struct omap_hwmod omap44xx_mcbsp1_hwmod;
2785static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { 2785static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {
2786 { .irq = 17 + OMAP44XX_IRQ_GIC_START }, 2786 { .irq = 17 + OMAP44XX_IRQ_GIC_START },
2787 { .irq = -1 }
2787}; 2788};
2788 2789
2789static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { 2790static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
@@ -2839,7 +2840,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
2839 .name = "mcbsp1", 2840 .name = "mcbsp1",
2840 .class = &omap44xx_mcbsp_hwmod_class, 2841 .class = &omap44xx_mcbsp_hwmod_class,
2841 .mpu_irqs = omap44xx_mcbsp1_irqs, 2842 .mpu_irqs = omap44xx_mcbsp1_irqs,
2842 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs),
2843 .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, 2843 .sdma_reqs = omap44xx_mcbsp1_sdma_reqs,
2844 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), 2844 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs),
2845 .main_clk = "mcbsp1_fck", 2845 .main_clk = "mcbsp1_fck",
@@ -2857,6 +2857,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
2857static struct omap_hwmod omap44xx_mcbsp2_hwmod; 2857static struct omap_hwmod omap44xx_mcbsp2_hwmod;
2858static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { 2858static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = {
2859 { .irq = 22 + OMAP44XX_IRQ_GIC_START }, 2859 { .irq = 22 + OMAP44XX_IRQ_GIC_START },
2860 { .irq = -1 }
2860}; 2861};
2861 2862
2862static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { 2863static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
@@ -2912,7 +2913,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
2912 .name = "mcbsp2", 2913 .name = "mcbsp2",
2913 .class = &omap44xx_mcbsp_hwmod_class, 2914 .class = &omap44xx_mcbsp_hwmod_class,
2914 .mpu_irqs = omap44xx_mcbsp2_irqs, 2915 .mpu_irqs = omap44xx_mcbsp2_irqs,
2915 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs),
2916 .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, 2916 .sdma_reqs = omap44xx_mcbsp2_sdma_reqs,
2917 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), 2917 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs),
2918 .main_clk = "mcbsp2_fck", 2918 .main_clk = "mcbsp2_fck",
@@ -2930,6 +2930,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
2930static struct omap_hwmod omap44xx_mcbsp3_hwmod; 2930static struct omap_hwmod omap44xx_mcbsp3_hwmod;
2931static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { 2931static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = {
2932 { .irq = 23 + OMAP44XX_IRQ_GIC_START }, 2932 { .irq = 23 + OMAP44XX_IRQ_GIC_START },
2933 { .irq = -1 }
2933}; 2934};
2934 2935
2935static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { 2936static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
@@ -2985,7 +2986,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
2985 .name = "mcbsp3", 2986 .name = "mcbsp3",
2986 .class = &omap44xx_mcbsp_hwmod_class, 2987 .class = &omap44xx_mcbsp_hwmod_class,
2987 .mpu_irqs = omap44xx_mcbsp3_irqs, 2988 .mpu_irqs = omap44xx_mcbsp3_irqs,
2988 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs),
2989 .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, 2989 .sdma_reqs = omap44xx_mcbsp3_sdma_reqs,
2990 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), 2990 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs),
2991 .main_clk = "mcbsp3_fck", 2991 .main_clk = "mcbsp3_fck",
@@ -3003,6 +3003,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
3003static struct omap_hwmod omap44xx_mcbsp4_hwmod; 3003static struct omap_hwmod omap44xx_mcbsp4_hwmod;
3004static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { 3004static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {
3005 { .irq = 16 + OMAP44XX_IRQ_GIC_START }, 3005 { .irq = 16 + OMAP44XX_IRQ_GIC_START },
3006 { .irq = -1 }
3006}; 3007};
3007 3008
3008static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { 3009static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
@@ -3037,7 +3038,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
3037 .name = "mcbsp4", 3038 .name = "mcbsp4",
3038 .class = &omap44xx_mcbsp_hwmod_class, 3039 .class = &omap44xx_mcbsp_hwmod_class,
3039 .mpu_irqs = omap44xx_mcbsp4_irqs, 3040 .mpu_irqs = omap44xx_mcbsp4_irqs,
3040 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs),
3041 .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, 3041 .sdma_reqs = omap44xx_mcbsp4_sdma_reqs,
3042 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), 3042 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs),
3043 .main_clk = "mcbsp4_fck", 3043 .main_clk = "mcbsp4_fck",
@@ -3076,6 +3076,7 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = {
3076static struct omap_hwmod omap44xx_mcpdm_hwmod; 3076static struct omap_hwmod omap44xx_mcpdm_hwmod;
3077static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { 3077static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = {
3078 { .irq = 112 + OMAP44XX_IRQ_GIC_START }, 3078 { .irq = 112 + OMAP44XX_IRQ_GIC_START },
3079 { .irq = -1 }
3079}; 3080};
3080 3081
3081static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { 3082static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = {
@@ -3129,7 +3130,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
3129 .name = "mcpdm", 3130 .name = "mcpdm",
3130 .class = &omap44xx_mcpdm_hwmod_class, 3131 .class = &omap44xx_mcpdm_hwmod_class,
3131 .mpu_irqs = omap44xx_mcpdm_irqs, 3132 .mpu_irqs = omap44xx_mcpdm_irqs,
3132 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_irqs),
3133 .sdma_reqs = omap44xx_mcpdm_sdma_reqs, 3133 .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
3134 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), 3134 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs),
3135 .main_clk = "mcpdm_fck", 3135 .main_clk = "mcpdm_fck",
@@ -3169,6 +3169,7 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = {
3169static struct omap_hwmod omap44xx_mcspi1_hwmod; 3169static struct omap_hwmod omap44xx_mcspi1_hwmod;
3170static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = { 3170static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = {
3171 { .irq = 65 + OMAP44XX_IRQ_GIC_START }, 3171 { .irq = 65 + OMAP44XX_IRQ_GIC_START },
3172 { .irq = -1 }
3172}; 3173};
3173 3174
3174static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { 3175static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = {
@@ -3214,7 +3215,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
3214 .name = "mcspi1", 3215 .name = "mcspi1",
3215 .class = &omap44xx_mcspi_hwmod_class, 3216 .class = &omap44xx_mcspi_hwmod_class,
3216 .mpu_irqs = omap44xx_mcspi1_irqs, 3217 .mpu_irqs = omap44xx_mcspi1_irqs,
3217 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_irqs),
3218 .sdma_reqs = omap44xx_mcspi1_sdma_reqs, 3218 .sdma_reqs = omap44xx_mcspi1_sdma_reqs,
3219 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), 3219 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs),
3220 .main_clk = "mcspi1_fck", 3220 .main_clk = "mcspi1_fck",
@@ -3233,6 +3233,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
3233static struct omap_hwmod omap44xx_mcspi2_hwmod; 3233static struct omap_hwmod omap44xx_mcspi2_hwmod;
3234static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = { 3234static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = {
3235 { .irq = 66 + OMAP44XX_IRQ_GIC_START }, 3235 { .irq = 66 + OMAP44XX_IRQ_GIC_START },
3236 { .irq = -1 }
3236}; 3237};
3237 3238
3238static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { 3239static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = {
@@ -3274,7 +3275,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
3274 .name = "mcspi2", 3275 .name = "mcspi2",
3275 .class = &omap44xx_mcspi_hwmod_class, 3276 .class = &omap44xx_mcspi_hwmod_class,
3276 .mpu_irqs = omap44xx_mcspi2_irqs, 3277 .mpu_irqs = omap44xx_mcspi2_irqs,
3277 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_irqs),
3278 .sdma_reqs = omap44xx_mcspi2_sdma_reqs, 3278 .sdma_reqs = omap44xx_mcspi2_sdma_reqs,
3279 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), 3279 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs),
3280 .main_clk = "mcspi2_fck", 3280 .main_clk = "mcspi2_fck",
@@ -3293,6 +3293,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
3293static struct omap_hwmod omap44xx_mcspi3_hwmod; 3293static struct omap_hwmod omap44xx_mcspi3_hwmod;
3294static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = { 3294static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = {
3295 { .irq = 91 + OMAP44XX_IRQ_GIC_START }, 3295 { .irq = 91 + OMAP44XX_IRQ_GIC_START },
3296 { .irq = -1 }
3296}; 3297};
3297 3298
3298static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { 3299static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = {
@@ -3334,7 +3335,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
3334 .name = "mcspi3", 3335 .name = "mcspi3",
3335 .class = &omap44xx_mcspi_hwmod_class, 3336 .class = &omap44xx_mcspi_hwmod_class,
3336 .mpu_irqs = omap44xx_mcspi3_irqs, 3337 .mpu_irqs = omap44xx_mcspi3_irqs,
3337 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_irqs),
3338 .sdma_reqs = omap44xx_mcspi3_sdma_reqs, 3338 .sdma_reqs = omap44xx_mcspi3_sdma_reqs,
3339 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), 3339 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs),
3340 .main_clk = "mcspi3_fck", 3340 .main_clk = "mcspi3_fck",
@@ -3353,6 +3353,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
3353static struct omap_hwmod omap44xx_mcspi4_hwmod; 3353static struct omap_hwmod omap44xx_mcspi4_hwmod;
3354static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { 3354static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = {
3355 { .irq = 48 + OMAP44XX_IRQ_GIC_START }, 3355 { .irq = 48 + OMAP44XX_IRQ_GIC_START },
3356 { .irq = -1 }
3356}; 3357};
3357 3358
3358static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { 3359static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = {
@@ -3392,7 +3393,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
3392 .name = "mcspi4", 3393 .name = "mcspi4",
3393 .class = &omap44xx_mcspi_hwmod_class, 3394 .class = &omap44xx_mcspi_hwmod_class,
3394 .mpu_irqs = omap44xx_mcspi4_irqs, 3395 .mpu_irqs = omap44xx_mcspi4_irqs,
3395 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_irqs),
3396 .sdma_reqs = omap44xx_mcspi4_sdma_reqs, 3396 .sdma_reqs = omap44xx_mcspi4_sdma_reqs,
3397 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), 3397 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs),
3398 .main_clk = "mcspi4_fck", 3398 .main_clk = "mcspi4_fck",
@@ -3433,6 +3433,7 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = {
3433 3433
3434static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { 3434static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = {
3435 { .irq = 83 + OMAP44XX_IRQ_GIC_START }, 3435 { .irq = 83 + OMAP44XX_IRQ_GIC_START },
3436 { .irq = -1 }
3436}; 3437};
3437 3438
3438static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { 3439static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = {
@@ -3477,7 +3478,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
3477 .name = "mmc1", 3478 .name = "mmc1",
3478 .class = &omap44xx_mmc_hwmod_class, 3479 .class = &omap44xx_mmc_hwmod_class,
3479 .mpu_irqs = omap44xx_mmc1_irqs, 3480 .mpu_irqs = omap44xx_mmc1_irqs,
3480 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs),
3481 .sdma_reqs = omap44xx_mmc1_sdma_reqs, 3481 .sdma_reqs = omap44xx_mmc1_sdma_reqs,
3482 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), 3482 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs),
3483 .main_clk = "mmc1_fck", 3483 .main_clk = "mmc1_fck",
@@ -3497,6 +3497,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
3497/* mmc2 */ 3497/* mmc2 */
3498static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { 3498static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = {
3499 { .irq = 86 + OMAP44XX_IRQ_GIC_START }, 3499 { .irq = 86 + OMAP44XX_IRQ_GIC_START },
3500 { .irq = -1 }
3500}; 3501};
3501 3502
3502static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { 3503static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = {
@@ -3536,7 +3537,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
3536 .name = "mmc2", 3537 .name = "mmc2",
3537 .class = &omap44xx_mmc_hwmod_class, 3538 .class = &omap44xx_mmc_hwmod_class,
3538 .mpu_irqs = omap44xx_mmc2_irqs, 3539 .mpu_irqs = omap44xx_mmc2_irqs,
3539 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs),
3540 .sdma_reqs = omap44xx_mmc2_sdma_reqs, 3540 .sdma_reqs = omap44xx_mmc2_sdma_reqs,
3541 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), 3541 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs),
3542 .main_clk = "mmc2_fck", 3542 .main_clk = "mmc2_fck",
@@ -3556,6 +3556,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
3556static struct omap_hwmod omap44xx_mmc3_hwmod; 3556static struct omap_hwmod omap44xx_mmc3_hwmod;
3557static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { 3557static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = {
3558 { .irq = 94 + OMAP44XX_IRQ_GIC_START }, 3558 { .irq = 94 + OMAP44XX_IRQ_GIC_START },
3559 { .irq = -1 }
3559}; 3560};
3560 3561
3561static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { 3562static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = {
@@ -3590,7 +3591,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
3590 .name = "mmc3", 3591 .name = "mmc3",
3591 .class = &omap44xx_mmc_hwmod_class, 3592 .class = &omap44xx_mmc_hwmod_class,
3592 .mpu_irqs = omap44xx_mmc3_irqs, 3593 .mpu_irqs = omap44xx_mmc3_irqs,
3593 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs),
3594 .sdma_reqs = omap44xx_mmc3_sdma_reqs, 3594 .sdma_reqs = omap44xx_mmc3_sdma_reqs,
3595 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), 3595 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs),
3596 .main_clk = "mmc3_fck", 3596 .main_clk = "mmc3_fck",
@@ -3608,6 +3608,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
3608static struct omap_hwmod omap44xx_mmc4_hwmod; 3608static struct omap_hwmod omap44xx_mmc4_hwmod;
3609static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { 3609static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = {
3610 { .irq = 96 + OMAP44XX_IRQ_GIC_START }, 3610 { .irq = 96 + OMAP44XX_IRQ_GIC_START },
3611 { .irq = -1 }
3611}; 3612};
3612 3613
3613static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { 3614static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = {
@@ -3642,7 +3643,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
3642 .name = "mmc4", 3643 .name = "mmc4",
3643 .class = &omap44xx_mmc_hwmod_class, 3644 .class = &omap44xx_mmc_hwmod_class,
3644 .mpu_irqs = omap44xx_mmc4_irqs, 3645 .mpu_irqs = omap44xx_mmc4_irqs,
3645 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs), 3646
3646 .sdma_reqs = omap44xx_mmc4_sdma_reqs, 3647 .sdma_reqs = omap44xx_mmc4_sdma_reqs,
3647 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), 3648 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs),
3648 .main_clk = "mmc4_fck", 3649 .main_clk = "mmc4_fck",
@@ -3660,6 +3661,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
3660static struct omap_hwmod omap44xx_mmc5_hwmod; 3661static struct omap_hwmod omap44xx_mmc5_hwmod;
3661static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { 3662static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = {
3662 { .irq = 59 + OMAP44XX_IRQ_GIC_START }, 3663 { .irq = 59 + OMAP44XX_IRQ_GIC_START },
3664 { .irq = -1 }
3663}; 3665};
3664 3666
3665static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { 3667static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = {
@@ -3694,7 +3696,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
3694 .name = "mmc5", 3696 .name = "mmc5",
3695 .class = &omap44xx_mmc_hwmod_class, 3697 .class = &omap44xx_mmc_hwmod_class,
3696 .mpu_irqs = omap44xx_mmc5_irqs, 3698 .mpu_irqs = omap44xx_mmc5_irqs,
3697 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs),
3698 .sdma_reqs = omap44xx_mmc5_sdma_reqs, 3699 .sdma_reqs = omap44xx_mmc5_sdma_reqs,
3699 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), 3700 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs),
3700 .main_clk = "mmc5_fck", 3701 .main_clk = "mmc5_fck",
@@ -3722,6 +3723,7 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = {
3722 { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START }, 3723 { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START },
3723 { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START }, 3724 { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START },
3724 { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START }, 3725 { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START },
3726 { .irq = -1 }
3725}; 3727};
3726 3728
3727/* mpu master ports */ 3729/* mpu master ports */
@@ -3736,7 +3738,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
3736 .class = &omap44xx_mpu_hwmod_class, 3738 .class = &omap44xx_mpu_hwmod_class,
3737 .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), 3739 .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
3738 .mpu_irqs = omap44xx_mpu_irqs, 3740 .mpu_irqs = omap44xx_mpu_irqs,
3739 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mpu_irqs),
3740 .main_clk = "dpll_mpu_m2_ck", 3741 .main_clk = "dpll_mpu_m2_ck",
3741 .prcm = { 3742 .prcm = {
3742 .omap4 = { 3743 .omap4 = {
@@ -3778,6 +3779,7 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = {
3778static struct omap_hwmod omap44xx_smartreflex_core_hwmod; 3779static struct omap_hwmod omap44xx_smartreflex_core_hwmod;
3779static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { 3780static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = {
3780 { .irq = 19 + OMAP44XX_IRQ_GIC_START }, 3781 { .irq = 19 + OMAP44XX_IRQ_GIC_START },
3782 { .irq = -1 }
3781}; 3783};
3782 3784
3783static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { 3785static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = {
@@ -3807,7 +3809,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
3807 .name = "smartreflex_core", 3809 .name = "smartreflex_core",
3808 .class = &omap44xx_smartreflex_hwmod_class, 3810 .class = &omap44xx_smartreflex_hwmod_class,
3809 .mpu_irqs = omap44xx_smartreflex_core_irqs, 3811 .mpu_irqs = omap44xx_smartreflex_core_irqs,
3810 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs), 3812
3811 .main_clk = "smartreflex_core_fck", 3813 .main_clk = "smartreflex_core_fck",
3812 .vdd_name = "core", 3814 .vdd_name = "core",
3813 .prcm = { 3815 .prcm = {
@@ -3824,6 +3826,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
3824static struct omap_hwmod omap44xx_smartreflex_iva_hwmod; 3826static struct omap_hwmod omap44xx_smartreflex_iva_hwmod;
3825static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { 3827static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = {
3826 { .irq = 102 + OMAP44XX_IRQ_GIC_START }, 3828 { .irq = 102 + OMAP44XX_IRQ_GIC_START },
3829 { .irq = -1 }
3827}; 3830};
3828 3831
3829static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { 3832static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = {
@@ -3853,7 +3856,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
3853 .name = "smartreflex_iva", 3856 .name = "smartreflex_iva",
3854 .class = &omap44xx_smartreflex_hwmod_class, 3857 .class = &omap44xx_smartreflex_hwmod_class,
3855 .mpu_irqs = omap44xx_smartreflex_iva_irqs, 3858 .mpu_irqs = omap44xx_smartreflex_iva_irqs,
3856 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs),
3857 .main_clk = "smartreflex_iva_fck", 3859 .main_clk = "smartreflex_iva_fck",
3858 .vdd_name = "iva", 3860 .vdd_name = "iva",
3859 .prcm = { 3861 .prcm = {
@@ -3870,6 +3872,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
3870static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod; 3872static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod;
3871static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { 3873static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = {
3872 { .irq = 18 + OMAP44XX_IRQ_GIC_START }, 3874 { .irq = 18 + OMAP44XX_IRQ_GIC_START },
3875 { .irq = -1 }
3873}; 3876};
3874 3877
3875static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { 3878static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = {
@@ -3899,7 +3902,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
3899 .name = "smartreflex_mpu", 3902 .name = "smartreflex_mpu",
3900 .class = &omap44xx_smartreflex_hwmod_class, 3903 .class = &omap44xx_smartreflex_hwmod_class,
3901 .mpu_irqs = omap44xx_smartreflex_mpu_irqs, 3904 .mpu_irqs = omap44xx_smartreflex_mpu_irqs,
3902 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs),
3903 .main_clk = "smartreflex_mpu_fck", 3905 .main_clk = "smartreflex_mpu_fck",
3904 .vdd_name = "mpu", 3906 .vdd_name = "mpu",
3905 .prcm = { 3907 .prcm = {
@@ -4015,6 +4017,7 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = {
4015static struct omap_hwmod omap44xx_timer1_hwmod; 4017static struct omap_hwmod omap44xx_timer1_hwmod;
4016static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { 4018static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = {
4017 { .irq = 37 + OMAP44XX_IRQ_GIC_START }, 4019 { .irq = 37 + OMAP44XX_IRQ_GIC_START },
4020 { .irq = -1 }
4018}; 4021};
4019 4022
4020static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { 4023static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = {
@@ -4044,7 +4047,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
4044 .name = "timer1", 4047 .name = "timer1",
4045 .class = &omap44xx_timer_1ms_hwmod_class, 4048 .class = &omap44xx_timer_1ms_hwmod_class,
4046 .mpu_irqs = omap44xx_timer1_irqs, 4049 .mpu_irqs = omap44xx_timer1_irqs,
4047 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs),
4048 .main_clk = "timer1_fck", 4050 .main_clk = "timer1_fck",
4049 .prcm = { 4051 .prcm = {
4050 .omap4 = { 4052 .omap4 = {
@@ -4060,6 +4062,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
4060static struct omap_hwmod omap44xx_timer2_hwmod; 4062static struct omap_hwmod omap44xx_timer2_hwmod;
4061static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = { 4063static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = {
4062 { .irq = 38 + OMAP44XX_IRQ_GIC_START }, 4064 { .irq = 38 + OMAP44XX_IRQ_GIC_START },
4065 { .irq = -1 }
4063}; 4066};
4064 4067
4065static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { 4068static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = {
@@ -4089,7 +4092,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
4089 .name = "timer2", 4092 .name = "timer2",
4090 .class = &omap44xx_timer_1ms_hwmod_class, 4093 .class = &omap44xx_timer_1ms_hwmod_class,
4091 .mpu_irqs = omap44xx_timer2_irqs, 4094 .mpu_irqs = omap44xx_timer2_irqs,
4092 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer2_irqs),
4093 .main_clk = "timer2_fck", 4095 .main_clk = "timer2_fck",
4094 .prcm = { 4096 .prcm = {
4095 .omap4 = { 4097 .omap4 = {
@@ -4105,6 +4107,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
4105static struct omap_hwmod omap44xx_timer3_hwmod; 4107static struct omap_hwmod omap44xx_timer3_hwmod;
4106static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = { 4108static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = {
4107 { .irq = 39 + OMAP44XX_IRQ_GIC_START }, 4109 { .irq = 39 + OMAP44XX_IRQ_GIC_START },
4110 { .irq = -1 }
4108}; 4111};
4109 4112
4110static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { 4113static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = {
@@ -4134,7 +4137,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
4134 .name = "timer3", 4137 .name = "timer3",
4135 .class = &omap44xx_timer_hwmod_class, 4138 .class = &omap44xx_timer_hwmod_class,
4136 .mpu_irqs = omap44xx_timer3_irqs, 4139 .mpu_irqs = omap44xx_timer3_irqs,
4137 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer3_irqs),
4138 .main_clk = "timer3_fck", 4140 .main_clk = "timer3_fck",
4139 .prcm = { 4141 .prcm = {
4140 .omap4 = { 4142 .omap4 = {
@@ -4150,6 +4152,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
4150static struct omap_hwmod omap44xx_timer4_hwmod; 4152static struct omap_hwmod omap44xx_timer4_hwmod;
4151static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = { 4153static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = {
4152 { .irq = 40 + OMAP44XX_IRQ_GIC_START }, 4154 { .irq = 40 + OMAP44XX_IRQ_GIC_START },
4155 { .irq = -1 }
4153}; 4156};
4154 4157
4155static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { 4158static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = {
@@ -4179,7 +4182,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
4179 .name = "timer4", 4182 .name = "timer4",
4180 .class = &omap44xx_timer_hwmod_class, 4183 .class = &omap44xx_timer_hwmod_class,
4181 .mpu_irqs = omap44xx_timer4_irqs, 4184 .mpu_irqs = omap44xx_timer4_irqs,
4182 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer4_irqs),
4183 .main_clk = "timer4_fck", 4185 .main_clk = "timer4_fck",
4184 .prcm = { 4186 .prcm = {
4185 .omap4 = { 4187 .omap4 = {
@@ -4195,6 +4197,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
4195static struct omap_hwmod omap44xx_timer5_hwmod; 4197static struct omap_hwmod omap44xx_timer5_hwmod;
4196static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = { 4198static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = {
4197 { .irq = 41 + OMAP44XX_IRQ_GIC_START }, 4199 { .irq = 41 + OMAP44XX_IRQ_GIC_START },
4200 { .irq = -1 }
4198}; 4201};
4199 4202
4200static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { 4203static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = {
@@ -4243,7 +4246,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
4243 .name = "timer5", 4246 .name = "timer5",
4244 .class = &omap44xx_timer_hwmod_class, 4247 .class = &omap44xx_timer_hwmod_class,
4245 .mpu_irqs = omap44xx_timer5_irqs, 4248 .mpu_irqs = omap44xx_timer5_irqs,
4246 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer5_irqs),
4247 .main_clk = "timer5_fck", 4249 .main_clk = "timer5_fck",
4248 .prcm = { 4250 .prcm = {
4249 .omap4 = { 4251 .omap4 = {
@@ -4259,6 +4261,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
4259static struct omap_hwmod omap44xx_timer6_hwmod; 4261static struct omap_hwmod omap44xx_timer6_hwmod;
4260static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = { 4262static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = {
4261 { .irq = 42 + OMAP44XX_IRQ_GIC_START }, 4263 { .irq = 42 + OMAP44XX_IRQ_GIC_START },
4264 { .irq = -1 }
4262}; 4265};
4263 4266
4264static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { 4267static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = {
@@ -4307,7 +4310,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
4307 .name = "timer6", 4310 .name = "timer6",
4308 .class = &omap44xx_timer_hwmod_class, 4311 .class = &omap44xx_timer_hwmod_class,
4309 .mpu_irqs = omap44xx_timer6_irqs, 4312 .mpu_irqs = omap44xx_timer6_irqs,
4310 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer6_irqs), 4313
4311 .main_clk = "timer6_fck", 4314 .main_clk = "timer6_fck",
4312 .prcm = { 4315 .prcm = {
4313 .omap4 = { 4316 .omap4 = {
@@ -4323,6 +4326,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
4323static struct omap_hwmod omap44xx_timer7_hwmod; 4326static struct omap_hwmod omap44xx_timer7_hwmod;
4324static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = { 4327static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = {
4325 { .irq = 43 + OMAP44XX_IRQ_GIC_START }, 4328 { .irq = 43 + OMAP44XX_IRQ_GIC_START },
4329 { .irq = -1 }
4326}; 4330};
4327 4331
4328static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { 4332static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = {
@@ -4371,7 +4375,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
4371 .name = "timer7", 4375 .name = "timer7",
4372 .class = &omap44xx_timer_hwmod_class, 4376 .class = &omap44xx_timer_hwmod_class,
4373 .mpu_irqs = omap44xx_timer7_irqs, 4377 .mpu_irqs = omap44xx_timer7_irqs,
4374 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer7_irqs),
4375 .main_clk = "timer7_fck", 4378 .main_clk = "timer7_fck",
4376 .prcm = { 4379 .prcm = {
4377 .omap4 = { 4380 .omap4 = {
@@ -4387,6 +4390,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
4387static struct omap_hwmod omap44xx_timer8_hwmod; 4390static struct omap_hwmod omap44xx_timer8_hwmod;
4388static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = { 4391static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = {
4389 { .irq = 44 + OMAP44XX_IRQ_GIC_START }, 4392 { .irq = 44 + OMAP44XX_IRQ_GIC_START },
4393 { .irq = -1 }
4390}; 4394};
4391 4395
4392static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { 4396static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = {
@@ -4435,7 +4439,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
4435 .name = "timer8", 4439 .name = "timer8",
4436 .class = &omap44xx_timer_hwmod_class, 4440 .class = &omap44xx_timer_hwmod_class,
4437 .mpu_irqs = omap44xx_timer8_irqs, 4441 .mpu_irqs = omap44xx_timer8_irqs,
4438 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer8_irqs),
4439 .main_clk = "timer8_fck", 4442 .main_clk = "timer8_fck",
4440 .prcm = { 4443 .prcm = {
4441 .omap4 = { 4444 .omap4 = {
@@ -4451,6 +4454,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
4451static struct omap_hwmod omap44xx_timer9_hwmod; 4454static struct omap_hwmod omap44xx_timer9_hwmod;
4452static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = { 4455static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = {
4453 { .irq = 45 + OMAP44XX_IRQ_GIC_START }, 4456 { .irq = 45 + OMAP44XX_IRQ_GIC_START },
4457 { .irq = -1 }
4454}; 4458};
4455 4459
4456static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { 4460static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = {
@@ -4480,7 +4484,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
4480 .name = "timer9", 4484 .name = "timer9",
4481 .class = &omap44xx_timer_hwmod_class, 4485 .class = &omap44xx_timer_hwmod_class,
4482 .mpu_irqs = omap44xx_timer9_irqs, 4486 .mpu_irqs = omap44xx_timer9_irqs,
4483 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer9_irqs),
4484 .main_clk = "timer9_fck", 4487 .main_clk = "timer9_fck",
4485 .prcm = { 4488 .prcm = {
4486 .omap4 = { 4489 .omap4 = {
@@ -4496,6 +4499,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
4496static struct omap_hwmod omap44xx_timer10_hwmod; 4499static struct omap_hwmod omap44xx_timer10_hwmod;
4497static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = { 4500static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = {
4498 { .irq = 46 + OMAP44XX_IRQ_GIC_START }, 4501 { .irq = 46 + OMAP44XX_IRQ_GIC_START },
4502 { .irq = -1 }
4499}; 4503};
4500 4504
4501static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { 4505static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = {
@@ -4525,7 +4529,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
4525 .name = "timer10", 4529 .name = "timer10",
4526 .class = &omap44xx_timer_1ms_hwmod_class, 4530 .class = &omap44xx_timer_1ms_hwmod_class,
4527 .mpu_irqs = omap44xx_timer10_irqs, 4531 .mpu_irqs = omap44xx_timer10_irqs,
4528 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer10_irqs),
4529 .main_clk = "timer10_fck", 4532 .main_clk = "timer10_fck",
4530 .prcm = { 4533 .prcm = {
4531 .omap4 = { 4534 .omap4 = {
@@ -4541,6 +4544,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
4541static struct omap_hwmod omap44xx_timer11_hwmod; 4544static struct omap_hwmod omap44xx_timer11_hwmod;
4542static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = { 4545static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = {
4543 { .irq = 47 + OMAP44XX_IRQ_GIC_START }, 4546 { .irq = 47 + OMAP44XX_IRQ_GIC_START },
4547 { .irq = -1 }
4544}; 4548};
4545 4549
4546static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { 4550static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = {
@@ -4570,7 +4574,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {
4570 .name = "timer11", 4574 .name = "timer11",
4571 .class = &omap44xx_timer_hwmod_class, 4575 .class = &omap44xx_timer_hwmod_class,
4572 .mpu_irqs = omap44xx_timer11_irqs, 4576 .mpu_irqs = omap44xx_timer11_irqs,
4573 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer11_irqs),
4574 .main_clk = "timer11_fck", 4577 .main_clk = "timer11_fck",
4575 .prcm = { 4578 .prcm = {
4576 .omap4 = { 4579 .omap4 = {
@@ -4608,6 +4611,7 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = {
4608static struct omap_hwmod omap44xx_uart1_hwmod; 4611static struct omap_hwmod omap44xx_uart1_hwmod;
4609static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { 4612static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = {
4610 { .irq = 72 + OMAP44XX_IRQ_GIC_START }, 4613 { .irq = 72 + OMAP44XX_IRQ_GIC_START },
4614 { .irq = -1 }
4611}; 4615};
4612 4616
4613static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { 4617static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = {
@@ -4642,7 +4646,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
4642 .name = "uart1", 4646 .name = "uart1",
4643 .class = &omap44xx_uart_hwmod_class, 4647 .class = &omap44xx_uart_hwmod_class,
4644 .mpu_irqs = omap44xx_uart1_irqs, 4648 .mpu_irqs = omap44xx_uart1_irqs,
4645 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs),
4646 .sdma_reqs = omap44xx_uart1_sdma_reqs, 4649 .sdma_reqs = omap44xx_uart1_sdma_reqs,
4647 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), 4650 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs),
4648 .main_clk = "uart1_fck", 4651 .main_clk = "uart1_fck",
@@ -4660,6 +4663,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
4660static struct omap_hwmod omap44xx_uart2_hwmod; 4663static struct omap_hwmod omap44xx_uart2_hwmod;
4661static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { 4664static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = {
4662 { .irq = 73 + OMAP44XX_IRQ_GIC_START }, 4665 { .irq = 73 + OMAP44XX_IRQ_GIC_START },
4666 { .irq = -1 }
4663}; 4667};
4664 4668
4665static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { 4669static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = {
@@ -4694,7 +4698,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
4694 .name = "uart2", 4698 .name = "uart2",
4695 .class = &omap44xx_uart_hwmod_class, 4699 .class = &omap44xx_uart_hwmod_class,
4696 .mpu_irqs = omap44xx_uart2_irqs, 4700 .mpu_irqs = omap44xx_uart2_irqs,
4697 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs),
4698 .sdma_reqs = omap44xx_uart2_sdma_reqs, 4701 .sdma_reqs = omap44xx_uart2_sdma_reqs,
4699 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), 4702 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs),
4700 .main_clk = "uart2_fck", 4703 .main_clk = "uart2_fck",
@@ -4712,6 +4715,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
4712static struct omap_hwmod omap44xx_uart3_hwmod; 4715static struct omap_hwmod omap44xx_uart3_hwmod;
4713static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { 4716static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = {
4714 { .irq = 74 + OMAP44XX_IRQ_GIC_START }, 4717 { .irq = 74 + OMAP44XX_IRQ_GIC_START },
4718 { .irq = -1 }
4715}; 4719};
4716 4720
4717static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { 4721static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = {
@@ -4747,7 +4751,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
4747 .class = &omap44xx_uart_hwmod_class, 4751 .class = &omap44xx_uart_hwmod_class,
4748 .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), 4752 .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
4749 .mpu_irqs = omap44xx_uart3_irqs, 4753 .mpu_irqs = omap44xx_uart3_irqs,
4750 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs),
4751 .sdma_reqs = omap44xx_uart3_sdma_reqs, 4754 .sdma_reqs = omap44xx_uart3_sdma_reqs,
4752 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), 4755 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs),
4753 .main_clk = "uart3_fck", 4756 .main_clk = "uart3_fck",
@@ -4765,6 +4768,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
4765static struct omap_hwmod omap44xx_uart4_hwmod; 4768static struct omap_hwmod omap44xx_uart4_hwmod;
4766static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { 4769static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = {
4767 { .irq = 70 + OMAP44XX_IRQ_GIC_START }, 4770 { .irq = 70 + OMAP44XX_IRQ_GIC_START },
4771 { .irq = -1 }
4768}; 4772};
4769 4773
4770static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { 4774static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = {
@@ -4799,7 +4803,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
4799 .name = "uart4", 4803 .name = "uart4",
4800 .class = &omap44xx_uart_hwmod_class, 4804 .class = &omap44xx_uart_hwmod_class,
4801 .mpu_irqs = omap44xx_uart4_irqs, 4805 .mpu_irqs = omap44xx_uart4_irqs,
4802 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs),
4803 .sdma_reqs = omap44xx_uart4_sdma_reqs, 4806 .sdma_reqs = omap44xx_uart4_sdma_reqs,
4804 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), 4807 .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs),
4805 .main_clk = "uart4_fck", 4808 .main_clk = "uart4_fck",
@@ -4840,6 +4843,7 @@ static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = {
4840static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = { 4843static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = {
4841 { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START }, 4844 { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START },
4842 { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START }, 4845 { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START },
4846 { .irq = -1 }
4843}; 4847};
4844 4848
4845/* usb_otg_hs master ports */ 4849/* usb_otg_hs master ports */
@@ -4879,7 +4883,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
4879 .class = &omap44xx_usb_otg_hs_hwmod_class, 4883 .class = &omap44xx_usb_otg_hs_hwmod_class,
4880 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, 4884 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
4881 .mpu_irqs = omap44xx_usb_otg_hs_irqs, 4885 .mpu_irqs = omap44xx_usb_otg_hs_irqs,
4882 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs),
4883 .main_clk = "usb_otg_hs_ick", 4886 .main_clk = "usb_otg_hs_ick",
4884 .prcm = { 4887 .prcm = {
4885 .omap4 = { 4888 .omap4 = {
@@ -4922,6 +4925,7 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = {
4922static struct omap_hwmod omap44xx_wd_timer2_hwmod; 4925static struct omap_hwmod omap44xx_wd_timer2_hwmod;
4923static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = { 4926static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = {
4924 { .irq = 80 + OMAP44XX_IRQ_GIC_START }, 4927 { .irq = 80 + OMAP44XX_IRQ_GIC_START },
4928 { .irq = -1 }
4925}; 4929};
4926 4930
4927static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { 4931static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
@@ -4951,7 +4955,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
4951 .name = "wd_timer2", 4955 .name = "wd_timer2",
4952 .class = &omap44xx_wd_timer_hwmod_class, 4956 .class = &omap44xx_wd_timer_hwmod_class,
4953 .mpu_irqs = omap44xx_wd_timer2_irqs, 4957 .mpu_irqs = omap44xx_wd_timer2_irqs,
4954 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs),
4955 .main_clk = "wd_timer2_fck", 4958 .main_clk = "wd_timer2_fck",
4956 .prcm = { 4959 .prcm = {
4957 .omap4 = { 4960 .omap4 = {
@@ -4967,6 +4970,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
4967static struct omap_hwmod omap44xx_wd_timer3_hwmod; 4970static struct omap_hwmod omap44xx_wd_timer3_hwmod;
4968static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = { 4971static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = {
4969 { .irq = 36 + OMAP44XX_IRQ_GIC_START }, 4972 { .irq = 36 + OMAP44XX_IRQ_GIC_START },
4973 { .irq = -1 }
4970}; 4974};
4971 4975
4972static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { 4976static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = {
@@ -5015,7 +5019,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
5015 .name = "wd_timer3", 5019 .name = "wd_timer3",
5016 .class = &omap44xx_wd_timer_hwmod_class, 5020 .class = &omap44xx_wd_timer_hwmod_class,
5017 .mpu_irqs = omap44xx_wd_timer3_irqs, 5021 .mpu_irqs = omap44xx_wd_timer3_irqs,
5018 .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs),
5019 .main_clk = "wd_timer3_fck", 5022 .main_clk = "wd_timer3_fck",
5020 .prcm = { 5023 .prcm = {
5021 .omap4 = { 5024 .omap4 = {
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 523e0b585b6c..3bd6d1d9c0da 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -98,7 +98,7 @@ struct omap_hwmod_mux_info {
98/** 98/**
99 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod 99 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod
100 * @name: name of the IRQ channel (module local name) 100 * @name: name of the IRQ channel (module local name)
101 * @irq_ch: IRQ channel ID 101 * @irq: IRQ channel ID (should be non-negative except -1 = terminator)
102 * 102 *
103 * @name should be something short, e.g., "tx" or "rx". It is for use 103 * @name should be something short, e.g., "tx" or "rx". It is for use
104 * by platform_get_resource_byname(). It is defined locally to the 104 * by platform_get_resource_byname(). It is defined locally to the
@@ -106,7 +106,7 @@ struct omap_hwmod_mux_info {
106 */ 106 */
107struct omap_hwmod_irq_info { 107struct omap_hwmod_irq_info {
108 const char *name; 108 const char *name;
109 u16 irq; 109 s16 irq;
110}; 110};
111 111
112/** 112/**
@@ -466,7 +466,7 @@ struct omap_hwmod_class {
466 * @name: name of the hwmod 466 * @name: name of the hwmod
467 * @class: struct omap_hwmod_class * to the class of this hwmod 467 * @class: struct omap_hwmod_class * to the class of this hwmod
468 * @od: struct omap_device currently associated with this hwmod (internal use) 468 * @od: struct omap_device currently associated with this hwmod (internal use)
469 * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) 469 * @mpu_irqs: ptr to an array of MPU IRQs
470 * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) 470 * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt)
471 * @prcm: PRCM data pertaining to this hwmod 471 * @prcm: PRCM data pertaining to this hwmod
472 * @main_clk: main clock: OMAP clock name 472 * @main_clk: main clock: OMAP clock name
@@ -480,7 +480,6 @@ struct omap_hwmod_class {
480 * @_sysc_cache: internal-use hwmod flags 480 * @_sysc_cache: internal-use hwmod flags
481 * @_mpu_rt_va: cached register target start address (internal use) 481 * @_mpu_rt_va: cached register target start address (internal use)
482 * @_mpu_port_index: cached MPU register target slave ID (internal use) 482 * @_mpu_port_index: cached MPU register target slave ID (internal use)
483 * @mpu_irqs_cnt: number of @mpu_irqs
484 * @sdma_reqs_cnt: number of @sdma_reqs 483 * @sdma_reqs_cnt: number of @sdma_reqs
485 * @opt_clks_cnt: number of @opt_clks 484 * @opt_clks_cnt: number of @opt_clks
486 * @master_cnt: number of @master entries 485 * @master_cnt: number of @master entries
@@ -529,7 +528,6 @@ struct omap_hwmod {
529 u16 flags; 528 u16 flags;
530 u8 _mpu_port_index; 529 u8 _mpu_port_index;
531 u8 response_lat; 530 u8 response_lat;
532 u8 mpu_irqs_cnt;
533 u8 sdma_reqs_cnt; 531 u8 sdma_reqs_cnt;
534 u8 rst_lines_cnt; 532 u8 rst_lines_cnt;
535 u8 opt_clks_cnt; 533 u8 opt_clks_cnt;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 21:35:05 -0500