Merge tag 'imx-fixes-rc' of git://git.pengutronix.de/git/imx/linux-2.6 into fixes

From Sascha Hauer:

ARM i.MX fixes for v3.8-rc

This fixes a compile failure on imx_v4_v5_defconfig and a regression
introduced with enabling the MIPI clocks on i.MX51. Also one rather
cosmetic fix for the i.MX27 dts file.

* tag 'imx-fixes-rc' of git://git.pengutronix.de/git/imx/linux-2.6:
  ARM: imx: Move platform-mx2-emma to arch/arm/mach-imx/devices
  ARM i.MX51 clock: Fix regression since enabling MIPI/HSP clocks
  ARM: dts: mx27: Fix the AIPI bus for FEC

5 files changed, 39 insertions, 13 deletions

diff --git a/arch/arm/boot/dts/imx27-3ds.dts b/arch/arm/boot/dts/imx27-3ds.dts
index b01c0d745fc5..fa04c7b18bcb 100644
--- a/arch/arm/boot/dts/imx27-3ds.dts
+++ b/arch/arm/boot/dts/imx27-3ds.dts
@@ -21,17 +21,17 @@
         };
 
         soc {
-                aipi@10000000 { /* aipi */
-
+                aipi@10000000 { /* aipi1 */
                         uart1: serial@1000a000 {
                                 fsl,uart-has-rtscts;
                                 status = "okay";
                         };
+                };
 
-                        fec@1002b000 {
+                aipi@10020000 { /* aipi2 */
+                        ethernet@1002b000 {
                                 status = "okay";
                         };
                 };
         };
-
 };
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts
index af50469e34b2..53b0ec0c228e 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts
@@ -21,8 +21,7 @@
         };
 
         soc {
-                aipi@10000000 { /* aipi */
-
+                aipi@10000000 { /* aipi1 */
                         serial@1000a000 {
                                 fsl,uart-has-rtscts;
                                 status = "okay";
@@ -38,10 +37,6 @@
                                 status = "okay";
                         };
 
-                        ethernet@1002b000 {
-                                status = "okay";
-                        };
-
                         i2c@1001d000 {
                                 clock-frequency = <400000>;
                                 status = "okay";
@@ -60,6 +55,12 @@
                                 };
                         };
                 };
+
+                aipi@10020000 { /* aipi2 */
+                        ethernet@1002b000 {
+                                status = "okay";
+                        };
+                };
         };
 
         nor_flash@c0000000 {
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index b8d3905915ac..5a82cb5707a8 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -55,7 +55,7 @@
                         compatible = "fsl,aipi-bus", "simple-bus";
                         #address-cells = <1>;
                         #size-cells = <1>;
-                        reg = <0x10000000 0x10000000>;
+                        reg = <0x10000000 0x20000>;
                         ranges;
 
                         wdog: wdog@10002000 {
@@ -211,6 +211,15 @@
                                 status = "disabled";
                         };
 
+                };
+
+                aipi@10020000 { /* AIPI2 */
+                        compatible = "fsl,aipi-bus", "simple-bus";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x10020000 0x20000>;
+                        ranges;
+
                         fec: ethernet@1002b000 {
                                 compatible = "fsl,imx27-fec";
                                 reg = <0x1002b000 0x4000>;
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index e8c0473c7568..579023f59dc1 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -319,6 +319,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
                         unsigned long rate_ckih1, unsigned long rate_ckih2)
 {
         int i;
+        u32 val;
         struct device_node *np;
 
         clk[pll1_sw] = imx_clk_pllv2("pll1_sw", "osc", MX51_DPLL1_BASE);
@@ -390,6 +391,21 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
         imx_print_silicon_rev("i.MX51", mx51_revision());
         clk_disable_unprepare(clk[iim_gate]);
 
+        /*
+         * Reference Manual says: Functionality of CCDR[18] and CLPCR[23] is no
+         * longer supported. Set to one for better power saving.
+         *
+         * The effect of not setting these bits is that MIPI clocks can't be
+         * enabled without the IPU clock being enabled aswell.
+         */
+        val = readl(MXC_CCM_CCDR);
+        val |= 1 << 18;
+        writel(val, MXC_CCM_CCDR);
+
+        val = readl(MXC_CCM_CLPCR);
+        val |= 1 << 23;
+        writel(val, MXC_CCM_CLPCR);
+
         return 0;
 }
 
diff --git a/arch/arm/plat-mxc/devices/platform-mx2-emma.c b/arch/arm/mach-imx/devices/platform-mx2-emma.c
index 508404ddd4ea..11bd01d402f2 100644
--- a/arch/arm/plat-mxc/devices/platform-mx2-emma.c
+++ b/arch/arm/mach-imx/devices/platform-mx2-emma.c
@@ -6,8 +6,8 @@
  * the terms of the GNU General Public License version 2 as published by the
  * Free Software Foundation.
  */
-#include <mach/hardware.h>
-#include <mach/devices-common.h>
+#include "../hardware.h"
+#include "devices-common.h"
 
 #define imx_mx2_emmaprp_data_entry_single(soc)                          \
         {                                                               \