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authorChris Zankel <czankel@tensilica.com>2005-06-24 01:01:12 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-24 03:05:21 -0400
commit4bedea94545165364618d403d03b61d797acba0b (patch)
tree04626bb71e0fb5ea5c5d5aa4fedc813301bea6a6 /arch/xtensa/boot/boot-elf
parent8e1a6dd2fddcc73c9e933758361e3d9c076c688a (diff)
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 2
The attached patches provides part 2 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/xtensa/boot/boot-elf')
-rw-r--r--arch/xtensa/boot/boot-elf/Makefile52
-rw-r--r--arch/xtensa/boot/boot-elf/boot.ld71
-rw-r--r--arch/xtensa/boot/boot-elf/bootstrap.S37
3 files changed, 160 insertions, 0 deletions
diff --git a/arch/xtensa/boot/boot-elf/Makefile b/arch/xtensa/boot/boot-elf/Makefile
new file mode 100644
index 000000000000..f6ef6a369667
--- /dev/null
+++ b/arch/xtensa/boot/boot-elf/Makefile
@@ -0,0 +1,52 @@
1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6
7GZIP = gzip
8GZIP_FLAGS = -v9fc
9
10ifeq ($(BIG_ENDIAN),1)
11OBJCOPY_ARGS := -O elf32-xtensa-be
12else
13OBJCOPY_ARGS := -O elf32-xtensa-le
14endif
15
16export OBJCOPY_ARGS
17
18boot-y := bootstrap.o
19
20OBJS := $(addprefix $(obj)/,$(boot-y))
21
22Image: vmlinux $(OBJS)
23 $(OBJCOPY) --strip-all -R .comment -R .xt.insn -O binary \
24 vmlinux vmlinux.tmp
25 $(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
26 --add-section image=vmlinux.tmp \
27 --set-section-flags image=contents,alloc,load,load,data \
28 $(OBJS) $@.tmp
29 $(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) \
30 -T arch/$(ARCH)/boot/boot-elf/boot.ld \
31 -o arch/$(ARCH)/boot/$@.elf $@.tmp
32 rm -f $@.tmp vmlinux.tmp
33
34Image.initrd: vmlinux $(OBJS)
35 $(OBJCOPY) --strip-all -R .comment -R .xt.insn -O binary \
36 --add-section .initrd=arch/$(ARCH)/boot/ramdisk \
37 --set-section-flags .initrd=contents,alloc,load,load,data \
38 vmlinux vmlinux.tmp
39 $(OBJCOPY) $(OBJCOPY_ARGS) -R .comment \
40 --add-section image=vmlinux.tmp \
41 --set-section-flags image=contents,alloc,load,load,data \
42 $(OBJS) $@.tmp
43 $(LD) $(LDFLAGS) $(LDFLAGS_vmlinux) \
44 -T arch/$(ARCH)/boot/boot-elf/boot.ld \
45 -o arch/$(ARCH)/boot/$@.elf $@.tmp
46 rm -f $@.tmp vmlinux.tmp
47
48
49zImage: Image
50
51zImage.initrd: Image.initrd
52
diff --git a/arch/xtensa/boot/boot-elf/boot.ld b/arch/xtensa/boot/boot-elf/boot.ld
new file mode 100644
index 000000000000..4ab06a0a7a6b
--- /dev/null
+++ b/arch/xtensa/boot/boot-elf/boot.ld
@@ -0,0 +1,71 @@
1OUTPUT_ARCH(xtensa)
2
3SECTIONS
4{
5 .start 0xD0000000 : { *(.start) }
6
7 .text 0xD0000000:
8 {
9 __reloc_start = . ;
10 _text_start = . ;
11 *(.literal .text.literal .text)
12 _text_end = . ;
13 }
14
15 .rodata ALIGN(0x04):
16 {
17 *(.rodata)
18 *(.rodata1)
19 }
20
21 .data ALIGN(0x04):
22 {
23 *(.data)
24 *(.data1)
25 *(.sdata)
26 *(.sdata2)
27 *(.got.plt)
28 *(.got)
29 *(.dynamic)
30 }
31
32 __reloc_end = . ;
33
34 .initrd ALIGN(0x10) :
35 {
36 boot_initrd_start = . ;
37 *(.initrd)
38 boot_initrd_end = .;
39 }
40
41 . = ALIGN(0x10);
42 __image_load = . ;
43 .image 0xd0001000:
44 {
45 _image_start = .;
46 *(image)
47 . = (. + 3) & ~ 3;
48 _image_end = . ;
49 }
50
51
52 .bss ((LOADADDR(.image) + SIZEOF(.image) + 3) & ~ 3):
53 {
54 __bss_start = .;
55 *(.sbss)
56 *(.scommon)
57 *(.dynbss)
58 *(.bss)
59 __bss_end = .;
60 }
61 _end = .;
62 _param_start = .;
63
64 .ResetVector.text 0xfe000020 :
65 {
66 *(.ResetVector.text)
67 }
68
69
70 PROVIDE (end = .);
71}
diff --git a/arch/xtensa/boot/boot-elf/bootstrap.S b/arch/xtensa/boot/boot-elf/bootstrap.S
new file mode 100644
index 000000000000..7cba94abdab8
--- /dev/null
+++ b/arch/xtensa/boot/boot-elf/bootstrap.S
@@ -0,0 +1,37 @@
1
2#include <xtensa/config/specreg.h>
3#include <xtensa/config/core.h>
4
5#include <linux/config.h>
6#include <asm/bootparam.h>
7
8
9/* ResetVector
10 */
11 .section .ResetVector.text, "ax"
12 .global _ResetVector
13_ResetVector:
14 _j reset
15 .align 4
16RomInitAddr:
17 .word 0xd0001000
18RomBootParam:
19 .word _bootparam
20reset:
21 l32r a0, RomInitAddr
22 l32r a2, RomBootParam
23 movi a3, 0
24 movi a4, 0
25 jx a0
26
27 .align 4
28 .section .bootstrap.data, "aw"
29
30 .globl _bootparam
31_bootparam:
32 .short BP_TAG_FIRST
33 .short 4
34 .long BP_VERSION
35 .short BP_TAG_LAST
36 .short 0
37 .long 0