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authorAndreas Herrmann <andreas.herrmann3@amd.com>2009-05-08 12:23:50 -0400
committerIngo Molnar <mingo@elte.hu>2009-05-11 08:37:36 -0400
commit97a52714658cd959a3cfa35c5b6f489859f0204b (patch)
tree462708be716e7e1e5216f305dbf243f7c9db1382 /arch/x86/kernel
parent4401da6111ac58f94234417427d06a72c4048c74 (diff)
x86: display extended apic registers with print_local_APIC and cpu_debug code
Both print_local_APIC (used when apic=debug kernel param is set) and cpu_debug code missed support for some extended APIC registers that I'd like to see. This adds support to show: - extended APIC feature register - extended APIC control register - extended LVT registers [ Impact: print more debug info ] Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Cc: Jaswinder Singh Rajput <jaswinder@kernel.org> Cc: Cyrill Gorcunov <gorcunov@openvz.org> LKML-Reference: <20090508162350.GO29045@alberich.amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel')
-rw-r--r--arch/x86/kernel/apic/apic.c2
-rw-r--r--arch/x86/kernel/apic/io_apic.c14
-rw-r--r--arch/x86/kernel/cpu/cpu_debug.c14
3 files changed, 27 insertions, 3 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 1ee966f4ae95..0e6543fafb50 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -395,7 +395,7 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen)
395 395
396static void setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask) 396static void setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask)
397{ 397{
398 unsigned long reg = (lvt_off << 4) + APIC_EILVT0; 398 unsigned long reg = (lvt_off << 4) + APIC_EILVTn(0);
399 unsigned int v = (mask << 16) | (msg_type << 8) | vector; 399 unsigned int v = (mask << 16) | (msg_type << 8) | vector;
400 400
401 apic_write(reg, v); 401 apic_write(reg, v);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 2afe145d277f..65b824c9c4fc 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1739,7 +1739,7 @@ __apicdebuginit(void) print_APIC_bitfield(int base)
1739 1739
1740__apicdebuginit(void) print_local_APIC(void *dummy) 1740__apicdebuginit(void) print_local_APIC(void *dummy)
1741{ 1741{
1742 unsigned int v, ver, maxlvt; 1742 unsigned int i, v, ver, maxlvt;
1743 u64 icr; 1743 u64 icr;
1744 1744
1745 if (apic_verbosity == APIC_QUIET) 1745 if (apic_verbosity == APIC_QUIET)
@@ -1827,6 +1827,18 @@ __apicdebuginit(void) print_local_APIC(void *dummy)
1827 printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v); 1827 printk(KERN_DEBUG "... APIC TMCCT: %08x\n", v);
1828 v = apic_read(APIC_TDCR); 1828 v = apic_read(APIC_TDCR);
1829 printk(KERN_DEBUG "... APIC TDCR: %08x\n", v); 1829 printk(KERN_DEBUG "... APIC TDCR: %08x\n", v);
1830
1831 if (boot_cpu_has(X86_FEATURE_EXTAPIC)) {
1832 v = apic_read(APIC_EFEAT);
1833 maxlvt = (v >> 16) & 0xff;
1834 printk(KERN_DEBUG "... APIC EFEAT: %08x\n", v);
1835 v = apic_read(APIC_ECTRL);
1836 printk(KERN_DEBUG "... APIC ECTRL: %08x\n", v);
1837 for (i = 0; i < maxlvt; i++) {
1838 v = apic_read(APIC_EILVTn(i));
1839 printk(KERN_DEBUG "... APIC EILVT%d: %08x\n", i, v);
1840 }
1841 }
1830 printk("\n"); 1842 printk("\n");
1831} 1843}
1832 1844
diff --git a/arch/x86/kernel/cpu/cpu_debug.c b/arch/x86/kernel/cpu/cpu_debug.c
index 46e29ab96c6a..2fc4f6bb9ca5 100644
--- a/arch/x86/kernel/cpu/cpu_debug.c
+++ b/arch/x86/kernel/cpu/cpu_debug.c
@@ -588,8 +588,20 @@ static void print_apic(void *arg)
588 seq_printf(seq, " TMICT\t\t: %08x\n", apic_read(APIC_TMICT)); 588 seq_printf(seq, " TMICT\t\t: %08x\n", apic_read(APIC_TMICT));
589 seq_printf(seq, " TMCCT\t\t: %08x\n", apic_read(APIC_TMCCT)); 589 seq_printf(seq, " TMCCT\t\t: %08x\n", apic_read(APIC_TMCCT));
590 seq_printf(seq, " TDCR\t\t: %08x\n", apic_read(APIC_TDCR)); 590 seq_printf(seq, " TDCR\t\t: %08x\n", apic_read(APIC_TDCR));
591#endif /* CONFIG_X86_LOCAL_APIC */ 591 if (boot_cpu_has(X86_FEATURE_EXTAPIC)) {
592 unsigned int i, v, maxeilvt;
593
594 v = apic_read(APIC_EFEAT);
595 maxeilvt = (v >> 16) & 0xff;
596 seq_printf(seq, " EFEAT\t\t: %08x\n", v);
597 seq_printf(seq, " ECTRL\t\t: %08x\n", apic_read(APIC_ECTRL));
592 598
599 for (i = 0; i < maxeilvt; i++) {
600 v = apic_read(APIC_EILVTn(i));
601 seq_printf(seq, " EILVT%d\t\t: %08x\n", i, v);
602 }
603 }
604#endif /* CONFIG_X86_LOCAL_APIC */
593 seq_printf(seq, "\n MSR\t:\n"); 605 seq_printf(seq, "\n MSR\t:\n");
594} 606}
595 607