diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2011-03-12 07:47:18 -0500 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2011-03-12 08:12:01 -0500 |
commit | 1a0e62a49ad417712cfa79a395f6c39f67aadb44 (patch) | |
tree | 3223091d3a52a5ddf1804f5ac016ac83328a0399 /arch/x86/kernel/apic/io_apic.c | |
parent | 08221110e88ae101acf2464154f98e6d1b1ab21c (diff) |
x86: ioapic: Avoid redundant lookup of irq_cfg
The caller of ioapic_register_intr() has a pointer to the irq_cfg for
the irq already. Hand it in to avoid a full lookup.
In msi_compose_msg() the pointer to irq_cfg is already available. No
need to look it up again.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/apic/io_apic.c')
-rw-r--r-- | arch/x86/kernel/apic/io_apic.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index e9d4b963ba0e..4b5ebd26f565 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -1240,7 +1240,8 @@ static inline int IO_APIC_irq_trigger(int irq) | |||
1240 | } | 1240 | } |
1241 | #endif | 1241 | #endif |
1242 | 1242 | ||
1243 | static void ioapic_register_intr(unsigned int irq, unsigned long trigger) | 1243 | static void ioapic_register_intr(unsigned int irq, struct irq_cfg *cfg, |
1244 | unsigned long trigger) | ||
1244 | { | 1245 | { |
1245 | struct irq_chip *chip = &ioapic_chip; | 1246 | struct irq_chip *chip = &ioapic_chip; |
1246 | irq_flow_handler_t hdl; | 1247 | irq_flow_handler_t hdl; |
@@ -1255,7 +1256,7 @@ static void ioapic_register_intr(unsigned int irq, unsigned long trigger) | |||
1255 | fasteoi = false; | 1256 | fasteoi = false; |
1256 | } | 1257 | } |
1257 | 1258 | ||
1258 | if (irq_remapped(irq_get_chip_data(irq))) { | 1259 | if (irq_remapped(cfg)) { |
1259 | irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); | 1260 | irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); |
1260 | chip = &ir_ioapic_chip; | 1261 | chip = &ir_ioapic_chip; |
1261 | fasteoi = trigger != 0; | 1262 | fasteoi = trigger != 0; |
@@ -1361,7 +1362,7 @@ static void setup_ioapic_irq(int apic_id, int pin, unsigned int irq, | |||
1361 | return; | 1362 | return; |
1362 | } | 1363 | } |
1363 | 1364 | ||
1364 | ioapic_register_intr(irq, trigger); | 1365 | ioapic_register_intr(irq, cfg, trigger); |
1365 | if (irq < legacy_pic->nr_legacy_irqs) | 1366 | if (irq < legacy_pic->nr_legacy_irqs) |
1366 | legacy_pic->mask(irq); | 1367 | legacy_pic->mask(irq); |
1367 | 1368 | ||
@@ -3088,7 +3089,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, | |||
3088 | 3089 | ||
3089 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); | 3090 | dest = apic->cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus()); |
3090 | 3091 | ||
3091 | if (irq_remapped(irq_get_chip_data(irq))) { | 3092 | if (irq_remapped(cfg)) { |
3092 | struct irte irte; | 3093 | struct irte irte; |
3093 | int ir_index; | 3094 | int ir_index; |
3094 | u16 sub_handle; | 3095 | u16 sub_handle; |