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| author | Ingo Molnar <mingo@elte.hu> | 2011-02-14 05:55:18 -0500 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2011-02-14 05:55:18 -0500 |
| commit | d2137d5af4259f50c19addb8246a186c9ffac325 (patch) | |
| tree | 2f7e309f9cf8ef2f2698532c226edda38021fe69 /arch/x86/kernel/aperture_64.c | |
| parent | f005fe12b90c5b9fe180a09209a893e09affa8aa (diff) | |
| parent | 795abaf1e4e188c4171e3cd3dbb11a9fcacaf505 (diff) | |
Merge branch 'linus' into x86/bootmem
Conflicts:
arch/x86/mm/numa_64.c
Merge reason: fix the conflict, update to latest -rc and pick up this
dependent fix from Yinghai:
e6d2e2b2b1e1: memblock: don't adjust size in memblock_find_base()
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/aperture_64.c')
| -rw-r--r-- | arch/x86/kernel/aperture_64.c | 44 |
1 files changed, 16 insertions, 28 deletions
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c index 85f66b4f4fee..7b1e8e10b89c 100644 --- a/arch/x86/kernel/aperture_64.c +++ b/arch/x86/kernel/aperture_64.c | |||
| @@ -39,18 +39,6 @@ int fallback_aper_force __initdata; | |||
| 39 | 39 | ||
| 40 | int fix_aperture __initdata = 1; | 40 | int fix_aperture __initdata = 1; |
| 41 | 41 | ||
| 42 | struct bus_dev_range { | ||
| 43 | int bus; | ||
| 44 | int dev_base; | ||
| 45 | int dev_limit; | ||
| 46 | }; | ||
| 47 | |||
| 48 | static struct bus_dev_range bus_dev_ranges[] __initdata = { | ||
| 49 | { 0x00, 0x18, 0x20}, | ||
| 50 | { 0xff, 0x00, 0x20}, | ||
| 51 | { 0xfe, 0x00, 0x20} | ||
| 52 | }; | ||
| 53 | |||
| 54 | static struct resource gart_resource = { | 42 | static struct resource gart_resource = { |
| 55 | .name = "GART", | 43 | .name = "GART", |
| 56 | .flags = IORESOURCE_MEM, | 44 | .flags = IORESOURCE_MEM, |
| @@ -293,13 +281,13 @@ void __init early_gart_iommu_check(void) | |||
| 293 | search_agp_bridge(&agp_aper_order, &valid_agp); | 281 | search_agp_bridge(&agp_aper_order, &valid_agp); |
| 294 | 282 | ||
| 295 | fix = 0; | 283 | fix = 0; |
| 296 | for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) { | 284 | for (i = 0; amd_nb_bus_dev_ranges[i].dev_limit; i++) { |
| 297 | int bus; | 285 | int bus; |
| 298 | int dev_base, dev_limit; | 286 | int dev_base, dev_limit; |
| 299 | 287 | ||
| 300 | bus = bus_dev_ranges[i].bus; | 288 | bus = amd_nb_bus_dev_ranges[i].bus; |
| 301 | dev_base = bus_dev_ranges[i].dev_base; | 289 | dev_base = amd_nb_bus_dev_ranges[i].dev_base; |
| 302 | dev_limit = bus_dev_ranges[i].dev_limit; | 290 | dev_limit = amd_nb_bus_dev_ranges[i].dev_limit; |
| 303 | 291 | ||
| 304 | for (slot = dev_base; slot < dev_limit; slot++) { | 292 | for (slot = dev_base; slot < dev_limit; slot++) { |
| 305 | if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) | 293 | if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) |
| @@ -348,13 +336,13 @@ void __init early_gart_iommu_check(void) | |||
| 348 | return; | 336 | return; |
| 349 | 337 | ||
| 350 | /* disable them all at first */ | 338 | /* disable them all at first */ |
| 351 | for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) { | 339 | for (i = 0; i < amd_nb_bus_dev_ranges[i].dev_limit; i++) { |
| 352 | int bus; | 340 | int bus; |
| 353 | int dev_base, dev_limit; | 341 | int dev_base, dev_limit; |
| 354 | 342 | ||
| 355 | bus = bus_dev_ranges[i].bus; | 343 | bus = amd_nb_bus_dev_ranges[i].bus; |
| 356 | dev_base = bus_dev_ranges[i].dev_base; | 344 | dev_base = amd_nb_bus_dev_ranges[i].dev_base; |
| 357 | dev_limit = bus_dev_ranges[i].dev_limit; | 345 | dev_limit = amd_nb_bus_dev_ranges[i].dev_limit; |
| 358 | 346 | ||
| 359 | for (slot = dev_base; slot < dev_limit; slot++) { | 347 | for (slot = dev_base; slot < dev_limit; slot++) { |
| 360 | if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) | 348 | if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) |
| @@ -389,14 +377,14 @@ int __init gart_iommu_hole_init(void) | |||
| 389 | 377 | ||
| 390 | fix = 0; | 378 | fix = 0; |
| 391 | node = 0; | 379 | node = 0; |
| 392 | for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) { | 380 | for (i = 0; i < amd_nb_bus_dev_ranges[i].dev_limit; i++) { |
| 393 | int bus; | 381 | int bus; |
| 394 | int dev_base, dev_limit; | 382 | int dev_base, dev_limit; |
| 395 | u32 ctl; | 383 | u32 ctl; |
| 396 | 384 | ||
| 397 | bus = bus_dev_ranges[i].bus; | 385 | bus = amd_nb_bus_dev_ranges[i].bus; |
| 398 | dev_base = bus_dev_ranges[i].dev_base; | 386 | dev_base = amd_nb_bus_dev_ranges[i].dev_base; |
| 399 | dev_limit = bus_dev_ranges[i].dev_limit; | 387 | dev_limit = amd_nb_bus_dev_ranges[i].dev_limit; |
| 400 | 388 | ||
| 401 | for (slot = dev_base; slot < dev_limit; slot++) { | 389 | for (slot = dev_base; slot < dev_limit; slot++) { |
| 402 | if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) | 390 | if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) |
| @@ -504,7 +492,7 @@ out: | |||
| 504 | } | 492 | } |
| 505 | 493 | ||
| 506 | /* Fix up the north bridges */ | 494 | /* Fix up the north bridges */ |
| 507 | for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) { | 495 | for (i = 0; i < amd_nb_bus_dev_ranges[i].dev_limit; i++) { |
| 508 | int bus, dev_base, dev_limit; | 496 | int bus, dev_base, dev_limit; |
| 509 | 497 | ||
| 510 | /* | 498 | /* |
| @@ -513,9 +501,9 @@ out: | |||
| 513 | */ | 501 | */ |
| 514 | u32 ctl = DISTLBWALKPRB | aper_order << 1; | 502 | u32 ctl = DISTLBWALKPRB | aper_order << 1; |
| 515 | 503 | ||
| 516 | bus = bus_dev_ranges[i].bus; | 504 | bus = amd_nb_bus_dev_ranges[i].bus; |
| 517 | dev_base = bus_dev_ranges[i].dev_base; | 505 | dev_base = amd_nb_bus_dev_ranges[i].dev_base; |
| 518 | dev_limit = bus_dev_ranges[i].dev_limit; | 506 | dev_limit = amd_nb_bus_dev_ranges[i].dev_limit; |
| 519 | for (slot = dev_base; slot < dev_limit; slot++) { | 507 | for (slot = dev_base; slot < dev_limit; slot++) { |
| 520 | if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) | 508 | if (!early_is_amd_nb(read_pci_config(bus, slot, 3, 0x00))) |
| 521 | continue; | 509 | continue; |