diff options
author | David S. Miller <davem@davemloft.net> | 2012-08-16 19:41:04 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-08-19 02:02:36 -0400 |
commit | 6f859c0e96f0737a543610a189d12420c569110f (patch) | |
tree | a3623aa1d8eb1aa356357ba37197aa2d4aaa9503 /arch/sparc/include | |
parent | 6dab7ede9390d4d937cb89feca932e4fd575d2da (diff) |
sparc64: Add detection for features new in SPARC-T4.
Compare and branch, pause, and the various new cryptographic opcodes.
We advertise the crypto opcodes to userspace using one hwcap bit,
HWCAP_SPARC_CRYPTO.
This essentially indicates that the %cfr register can be interrograted
and used to determine exactly which crypto opcodes are available on
the current cpu.
We use the %cfr register to report all of the crypto opcodes available
in the bootup CPU caps log message, and via /proc/cpuinfo.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include')
-rw-r--r-- | arch/sparc/include/asm/elf_64.h | 9 | ||||
-rw-r--r-- | arch/sparc/include/asm/pstate.h | 14 |
2 files changed, 23 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/elf_64.h b/arch/sparc/include/asm/elf_64.h index 7df8b7f544d4..370ca1e71ffb 100644 --- a/arch/sparc/include/asm/elf_64.h +++ b/arch/sparc/include/asm/elf_64.h | |||
@@ -86,6 +86,15 @@ | |||
86 | #define AV_SPARC_IMA 0x00400000 /* integer multiply-add */ | 86 | #define AV_SPARC_IMA 0x00400000 /* integer multiply-add */ |
87 | #define AV_SPARC_ASI_CACHE_SPARING \ | 87 | #define AV_SPARC_ASI_CACHE_SPARING \ |
88 | 0x00800000 /* cache sparing ASIs available */ | 88 | 0x00800000 /* cache sparing ASIs available */ |
89 | #define AV_SPARC_PAUSE 0x01000000 /* PAUSE available */ | ||
90 | #define AV_SPARC_CBCOND 0x02000000 /* CBCOND insns available */ | ||
91 | |||
92 | /* Solaris decided to enumerate every single crypto instruction type | ||
93 | * in the AT_HWCAP bits. This is wasteful, since if crypto is present, | ||
94 | * you still need to look in the CFR register to see if the opcode is | ||
95 | * really available. So we simply advertise only "crypto" support. | ||
96 | */ | ||
97 | #define HWCAP_SPARC_CRYPTO 0x04000000 /* CRYPTO insns available */ | ||
89 | 98 | ||
90 | #define CORE_DUMP_USE_REGSET | 99 | #define CORE_DUMP_USE_REGSET |
91 | 100 | ||
diff --git a/arch/sparc/include/asm/pstate.h b/arch/sparc/include/asm/pstate.h index a26a53777bb0..6dfa8f8c9749 100644 --- a/arch/sparc/include/asm/pstate.h +++ b/arch/sparc/include/asm/pstate.h | |||
@@ -88,4 +88,18 @@ | |||
88 | #define VERS_MAXTL _AC(0x000000000000ff00,UL) /* Max Trap Level. */ | 88 | #define VERS_MAXTL _AC(0x000000000000ff00,UL) /* Max Trap Level. */ |
89 | #define VERS_MAXWIN _AC(0x000000000000001f,UL) /* Max RegWindow Idx.*/ | 89 | #define VERS_MAXWIN _AC(0x000000000000001f,UL) /* Max RegWindow Idx.*/ |
90 | 90 | ||
91 | /* Compatability Feature Register (%asr26), SPARC-T4 and later */ | ||
92 | #define CFR_AES _AC(0x0000000000000001,UL) /* Supports AES opcodes */ | ||
93 | #define CFR_DES _AC(0x0000000000000002,UL) /* Supports DES opcodes */ | ||
94 | #define CFR_KASUMI _AC(0x0000000000000004,UL) /* Supports KASUMI opcodes */ | ||
95 | #define CFR_CAMELIA _AC(0x0000000000000008,UL) /* Supports CAMELIA opcodes */ | ||
96 | #define CFR_MD5 _AC(0x0000000000000010,UL) /* Supports MD5 opcodes */ | ||
97 | #define CFR_SHA1 _AC(0x0000000000000020,UL) /* Supports SHA1 opcodes */ | ||
98 | #define CFR_SHA256 _AC(0x0000000000000040,UL) /* Supports SHA256 opcodes */ | ||
99 | #define CFR_SHA512 _AC(0x0000000000000080,UL) /* Supports SHA512 opcodes */ | ||
100 | #define CFR_MPMUL _AC(0x0000000000000100,UL) /* Supports MPMUL opcodes */ | ||
101 | #define CFR_MONTMUL _AC(0x0000000000000200,UL) /* Supports MONTMUL opcodes */ | ||
102 | #define CFR_MONTSQR _AC(0x0000000000000400,UL) /* Supports MONTSQR opcodes */ | ||
103 | #define CFR_CRC32C _AC(0x0000000000000800,UL) /* Supports CRC32C opcodes */ | ||
104 | |||
91 | #endif /* !(_SPARC64_PSTATE_H) */ | 105 | #endif /* !(_SPARC64_PSTATE_H) */ |