diff options
author | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2012-03-11 11:59:26 -0400 |
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committer | Martin Schwidefsky <schwidefsky@de.ibm.com> | 2012-03-11 11:59:28 -0400 |
commit | 8b646bd759086f6090fe27acf414c0b5faa737f4 (patch) | |
tree | 29475659031c57ccf2ca43899614ab5c6b1899a0 /arch/s390/kernel/entry64.S | |
parent | 7e180bd8020d213bb0de15c3606968f8a9262439 (diff) |
[S390] rework smp code
Define struct pcpu and merge some of the NR_CPUS arrays into it, including
__cpu_logical_map, current_set and smp_cpu_state. Split smp related
functions to those operating on physical cpus and the functions operating
on a logical cpu number. Make the functions for physical cpus use a
pointer to a struct pcpu. This hides the knowledge about cpu addresses in
smp.c, entry[64].S and swsusp_asm64.S, thus remove the sigp.h header.
The PSW restart mechanism is used to start secondary cpus, calling a
function on an online cpu, calling a function on the ipl cpu, and for
the nmi signal. Replace the different assembler functions with a
single function restart_int_handler. The new entry point calls a function
whose pointer is stored in the lowcore of the target cpu and it can wait
for the source cpu to stop. This covers all existing use cases.
Overall the code is now simpler and there are ~380 lines less code.
Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel/entry64.S')
-rw-r--r-- | arch/s390/kernel/entry64.S | 72 |
1 files changed, 17 insertions, 55 deletions
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S index bacbd2848d40..e33789a45752 100644 --- a/arch/s390/kernel/entry64.S +++ b/arch/s390/kernel/entry64.S | |||
@@ -2,7 +2,7 @@ | |||
2 | * arch/s390/kernel/entry64.S | 2 | * arch/s390/kernel/entry64.S |
3 | * S390 low-level entry points. | 3 | * S390 low-level entry points. |
4 | * | 4 | * |
5 | * Copyright (C) IBM Corp. 1999,2010 | 5 | * Copyright (C) IBM Corp. 1999,2012 |
6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), | 6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), |
7 | * Hartmut Penner (hp@de.ibm.com), | 7 | * Hartmut Penner (hp@de.ibm.com), |
8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | 8 | * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), |
@@ -713,68 +713,30 @@ mcck_panic: | |||
713 | 0: aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) | 713 | 0: aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE) |
714 | j mcck_skip | 714 | j mcck_skip |
715 | 715 | ||
716 | /* | ||
717 | * Restart interruption handler, kick starter for additional CPUs | ||
718 | */ | ||
719 | #ifdef CONFIG_SMP | ||
720 | __CPUINIT | ||
721 | ENTRY(restart_int_handler) | ||
722 | basr %r1,0 | ||
723 | restart_base: | ||
724 | spt restart_vtime-restart_base(%r1) | ||
725 | stck __LC_LAST_UPDATE_CLOCK | ||
726 | mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1) | ||
727 | mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1) | ||
728 | lghi %r10,__LC_GPREGS_SAVE_AREA | ||
729 | lg %r15,120(%r10) # load ksp | ||
730 | lghi %r10,__LC_CREGS_SAVE_AREA | ||
731 | lctlg %c0,%c15,0(%r10) # get new ctl regs | ||
732 | lghi %r10,__LC_AREGS_SAVE_AREA | ||
733 | lam %a0,%a15,0(%r10) | ||
734 | lmg %r6,%r15,__SF_GPRS(%r15)# load registers from clone | ||
735 | lg %r1,__LC_THREAD_INFO | ||
736 | mvc __LC_USER_TIMER(8),__TI_user_timer(%r1) | ||
737 | mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1) | ||
738 | xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER | ||
739 | ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off | ||
740 | brasl %r14,start_secondary | ||
741 | .align 8 | ||
742 | restart_vtime: | ||
743 | .long 0x7fffffff,0xffffffff | ||
744 | .previous | ||
745 | #else | ||
746 | /* | ||
747 | * If we do not run with SMP enabled, let the new CPU crash ... | ||
748 | */ | ||
749 | ENTRY(restart_int_handler) | ||
750 | basr %r1,0 | ||
751 | restart_base: | ||
752 | lpswe restart_crash-restart_base(%r1) | ||
753 | .align 8 | ||
754 | restart_crash: | ||
755 | .long 0x000a0000,0x00000000,0x00000000,0x00000000 | ||
756 | restart_go: | ||
757 | #endif | ||
758 | |||
759 | # | 716 | # |
760 | # PSW restart interrupt handler | 717 | # PSW restart interrupt handler |
761 | # | 718 | # |
762 | ENTRY(psw_restart_int_handler) | 719 | ENTRY(restart_int_handler) |
763 | stg %r15,__LC_SAVE_AREA_RESTART | 720 | stg %r15,__LC_SAVE_AREA_RESTART |
764 | larl %r15,restart_stack # load restart stack | 721 | lg %r15,__LC_RESTART_STACK |
765 | lg %r15,0(%r15) | ||
766 | aghi %r15,-__PT_SIZE # create pt_regs on stack | 722 | aghi %r15,-__PT_SIZE # create pt_regs on stack |
723 | xc 0(__PT_SIZE,%r15),0(%r15) | ||
767 | stmg %r0,%r14,__PT_R0(%r15) | 724 | stmg %r0,%r14,__PT_R0(%r15) |
768 | mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART | 725 | mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART |
769 | mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw | 726 | mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw |
770 | aghi %r15,-STACK_FRAME_OVERHEAD | 727 | aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack |
771 | xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) | 728 | xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15) |
772 | brasl %r14,do_restart | 729 | lmg %r1,%r3,__LC_RESTART_FN # load fn, parm & source cpu |
773 | larl %r14,restart_psw_crash # load disabled wait PSW if | 730 | ltgr %r3,%r3 # test source cpu address |
774 | lpswe 0(%r14) # do_restart returns | 731 | jm 1f # negative -> skip source stop |
775 | .align 8 | 732 | 0: sigp %r4,%r3,1 # sigp sense to source cpu |
776 | restart_psw_crash: | 733 | brc 10,0b # wait for status stored |
777 | .quad 0x0002000080000000,0x0000000000000000 + restart_psw_crash | 734 | 1: basr %r14,%r1 # call function |
735 | stap __SF_EMPTY(%r15) # store cpu address | ||
736 | llgh %r3,__SF_EMPTY(%r15) | ||
737 | 2: sigp %r4,%r3,5 # sigp stop to current cpu | ||
738 | brc 2,2b | ||
739 | 3: j 3b | ||
778 | 740 | ||
779 | .section .kprobes.text, "ax" | 741 | .section .kprobes.text, "ax" |
780 | 742 | ||