Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf changes from Ingo Molnar:
 "There are lots of improvements, the biggest changes are:

  Main kernel side changes:

   - Improve uprobes performance by adding 'pre-filtering' support, by
     Oleg Nesterov.

   - Make some POWER7 events available in sysfs, equivalent to what was
     done on x86, from Sukadev Bhattiprolu.

   - tracing updates by Steve Rostedt - mostly misc fixes and smaller
     improvements.

   - Use perf/event tracing to report PCI Express advanced errors, by
     Tony Luck.

   - Enable northbridge performance counters on AMD family 15h, by Jacob
     Shin.

   - This tracing commit:

        tracing: Remove the extra 4 bytes of padding in events

     changes the ABI.  All involved parties (PowerTop in particular)
     seem to agree that it's safe to do now with the introduction of
     libtraceevent, but the devil is in the details ...

  Main tooling side changes:

   - Add 'event group view', from Namyung Kim:

     To use it, 'perf record' should group events when recording.  And
     then perf report parses the saved group relation from file header
     and prints them together if --group option is provided.  You can
     use the 'perf evlist' command to see event group information:

        $ perf record -e '{ref-cycles,cycles}' noploop 1
        [ perf record: Woken up 2 times to write data ]
        [ perf record: Captured and wrote 0.385 MB perf.data (~16807 samples) ]

        $ perf evlist --group
        {ref-cycles,cycles}

     With this example, default perf report will show you each event
     separately.

     You can use --group option to enable event group view:

        $ perf report --group
        ...
        # group: {ref-cycles,cycles}
        # ========
        # Samples: 7K of event 'anon group { ref-cycles, cycles }'
        # Event count (approx.): 6876107743
        #
        #         Overhead  Command      Shared Object                      Symbol
        # ................  .......  .................  ..........................
            99.84%  99.76%  noploop  noploop            [.] main
             0.07%   0.00%  noploop  ld-2.15.so         [.] strcmp
             0.03%   0.00%  noploop  [kernel.kallsyms]  [k] timerqueue_del
             0.03%   0.03%  noploop  [kernel.kallsyms]  [k] sched_clock_cpu
             0.02%   0.00%  noploop  [kernel.kallsyms]  [k] account_user_time
             0.01%   0.00%  noploop  [kernel.kallsyms]  [k] __alloc_pages_nodemask
             0.00%   0.00%  noploop  [kernel.kallsyms]  [k] native_write_msr_safe
             0.00%   0.11%  noploop  [kernel.kallsyms]  [k] _raw_spin_lock
             0.00%   0.06%  noploop  [kernel.kallsyms]  [k] find_get_page
             0.00%   0.02%  noploop  [kernel.kallsyms]  [k] rcu_check_callbacks
             0.00%   0.02%  noploop  [kernel.kallsyms]  [k] __current_kernel_time

     As you can see the Overhead column now contains both of ref-cycles
     and cycles and header line shows group information also - 'anon
     group { ref-cycles, cycles }'.  The output is sorted by period of
     group leader first.

   - Initial GTK+ annotate browser, from Namhyung Kim.

   - Add option for runtime switching perf data file in perf report,
     just press 's' and a menu with the valid files found in the current
     directory will be presented, from Feng Tang.

   - Add support to display whole group data for raw columns, from Jiri
     Olsa.

   - Add per processor socket count aggregation in perf stat, from
     Stephane Eranian.

   - Add interval printing in 'perf stat', from Stephane Eranian.

   - 'perf test' improvements

   - Add support for wildcards in tracepoint system name, from Jiri
     Olsa.

   - Add anonymous huge page recognition, from Joshua Zhu.

   - perf build-id cache now can show DSOs present in a perf.data file
     that are not in the cache, to integrate with build-id servers being
     put in place by organizations such as Fedora.

   - perf top now shares more of the evsel config/creation routines with
     'record', paving the way for further integration like 'top'
     snapshots, etc.

   - perf top now supports DWARF callchains.

   - Fix mmap limitations on 32-bit, fix from David Miller.

   - 'perf bench numa mem' NUMA performance measurement suite

   - ... and lots of fixes, performance improvements, cleanups and other
     improvements I failed to list - see the shortlog and git log for
     details."

* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (270 commits)
  perf/x86/amd: Enable northbridge performance counters on AMD family 15h
  perf/hwbp: Fix cleanup in case of kzalloc failure
  perf tools: Fix build with bison 2.3 and older.
  perf tools: Limit unwind support to x86 archs
  perf annotate: Make it to be able to skip unannotatable symbols
  perf gtk/annotate: Fail early if it can't annotate
  perf gtk/annotate: Show source lines with gray color
  perf gtk/annotate: Support multiple event annotation
  perf ui/gtk: Implement basic GTK2 annotation browser
  perf annotate: Fix warning message on a missing vmlinux
  perf buildid-cache: Add --update option
  uprobes/perf: Avoid uprobe_apply() whenever possible
  uprobes/perf: Teach trace_uprobe/perf code to use UPROBE_HANDLER_REMOVE
  uprobes/perf: Teach trace_uprobe/perf code to pre-filter
  uprobes/perf: Teach trace_uprobe/perf code to track the active perf_event's
  uprobes: Introduce uprobe_apply()
  perf: Introduce hw_perf_event->tp_target and ->tp_list
  uprobes/perf: Always increment trace_uprobe->nhit
  uprobes/tracing: Kill uprobe_trace_consumer, embed uprobe_consumer into trace_uprobe
  uprobes/tracing: Introduce is_trace_uprobe_enabled()
  ...

3 files changed, 110 insertions, 8 deletions

diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 9710be3a2d17..136bba62efa4 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -11,6 +11,7 @@
 
 #include <linux/types.h>
 #include <asm/hw_irq.h>
+#include <linux/device.h>
 
 #define MAX_HWEVENTS            8
 #define MAX_EVENT_ALTERNATIVES  8
@@ -35,6 +36,7 @@ struct power_pmu {
         void            (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
         int             (*limited_pmc_event)(u64 event_id);
         u32             flags;
+        const struct attribute_group    **attr_groups;
         int             n_generic;
         int             *generic_events;
         int             (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
@@ -109,3 +111,27 @@ extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
  * If an event_id is not subject to the constraint expressed by a particular
  * field, then it will have 0 in both the mask and value for that field.
  */
+
+extern ssize_t power_events_sysfs_show(struct device *dev,
+                                struct device_attribute *attr, char *page);
+
+/*
+ * EVENT_VAR() is same as PMU_EVENT_VAR with a suffix.
+ *
+ * Having a suffix allows us to have aliases in sysfs - eg: the generic
+ * event 'cpu-cycles' can have two entries in sysfs: 'cpu-cycles' and
+ * 'PM_CYC' where the latter is the name by which the event is known in
+ * POWER CPU specification.
+ */
+#define EVENT_VAR(_id, _suffix)         event_attr_##_id##_suffix
+#define EVENT_PTR(_id, _suffix)         &EVENT_VAR(_id, _suffix).attr.attr
+
+#define EVENT_ATTR(_name, _id, _suffix)                                 \
+        PMU_EVENT_ATTR(_name, EVENT_VAR(_id, _suffix), PME_PM_##_id,    \
+                        power_events_sysfs_show)
+
+#define GENERIC_EVENT_ATTR(_name, _id)  EVENT_ATTR(_name, _id, _g)
+#define GENERIC_EVENT_PTR(_id)          EVENT_PTR(_id, _g)
+
+#define POWER_EVENT_ATTR(_name, _id)    EVENT_ATTR(PM_##_name, _id, _p)
+#define POWER_EVENT_PTR(_id)            EVENT_PTR(_id, _p)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index aa2465e21f1a..fa476d50791f 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -1305,6 +1305,16 @@ static int power_pmu_event_idx(struct perf_event *event)
         return event->hw.idx;
 }
 
+ssize_t power_events_sysfs_show(struct device *dev,
+                                struct device_attribute *attr, char *page)
+{
+        struct perf_pmu_events_attr *pmu_attr;
+
+        pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr);
+
+        return sprintf(page, "event=0x%02llx\n", pmu_attr->id);
+}
+
 struct pmu power_pmu = {
         .pmu_enable     = power_pmu_enable,
         .pmu_disable    = power_pmu_disable,
@@ -1537,6 +1547,8 @@ int __cpuinit register_power_pmu(struct power_pmu *pmu)
         pr_info("%s performance monitor hardware support registered\n",
                 pmu->name);
 
+        power_pmu.attr_groups = ppmu->attr_groups;
+
 #ifdef MSR_HV
         /*
          * Use FCHV to ignore kernel events if MSR.HV is set.
diff --git a/arch/powerpc/perf/power7-pmu.c b/arch/powerpc/perf/power7-pmu.c
index 2ee01e38d5e2..b554879bd31e 100644
--- a/arch/powerpc/perf/power7-pmu.c
+++ b/arch/powerpc/perf/power7-pmu.c
@@ -51,6 +51,18 @@
 #define MMCR1_PMCSEL_MSK        0xff
 
 /*
+ * Power7 event codes.
+ */
+#define PME_PM_CYC                      0x1e
+#define PME_PM_GCT_NOSLOT_CYC           0x100f8
+#define PME_PM_CMPLU_STALL              0x4000a
+#define PME_PM_INST_CMPL                0x2
+#define PME_PM_LD_REF_L1                0xc880
+#define PME_PM_LD_MISS_L1               0x400f0
+#define PME_PM_BRU_FIN                  0x10068
+#define PME_PM_BRU_MPRED                0x400f6
+
+/*
  * Layout of constraint bits:
  * 6666555555555544444444443333333333222222222211111111110000000000
  * 3210987654321098765432109876543210987654321098765432109876543210
@@ -307,14 +319,14 @@ static void power7_disable_pmc(unsigned int pmc, unsigned long mmcr[])
 }
 
 static int power7_generic_events[] = {
-        [PERF_COUNT_HW_CPU_CYCLES] = 0x1e,
-        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = 0x100f8, /* GCT_NOSLOT_CYC */
-        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = 0x4000a,  /* CMPLU_STALL */
-        [PERF_COUNT_HW_INSTRUCTIONS] = 2,
-        [PERF_COUNT_HW_CACHE_REFERENCES] = 0xc880,      /* LD_REF_L1_LSU*/
-        [PERF_COUNT_HW_CACHE_MISSES] = 0x400f0,         /* LD_MISS_L1   */
-        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = 0x10068,  /* BRU_FIN      */
-        [PERF_COUNT_HW_BRANCH_MISSES] = 0x400f6,        /* BR_MPRED     */
+        [PERF_COUNT_HW_CPU_CYCLES] =                    PME_PM_CYC,
+        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] =       PME_PM_GCT_NOSLOT_CYC,
+        [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] =        PME_PM_CMPLU_STALL,
+        [PERF_COUNT_HW_INSTRUCTIONS] =                  PME_PM_INST_CMPL,
+        [PERF_COUNT_HW_CACHE_REFERENCES] =              PME_PM_LD_REF_L1,
+        [PERF_COUNT_HW_CACHE_MISSES] =                  PME_PM_LD_MISS_L1,
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] =           PME_PM_BRU_FIN,
+        [PERF_COUNT_HW_BRANCH_MISSES] =                 PME_PM_BRU_MPRED,
 };
 
 #define C(x)    PERF_COUNT_HW_CACHE_##x
@@ -362,6 +374,57 @@ static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
         },
 };
 
+
+GENERIC_EVENT_ATTR(cpu-cycles,                  CYC);
+GENERIC_EVENT_ATTR(stalled-cycles-frontend,     GCT_NOSLOT_CYC);
+GENERIC_EVENT_ATTR(stalled-cycles-backend,      CMPLU_STALL);
+GENERIC_EVENT_ATTR(instructions,                INST_CMPL);
+GENERIC_EVENT_ATTR(cache-references,            LD_REF_L1);
+GENERIC_EVENT_ATTR(cache-misses,                LD_MISS_L1);
+GENERIC_EVENT_ATTR(branch-instructions,         BRU_FIN);
+GENERIC_EVENT_ATTR(branch-misses,               BRU_MPRED);
+
+POWER_EVENT_ATTR(CYC,                           CYC);
+POWER_EVENT_ATTR(GCT_NOSLOT_CYC,                GCT_NOSLOT_CYC);
+POWER_EVENT_ATTR(CMPLU_STALL,                   CMPLU_STALL);
+POWER_EVENT_ATTR(INST_CMPL,                     INST_CMPL);
+POWER_EVENT_ATTR(LD_REF_L1,                     LD_REF_L1);
+POWER_EVENT_ATTR(LD_MISS_L1,                    LD_MISS_L1);
+POWER_EVENT_ATTR(BRU_FIN,                       BRU_FIN)
+POWER_EVENT_ATTR(BRU_MPRED,                     BRU_MPRED);
+
+static struct attribute *power7_events_attr[] = {
+        GENERIC_EVENT_PTR(CYC),
+        GENERIC_EVENT_PTR(GCT_NOSLOT_CYC),
+        GENERIC_EVENT_PTR(CMPLU_STALL),
+        GENERIC_EVENT_PTR(INST_CMPL),
+        GENERIC_EVENT_PTR(LD_REF_L1),
+        GENERIC_EVENT_PTR(LD_MISS_L1),
+        GENERIC_EVENT_PTR(BRU_FIN),
+        GENERIC_EVENT_PTR(BRU_MPRED),
+
+        POWER_EVENT_PTR(CYC),
+        POWER_EVENT_PTR(GCT_NOSLOT_CYC),
+        POWER_EVENT_PTR(CMPLU_STALL),
+        POWER_EVENT_PTR(INST_CMPL),
+        POWER_EVENT_PTR(LD_REF_L1),
+        POWER_EVENT_PTR(LD_MISS_L1),
+        POWER_EVENT_PTR(BRU_FIN),
+        POWER_EVENT_PTR(BRU_MPRED),
+        NULL
+};
+
+
+static struct attribute_group power7_pmu_events_group = {
+        .name = "events",
+        .attrs = power7_events_attr,
+};
+
+static const struct attribute_group *power7_pmu_attr_groups[] = {
+        &power7_pmu_events_group,
+        NULL,
+};
+
 static struct power_pmu power7_pmu = {
         .name                   = "POWER7",
         .n_counter              = 6,
@@ -373,6 +436,7 @@ static struct power_pmu power7_pmu = {
         .get_alternatives       = power7_get_alternatives,
         .disable_pmc            = power7_disable_pmc,
         .flags                  = PPMU_ALT_SIPR,
+        .attr_groups            = power7_pmu_attr_groups,
         .n_generic              = ARRAY_SIZE(power7_generic_events),
         .generic_events         = power7_generic_events,
         .cache_events           = &power7_cache_events,