Merge branch 'linus' into timers/nohz

1 files changed, 49 insertions, 11 deletions

diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index a025a8ededc5..9c30a34821dc 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -42,6 +42,7 @@
                         timebase-frequency = <0>;
                         bus-frequency = <0>;
                         clock-frequency = <0>;
+                        next-level-cache = <&L2>;
                 };
         };
 
@@ -70,7 +71,7 @@
                         interrupts = <18 2>;
                 };
 
-                l2-cache-controller@20000 {
+                L2: l2-cache-controller@20000 {
                         compatible = "fsl,8568-l2-cache-controller";
                         reg = <0x20000 0x1000>;
                         cache-line-size = <32>; // 32 bytes
@@ -106,6 +107,47 @@
                         dfsrr;
                 };
 
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,mpc8568-dma", "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,mpc8568-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,mpc8568-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,mpc8568-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,mpc8568-dma-channel",
+                                                "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+
                 mdio@24520 {
                         #address-cells = <1>;
                         #size-cells = <0>;
@@ -189,27 +231,23 @@
                 };
 
                 crypto@30000 {
-                        device_type = "crypto";
-                        model = "SEC2";
-                        compatible = "talitos";
-                        reg = <0x30000 0xf000>;
+                        compatible = "fsl,sec2.1", "fsl,sec2.0";
+                        reg = <0x30000 0x10000>;
                         interrupts = <45 2>;
                         interrupt-parent = <&mpic>;
-                        num-channels = <4>;
-                        channel-fifo-len = <24>;
-                        exec-units-mask = <0xfe>;
-                        descriptor-types-mask = <0x12b0ebf>;
+                        fsl,num-channels = <4>;
+                        fsl,channel-fifo-len = <24>;
+                        fsl,exec-units-mask = <0xfe>;
+                        fsl,descriptor-types-mask = <0x12b0ebf>;
                 };
 
                 mpic: pic@40000 {
-                        clock-frequency = <0>;
                         interrupt-controller;
                         #address-cells = <0>;
                         #interrupt-cells = <2>;
                         reg = <0x40000 0x40000>;
                         compatible = "chrp,open-pic";
                         device_type = "open-pic";
-                        big-endian;
                 };
 
                 par_io@e0100 {