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authorDavid Gibson <david@gibson.dropbear.id.au>2008-05-15 02:46:39 -0400
committerJosh Boyer <jwboyer@linux.vnet.ibm.com>2008-05-29 08:06:56 -0400
commit71f349799b34c8b6ce3df42126b4de6cfa16456d (patch)
tree995a9385920e7be80ea9a872442caf1d475c935a /arch/powerpc/boot/dts/holly.dts
parentb786af117b360843349cf66165c4efa0217ca2a7 (diff)
[POWERPC] Convert remaining dts-v0 files to v1
At the moment we have a mixture of left-over version 0 and new-format version 1 files in arch/powerpc/boot/dts. This is potentially confusing to people new to the dts format attempting to figure it out. So, this patch converts all the as-yet unconverted dts v0 files and converts them to v1. They're mechanically-converted, and not hand tweaked so in some cases they're not 100% in keeping with usual v1 style, but the convertor program does have some heuristics so the discrepancies aren't too bad. I have checked that this patch produces no changes to the resulting dtb binaries. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Diffstat (limited to 'arch/powerpc/boot/dts/holly.dts')
-rw-r--r--arch/powerpc/boot/dts/holly.dts122
1 files changed, 62 insertions, 60 deletions
diff --git a/arch/powerpc/boot/dts/holly.dts b/arch/powerpc/boot/dts/holly.dts
index b5d87895fe06..f87fe7b9ced9 100644
--- a/arch/powerpc/boot/dts/holly.dts
+++ b/arch/powerpc/boot/dts/holly.dts
@@ -10,6 +10,8 @@
10 * any warranty of any kind, whether express or implied. 10 * any warranty of any kind, whether express or implied.
11 */ 11 */
12 12
13/dts-v1/;
14
13/ { 15/ {
14 model = "41K7339"; 16 model = "41K7339";
15 compatible = "ibm,holly"; 17 compatible = "ibm,holly";
@@ -21,22 +23,22 @@
21 #size-cells =<0>; 23 #size-cells =<0>;
22 PowerPC,750CL@0 { 24 PowerPC,750CL@0 {
23 device_type = "cpu"; 25 device_type = "cpu";
24 reg = <0>; 26 reg = <0x00000000>;
25 d-cache-line-size = <20>; 27 d-cache-line-size = <32>;
26 i-cache-line-size = <20>; 28 i-cache-line-size = <32>;
27 d-cache-size = <8000>; 29 d-cache-size = <32768>;
28 i-cache-size = <8000>; 30 i-cache-size = <32768>;
29 d-cache-sets = <80>; 31 d-cache-sets = <128>;
30 i-cache-sets = <80>; 32 i-cache-sets = <128>;
31 timebase-frequency = <2faf080>; 33 timebase-frequency = <50000000>;
32 clock-frequency = <23c34600>; 34 clock-frequency = <600000000>;
33 bus-frequency = <bebc200>; 35 bus-frequency = <200000000>;
34 }; 36 };
35 }; 37 };
36 38
37 memory@0 { 39 memory@0 {
38 device_type = "memory"; 40 device_type = "memory";
39 reg = <00000000 20000000>; 41 reg = <0x00000000 0x20000000>;
40 }; 42 };
41 43
42 tsi109@c0000000 { 44 tsi109@c0000000 {
@@ -44,33 +46,33 @@
44 compatible = "tsi109-bridge", "tsi108-bridge"; 46 compatible = "tsi109-bridge", "tsi108-bridge";
45 #address-cells = <1>; 47 #address-cells = <1>;
46 #size-cells = <1>; 48 #size-cells = <1>;
47 ranges = <00000000 c0000000 00010000>; 49 ranges = <0x00000000 0xc0000000 0x00010000>;
48 reg = <c0000000 00010000>; 50 reg = <0xc0000000 0x00010000>;
49 51
50 i2c@7000 { 52 i2c@7000 {
51 device_type = "i2c"; 53 device_type = "i2c";
52 compatible = "tsi109-i2c", "tsi108-i2c"; 54 compatible = "tsi109-i2c", "tsi108-i2c";
53 interrupt-parent = <&MPIC>; 55 interrupt-parent = <&MPIC>;
54 interrupts = <e 2>; 56 interrupts = <0xe 0x2>;
55 reg = <7000 400>; 57 reg = <0x00007000 0x00000400>;
56 }; 58 };
57 59
58 MDIO: mdio@6000 { 60 MDIO: mdio@6000 {
59 device_type = "mdio"; 61 device_type = "mdio";
60 compatible = "tsi109-mdio", "tsi108-mdio"; 62 compatible = "tsi109-mdio", "tsi108-mdio";
61 reg = <6000 50>; 63 reg = <0x00006000 0x00000050>;
62 #address-cells = <1>; 64 #address-cells = <1>;
63 #size-cells = <0>; 65 #size-cells = <0>;
64 66
65 PHY1: ethernet-phy@1 { 67 PHY1: ethernet-phy@1 {
66 compatible = "bcm5461a"; 68 compatible = "bcm5461a";
67 reg = <1>; 69 reg = <0x00000001>;
68 txc-rxc-delay-disable; 70 txc-rxc-delay-disable;
69 }; 71 };
70 72
71 PHY2: ethernet-phy@2 { 73 PHY2: ethernet-phy@2 {
72 compatible = "bcm5461a"; 74 compatible = "bcm5461a";
73 reg = <2>; 75 reg = <0x00000002>;
74 txc-rxc-delay-disable; 76 txc-rxc-delay-disable;
75 }; 77 };
76 }; 78 };
@@ -80,10 +82,10 @@
80 compatible = "tsi109-ethernet", "tsi108-ethernet"; 82 compatible = "tsi109-ethernet", "tsi108-ethernet";
81 #address-cells = <1>; 83 #address-cells = <1>;
82 #size-cells = <0>; 84 #size-cells = <0>;
83 reg = <6000 200>; 85 reg = <0x00006000 0x00000200>;
84 local-mac-address = [ 00 00 00 00 00 00 ]; 86 local-mac-address = [ 00 00 00 00 00 00 ];
85 interrupt-parent = <&MPIC>; 87 interrupt-parent = <&MPIC>;
86 interrupts = <10 2>; 88 interrupts = <0x10 0x2>;
87 mdio-handle = <&MDIO>; 89 mdio-handle = <&MDIO>;
88 phy-handle = <&PHY1>; 90 phy-handle = <&PHY1>;
89 }; 91 };
@@ -93,10 +95,10 @@
93 compatible = "tsi109-ethernet", "tsi108-ethernet"; 95 compatible = "tsi109-ethernet", "tsi108-ethernet";
94 #address-cells = <1>; 96 #address-cells = <1>;
95 #size-cells = <0>; 97 #size-cells = <0>;
96 reg = <6400 200>; 98 reg = <0x00006400 0x00000200>;
97 local-mac-address = [ 00 00 00 00 00 00 ]; 99 local-mac-address = [ 00 00 00 00 00 00 ];
98 interrupt-parent = <&MPIC>; 100 interrupt-parent = <&MPIC>;
99 interrupts = <11 2>; 101 interrupts = <0x11 0x2>;
100 mdio-handle = <&MDIO>; 102 mdio-handle = <&MDIO>;
101 phy-handle = <&PHY2>; 103 phy-handle = <&PHY2>;
102 }; 104 };
@@ -104,23 +106,23 @@
104 serial@7808 { 106 serial@7808 {
105 device_type = "serial"; 107 device_type = "serial";
106 compatible = "ns16550"; 108 compatible = "ns16550";
107 reg = <7808 200>; 109 reg = <0x00007808 0x00000200>;
108 virtual-reg = <c0007808>; 110 virtual-reg = <0xc0007808>;
109 clock-frequency = <3F9C6000>; 111 clock-frequency = <1067212800>;
110 current-speed = <1c200>; 112 current-speed = <115200>;
111 interrupt-parent = <&MPIC>; 113 interrupt-parent = <&MPIC>;
112 interrupts = <c 2>; 114 interrupts = <0xc 0x2>;
113 }; 115 };
114 116
115 serial@7c08 { 117 serial@7c08 {
116 device_type = "serial"; 118 device_type = "serial";
117 compatible = "ns16550"; 119 compatible = "ns16550";
118 reg = <7c08 200>; 120 reg = <0x00007c08 0x00000200>;
119 virtual-reg = <c0007c08>; 121 virtual-reg = <0xc0007c08>;
120 clock-frequency = <3F9C6000>; 122 clock-frequency = <1067212800>;
121 current-speed = <1c200>; 123 current-speed = <115200>;
122 interrupt-parent = <&MPIC>; 124 interrupt-parent = <&MPIC>;
123 interrupts = <d 2>; 125 interrupts = <0xd 0x2>;
124 }; 126 };
125 127
126 MPIC: pic@7400 { 128 MPIC: pic@7400 {
@@ -128,7 +130,7 @@
128 compatible = "chrp,open-pic"; 130 compatible = "chrp,open-pic";
129 interrupt-controller; 131 interrupt-controller;
130 #interrupt-cells = <2>; 132 #interrupt-cells = <2>;
131 reg = <7400 400>; 133 reg = <0x00007400 0x00000400>;
132 big-endian; 134 big-endian;
133 }; 135 };
134 136
@@ -138,42 +140,42 @@
138 #interrupt-cells = <1>; 140 #interrupt-cells = <1>;
139 #size-cells = <2>; 141 #size-cells = <2>;
140 #address-cells = <3>; 142 #address-cells = <3>;
141 reg = <1000 1000>; 143 reg = <0x00001000 0x00001000>;
142 bus-range = <0 0>; 144 bus-range = <0x0 0x0>;
143 /*----------------------------------------------------+ 145 /*----------------------------------------------------+
144 | PCI memory range. 146 | PCI memory range.
145 | 01 denotes I/O space 147 | 01 denotes I/O space
146 | 02 denotes 32-bit memory space 148 | 02 denotes 32-bit memory space
147 +----------------------------------------------------*/ 149 +----------------------------------------------------*/
148 ranges = <02000000 0 40000000 40000000 0 10000000 150 ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000
149 01000000 0 00000000 7e000000 0 00010000>; 151 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>;
150 clock-frequency = <7f28154>; 152 clock-frequency = <133333332>;
151 interrupt-parent = <&MPIC>; 153 interrupt-parent = <&MPIC>;
152 interrupts = <17 2>; 154 interrupts = <0x17 0x2>;
153 interrupt-map-mask = <f800 0 0 7>; 155 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
154 /*----------------------------------------------------+ 156 /*----------------------------------------------------+
155 | The INTA, INTB, INTC, INTD are shared. 157 | The INTA, INTB, INTC, INTD are shared.
156 +----------------------------------------------------*/ 158 +----------------------------------------------------*/
157 interrupt-map = < 159 interrupt-map = <
158 0800 0 0 1 &RT0 24 0 160 0x800 0x0 0x0 0x1 &RT0 0x24 0x0
159 0800 0 0 2 &RT0 25 0 161 0x800 0x0 0x0 0x2 &RT0 0x25 0x0
160 0800 0 0 3 &RT0 26 0 162 0x800 0x0 0x0 0x3 &RT0 0x26 0x0
161 0800 0 0 4 &RT0 27 0 163 0x800 0x0 0x0 0x4 &RT0 0x27 0x0
162 164
163 1000 0 0 1 &RT0 25 0 165 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
164 1000 0 0 2 &RT0 26 0 166 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
165 1000 0 0 3 &RT0 27 0 167 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
166 1000 0 0 4 &RT0 24 0 168 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
167 169
168 1800 0 0 1 &RT0 26 0 170 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
169 1800 0 0 2 &RT0 27 0 171 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
170 1800 0 0 3 &RT0 24 0 172 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
171 1800 0 0 4 &RT0 25 0 173 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
172 174
173 2000 0 0 1 &RT0 27 0 175 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
174 2000 0 0 2 &RT0 24 0 176 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
175 2000 0 0 3 &RT0 25 0 177 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
176 2000 0 0 4 &RT0 26 0 178 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
177 >; 179 >;
178 180
179 RT0: router@1180 { 181 RT0: router@1180 {
@@ -183,7 +185,7 @@
183 clock-frequency = <0>; 185 clock-frequency = <0>;
184 #address-cells = <0>; 186 #address-cells = <0>;
185 #interrupt-cells = <2>; 187 #interrupt-cells = <2>;
186 interrupts = <17 2>; 188 interrupts = <0x17 0x2>;
187 interrupt-parent = <&MPIC>; 189 interrupt-parent = <&MPIC>;
188 }; 190 };
189 }; 191 };
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-03 21:18:53 -0500