Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (185 commits)
  powerpc: fix compile error with 85xx/p1010rdb.c
  powerpc: fix compile error with 85xx/p1023_rds.c
  powerpc/fsl: add MSI support for the Freescale hypervisor
  arch/powerpc/sysdev/fsl_rmu.c: introduce missing kfree
  powerpc/fsl: Add support for Integrated Flash Controller
  powerpc/fsl: update compatiable on fsl 16550 uart nodes
  powerpc/85xx: fix PCI and localbus properties in p1022ds.dts
  powerpc/85xx: re-enable ePAPR byte channel driver in corenet32_smp_defconfig
  powerpc/fsl: Update defconfigs to enable some standard FSL HW features
  powerpc: Add TBI PHY node to first MDIO bus
  sbc834x: put full compat string in board match check
  powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
  powerpc: Fix unpaired probe_hcall_entry and probe_hcall_exit
  offb: Fix setting of the pseudo-palette for >8bpp
  offb: Add palette hack for qemu "standard vga" framebuffer
  offb: Fix bug in calculating requested vram size
  powerpc/boot: Change the WARN to INFO for boot wrapper overlap message
  powerpc/44x: Fix build error on currituck platform
  powerpc/boot: Change the load address for the wrapper to fit the kernel
  powerpc/44x: Enable CRASH_DUMP for 440x
  ...

Fix up a trivial conflict in arch/powerpc/include/asm/cputime.h due to
the additional sparse-checking code for cputime_t.

1 files changed, 248 insertions, 0 deletions

diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
new file mode 100644
index 000000000000..89af62637707
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
@@ -0,0 +1,248 @@
+/*
+ * MPC8536 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus";
+        interrupts = <19 2 0 0>;
+};
+
+/* controller at 0x8000 */
+&pci0 {
+        compatible = "fsl,mpc8540-pci";
+        device_type = "pci";
+        interrupts = <24 0x2 0 0>;
+        bus-range = <0 0xff>;
+        #interrupt-cells = <1>;
+        #size-cells = <2>;
+        #address-cells = <3>;
+};
+
+/* controller at 0x9000 */
+&pci1 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <25 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <25 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xa000 */
+&pci2 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <26 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <26 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+                        >;
+        };
+};
+
+/* controller at 0xb000 */
+&pci3 {
+        compatible = "fsl,mpc8548-pcie";
+        device_type = "pci";
+        #size-cells = <2>;
+        #address-cells = <3>;
+        bus-range = <0 255>;
+        clock-frequency = <33333333>;
+        interrupts = <27 2 0 0>;
+
+        pcie@0 {
+                reg = <0 0 0 0 0>;
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                interrupts = <27 2 0 0>;
+                interrupt-map-mask = <0xf800 0 0 7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
+                        0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
+                        0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
+                        0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
+                        >;
+        };
+};
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,mpc8536-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+
+        ecm@1000 {
+                compatible = "fsl,mpc8536-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <17 2 0 0>;
+        };
+
+        memory-controller@2000 {
+                compatible = "fsl,mpc8536-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <18 2 0 0>;
+        };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+
+/include/ "pq3-espi-0.dtsi"
+        spi@7000 {
+                fsl,espi-num-chipselects = <4>;
+        };
+
+/include/ "pq3-gpio-0.dtsi"
+
+        /* mark compat w/8572 to get some erratum treatment */
+        gpio-controller@f000 {
+                compatible = "fsl,mpc8572-gpio", "fsl,pq3-gpio";
+        };
+
+        sata@18000 {
+                compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
+                reg = <0x18000 0x1000>;
+                cell-index = <1>;
+                interrupts = <74 0x2 0 0>;
+        };
+
+        sata@19000 {
+                compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
+                reg = <0x19000 0x1000>;
+                cell-index = <2>;
+                interrupts = <41 0x2 0 0>;
+        };
+
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,mpc8536-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x80000>; // L2, 512K
+                interrupts = <16 2 0 0>;
+        };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-etsec1-0.dtsi"
+/include/ "pq3-etsec1-timer-0.dtsi"
+
+        usb@22000 {
+                compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
+                reg = <0x22000 0x1000>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <28 0x2 0 0>;
+        };
+
+        usb@23000 {
+                compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
+                reg = <0x23000 0x1000>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <46 0x2 0 0>;
+        };
+
+        ptp_clock@24e00 {
+                interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
+        };
+
+/include/ "pq3-etsec1-2.dtsi"
+
+        ethernet@26000 {
+                cell-index = <1>;
+        };
+
+        usb@2b000 {
+                compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
+                reg = <0x2b000 0x1000>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+                interrupts = <60 0x2 0 0>;
+        };
+
+/include/ "pq3-esdhc-0.dtsi"
+/include/ "pq3-sec3.0-0.dtsi"
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+        global-utilities@e0000 {
+                compatible = "fsl,mpc8536-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};