diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-06-08 14:51:13 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-06-08 14:51:13 -0400 |
commit | 554e6e9f816bdf08c2962e6f003f8298c935646b (patch) | |
tree | 8adb0eb9738b86b0ce038acb227df1e915cf378f /arch/mips | |
parent | 17d8dfcda6ce570ddc4844f490104fed4af215aa (diff) | |
parent | cdfce53986a39daf039b62b69026867734d8430a (diff) |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle:
"MIPS fixes across the field. The only area that's standing out is the
exception handling which received it's dose of breakage as part of the
microMIPS patchset"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
MIPS: ralink: add missing SZ_1M multiplier
MIPS: Compat: Fix cputime_to_timeval() arguments in compat binfmt_elf.
MIPS: OCTEON: Improve _machine_halt implementation.
MIPS: rtlx: Fix implicit declaration of function set_vi_handler()
MIPS: Trap exception handling fixes
MIPS: Quit exposing Kconfig symbols in uapi headers.
MIPS: Remove duplicate definition of check_for_high_segbits.
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/cavium-octeon/setup.c | 15 | ||||
-rw-r--r-- | arch/mips/include/asm/ptrace.h | 32 | ||||
-rw-r--r-- | arch/mips/include/uapi/asm/ptrace.h | 17 | ||||
-rw-r--r-- | arch/mips/kernel/binfmt_elfn32.c | 11 | ||||
-rw-r--r-- | arch/mips/kernel/binfmt_elfo32.c | 11 | ||||
-rw-r--r-- | arch/mips/kernel/rtlx.c | 1 | ||||
-rw-r--r-- | arch/mips/kernel/traps.c | 28 | ||||
-rw-r--r-- | arch/mips/mm/tlbex.c | 4 | ||||
-rw-r--r-- | arch/mips/ralink/of.c | 2 |
9 files changed, 82 insertions, 39 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index b0baa299f899..01b1b3f94feb 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c | |||
@@ -428,13 +428,16 @@ static void octeon_restart(char *command) | |||
428 | */ | 428 | */ |
429 | static void octeon_kill_core(void *arg) | 429 | static void octeon_kill_core(void *arg) |
430 | { | 430 | { |
431 | mb(); | 431 | if (octeon_is_simulation()) |
432 | if (octeon_is_simulation()) { | ||
433 | /* The simulator needs the watchdog to stop for dead cores */ | ||
434 | cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0); | ||
435 | /* A break instruction causes the simulator stop a core */ | 432 | /* A break instruction causes the simulator stop a core */ |
436 | asm volatile ("sync\nbreak"); | 433 | asm volatile ("break" ::: "memory"); |
437 | } | 434 | |
435 | local_irq_disable(); | ||
436 | /* Disable watchdog on this core. */ | ||
437 | cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0); | ||
438 | /* Spin in a low power mode. */ | ||
439 | while (true) | ||
440 | asm volatile ("wait" ::: "memory"); | ||
438 | } | 441 | } |
439 | 442 | ||
440 | 443 | ||
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h index a3186f2bb8a0..5e6cd0947393 100644 --- a/arch/mips/include/asm/ptrace.h +++ b/arch/mips/include/asm/ptrace.h | |||
@@ -16,6 +16,38 @@ | |||
16 | #include <asm/isadep.h> | 16 | #include <asm/isadep.h> |
17 | #include <uapi/asm/ptrace.h> | 17 | #include <uapi/asm/ptrace.h> |
18 | 18 | ||
19 | /* | ||
20 | * This struct defines the way the registers are stored on the stack during a | ||
21 | * system call/exception. As usual the registers k0/k1 aren't being saved. | ||
22 | */ | ||
23 | struct pt_regs { | ||
24 | #ifdef CONFIG_32BIT | ||
25 | /* Pad bytes for argument save space on the stack. */ | ||
26 | unsigned long pad0[6]; | ||
27 | #endif | ||
28 | |||
29 | /* Saved main processor registers. */ | ||
30 | unsigned long regs[32]; | ||
31 | |||
32 | /* Saved special registers. */ | ||
33 | unsigned long cp0_status; | ||
34 | unsigned long hi; | ||
35 | unsigned long lo; | ||
36 | #ifdef CONFIG_CPU_HAS_SMARTMIPS | ||
37 | unsigned long acx; | ||
38 | #endif | ||
39 | unsigned long cp0_badvaddr; | ||
40 | unsigned long cp0_cause; | ||
41 | unsigned long cp0_epc; | ||
42 | #ifdef CONFIG_MIPS_MT_SMTC | ||
43 | unsigned long cp0_tcstatus; | ||
44 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
45 | #ifdef CONFIG_CPU_CAVIUM_OCTEON | ||
46 | unsigned long long mpl[3]; /* MTM{0,1,2} */ | ||
47 | unsigned long long mtp[3]; /* MTP{0,1,2} */ | ||
48 | #endif | ||
49 | } __aligned(8); | ||
50 | |||
19 | struct task_struct; | 51 | struct task_struct; |
20 | 52 | ||
21 | extern int ptrace_getregs(struct task_struct *child, __s64 __user *data); | 53 | extern int ptrace_getregs(struct task_struct *child, __s64 __user *data); |
diff --git a/arch/mips/include/uapi/asm/ptrace.h b/arch/mips/include/uapi/asm/ptrace.h index 4d58d8468705..b26f7e317279 100644 --- a/arch/mips/include/uapi/asm/ptrace.h +++ b/arch/mips/include/uapi/asm/ptrace.h | |||
@@ -22,16 +22,12 @@ | |||
22 | #define DSP_CONTROL 77 | 22 | #define DSP_CONTROL 77 |
23 | #define ACX 78 | 23 | #define ACX 78 |
24 | 24 | ||
25 | #ifndef __KERNEL__ | ||
25 | /* | 26 | /* |
26 | * This struct defines the way the registers are stored on the stack during a | 27 | * This struct defines the way the registers are stored on the stack during a |
27 | * system call/exception. As usual the registers k0/k1 aren't being saved. | 28 | * system call/exception. As usual the registers k0/k1 aren't being saved. |
28 | */ | 29 | */ |
29 | struct pt_regs { | 30 | struct pt_regs { |
30 | #ifdef CONFIG_32BIT | ||
31 | /* Pad bytes for argument save space on the stack. */ | ||
32 | unsigned long pad0[6]; | ||
33 | #endif | ||
34 | |||
35 | /* Saved main processor registers. */ | 31 | /* Saved main processor registers. */ |
36 | unsigned long regs[32]; | 32 | unsigned long regs[32]; |
37 | 33 | ||
@@ -39,20 +35,11 @@ struct pt_regs { | |||
39 | unsigned long cp0_status; | 35 | unsigned long cp0_status; |
40 | unsigned long hi; | 36 | unsigned long hi; |
41 | unsigned long lo; | 37 | unsigned long lo; |
42 | #ifdef CONFIG_CPU_HAS_SMARTMIPS | ||
43 | unsigned long acx; | ||
44 | #endif | ||
45 | unsigned long cp0_badvaddr; | 38 | unsigned long cp0_badvaddr; |
46 | unsigned long cp0_cause; | 39 | unsigned long cp0_cause; |
47 | unsigned long cp0_epc; | 40 | unsigned long cp0_epc; |
48 | #ifdef CONFIG_MIPS_MT_SMTC | ||
49 | unsigned long cp0_tcstatus; | ||
50 | #endif /* CONFIG_MIPS_MT_SMTC */ | ||
51 | #ifdef CONFIG_CPU_CAVIUM_OCTEON | ||
52 | unsigned long long mpl[3]; /* MTM{0,1,2} */ | ||
53 | unsigned long long mtp[3]; /* MTP{0,1,2} */ | ||
54 | #endif | ||
55 | } __attribute__ ((aligned (8))); | 41 | } __attribute__ ((aligned (8))); |
42 | #endif /* __KERNEL__ */ | ||
56 | 43 | ||
57 | /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ | 44 | /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ |
58 | #define PTRACE_GETREGS 12 | 45 | #define PTRACE_GETREGS 12 |
diff --git a/arch/mips/kernel/binfmt_elfn32.c b/arch/mips/kernel/binfmt_elfn32.c index e06f777e9c49..1188e00bb120 100644 --- a/arch/mips/kernel/binfmt_elfn32.c +++ b/arch/mips/kernel/binfmt_elfn32.c | |||
@@ -119,4 +119,15 @@ MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)"); | |||
119 | #undef TASK_SIZE | 119 | #undef TASK_SIZE |
120 | #define TASK_SIZE TASK_SIZE32 | 120 | #define TASK_SIZE TASK_SIZE32 |
121 | 121 | ||
122 | #undef cputime_to_timeval | ||
123 | #define cputime_to_timeval cputime_to_compat_timeval | ||
124 | static __inline__ void | ||
125 | cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value) | ||
126 | { | ||
127 | unsigned long jiffies = cputime_to_jiffies(cputime); | ||
128 | |||
129 | value->tv_usec = (jiffies % HZ) * (1000000L / HZ); | ||
130 | value->tv_sec = jiffies / HZ; | ||
131 | } | ||
132 | |||
122 | #include "../../../fs/binfmt_elf.c" | 133 | #include "../../../fs/binfmt_elf.c" |
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c index 97c5a1668e53..202e581e6096 100644 --- a/arch/mips/kernel/binfmt_elfo32.c +++ b/arch/mips/kernel/binfmt_elfo32.c | |||
@@ -162,4 +162,15 @@ MODULE_AUTHOR("Ralf Baechle (ralf@linux-mips.org)"); | |||
162 | #undef TASK_SIZE | 162 | #undef TASK_SIZE |
163 | #define TASK_SIZE TASK_SIZE32 | 163 | #define TASK_SIZE TASK_SIZE32 |
164 | 164 | ||
165 | #undef cputime_to_timeval | ||
166 | #define cputime_to_timeval cputime_to_compat_timeval | ||
167 | static __inline__ void | ||
168 | cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval *value) | ||
169 | { | ||
170 | unsigned long jiffies = cputime_to_jiffies(cputime); | ||
171 | |||
172 | value->tv_usec = (jiffies % HZ) * (1000000L / HZ); | ||
173 | value->tv_sec = jiffies / HZ; | ||
174 | } | ||
175 | |||
165 | #include "../../../fs/binfmt_elf.c" | 176 | #include "../../../fs/binfmt_elf.c" |
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c index 93c070b41b0d..6fa198db8999 100644 --- a/arch/mips/kernel/rtlx.c +++ b/arch/mips/kernel/rtlx.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #include <asm/processor.h> | 40 | #include <asm/processor.h> |
41 | #include <asm/vpe.h> | 41 | #include <asm/vpe.h> |
42 | #include <asm/rtlx.h> | 42 | #include <asm/rtlx.h> |
43 | #include <asm/setup.h> | ||
43 | 44 | ||
44 | static struct rtlx_info *rtlx; | 45 | static struct rtlx_info *rtlx; |
45 | static int major; | 46 | static int major; |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index e3be67012d78..a75ae40184aa 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -897,22 +897,24 @@ out_sigsegv: | |||
897 | 897 | ||
898 | asmlinkage void do_tr(struct pt_regs *regs) | 898 | asmlinkage void do_tr(struct pt_regs *regs) |
899 | { | 899 | { |
900 | unsigned int opcode, tcode = 0; | 900 | u32 opcode, tcode = 0; |
901 | u16 instr[2]; | 901 | u16 instr[2]; |
902 | unsigned long epc = exception_epc(regs); | 902 | unsigned long epc = msk_isa16_mode(exception_epc(regs)); |
903 | 903 | ||
904 | if ((__get_user(instr[0], (u16 __user *)msk_isa16_mode(epc))) || | 904 | if (get_isa16_mode(regs->cp0_epc)) { |
905 | (__get_user(instr[1], (u16 __user *)msk_isa16_mode(epc + 2)))) | 905 | if (__get_user(instr[0], (u16 __user *)(epc + 0)) || |
906 | __get_user(instr[1], (u16 __user *)(epc + 2))) | ||
906 | goto out_sigsegv; | 907 | goto out_sigsegv; |
907 | opcode = (instr[0] << 16) | instr[1]; | 908 | opcode = (instr[0] << 16) | instr[1]; |
908 | 909 | /* Immediate versions don't provide a code. */ | |
909 | /* Immediate versions don't provide a code. */ | 910 | if (!(opcode & OPCODE)) |
910 | if (!(opcode & OPCODE)) { | 911 | tcode = (opcode >> 12) & ((1 << 4) - 1); |
911 | if (get_isa16_mode(regs->cp0_epc)) | 912 | } else { |
912 | /* microMIPS */ | 913 | if (__get_user(opcode, (u32 __user *)epc)) |
913 | tcode = (opcode >> 12) & 0x1f; | 914 | goto out_sigsegv; |
914 | else | 915 | /* Immediate versions don't provide a code. */ |
915 | tcode = ((opcode >> 6) & ((1 << 10) - 1)); | 916 | if (!(opcode & OPCODE)) |
917 | tcode = (opcode >> 6) & ((1 << 10) - 1); | ||
916 | } | 918 | } |
917 | 919 | ||
918 | do_trap_or_bp(regs, tcode, "Trap"); | 920 | do_trap_or_bp(regs, tcode, "Trap"); |
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index ce9818eef7d3..afeef93f81a7 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
@@ -301,10 +301,6 @@ static u32 tlb_handler[128] __cpuinitdata; | |||
301 | static struct uasm_label labels[128] __cpuinitdata; | 301 | static struct uasm_label labels[128] __cpuinitdata; |
302 | static struct uasm_reloc relocs[128] __cpuinitdata; | 302 | static struct uasm_reloc relocs[128] __cpuinitdata; |
303 | 303 | ||
304 | #ifdef CONFIG_64BIT | ||
305 | static int check_for_high_segbits __cpuinitdata; | ||
306 | #endif | ||
307 | |||
308 | static int check_for_high_segbits __cpuinitdata; | 304 | static int check_for_high_segbits __cpuinitdata; |
309 | 305 | ||
310 | static unsigned int kscratch_used_mask __cpuinitdata; | 306 | static unsigned int kscratch_used_mask __cpuinitdata; |
diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c index fb1569580def..6b5f3406f414 100644 --- a/arch/mips/ralink/of.c +++ b/arch/mips/ralink/of.c | |||
@@ -88,7 +88,7 @@ void __init plat_mem_setup(void) | |||
88 | __dt_setup_arch(&__dtb_start); | 88 | __dt_setup_arch(&__dtb_start); |
89 | 89 | ||
90 | if (soc_info.mem_size) | 90 | if (soc_info.mem_size) |
91 | add_memory_region(soc_info.mem_base, soc_info.mem_size, | 91 | add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M, |
92 | BOOT_MEM_RAM); | 92 | BOOT_MEM_RAM); |
93 | else | 93 | else |
94 | detect_memory_region(soc_info.mem_base, | 94 | detect_memory_region(soc_info.mem_base, |