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authorThomas Gleixner <tglx@linutronix.de>2011-03-23 17:09:17 -0400
committerRalf Baechle <ralf@linux-mips.org>2011-03-25 13:45:20 -0400
commitfbaa4e2a19a4b85b38464cf2683e4d275b4d970c (patch)
tree810aa976c773abbf4f0affdec94d24b067435ee5 /arch/mips/vr41xx/common/irq.c
parentd7ae7c7137868fca5a18954f4d70d525f38867c9 (diff)
MIPS: VR41xx: Convert to new irq_chip functions
And cleanup direct access to irq_desc[]. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2208/ Patchwork: https://patchwork.linux-mips.org/patch/2209/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/vr41xx/common/irq.c')
-rw-r--r--arch/mips/vr41xx/common/irq.c19
1 files changed, 10 insertions, 9 deletions
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c
index 0975eb72d385..9ff7f397c0e1 100644
--- a/arch/mips/vr41xx/common/irq.c
+++ b/arch/mips/vr41xx/common/irq.c
@@ -62,7 +62,6 @@ EXPORT_SYMBOL_GPL(cascade_irq);
62static void irq_dispatch(unsigned int irq) 62static void irq_dispatch(unsigned int irq)
63{ 63{
64 irq_cascade_t *cascade; 64 irq_cascade_t *cascade;
65 struct irq_desc *desc;
66 65
67 if (irq >= NR_IRQS) { 66 if (irq >= NR_IRQS) {
68 atomic_inc(&irq_err_count); 67 atomic_inc(&irq_err_count);
@@ -71,14 +70,16 @@ static void irq_dispatch(unsigned int irq)
71 70
72 cascade = irq_cascade + irq; 71 cascade = irq_cascade + irq;
73 if (cascade->get_irq != NULL) { 72 if (cascade->get_irq != NULL) {
74 unsigned int source_irq = irq; 73 struct irq_desc *desc = irq_to_desc(irq);
74 struct irq_data *idata = irq_desc_get_irq_data(desc);
75 struct irq_chip *chip = irq_desc_get_chip(desc);
75 int ret; 76 int ret;
76 desc = irq_desc + source_irq; 77
77 if (desc->chip->mask_ack) 78 if (chip->irq_mask_ack)
78 desc->chip->mask_ack(source_irq); 79 chip->irq_mask_ack(idata);
79 else { 80 else {
80 desc->chip->mask(source_irq); 81 chip->irq_mask(idata);
81 desc->chip->ack(source_irq); 82 chip->irq_ack(idata);
82 } 83 }
83 ret = cascade->get_irq(irq); 84 ret = cascade->get_irq(irq);
84 irq = ret; 85 irq = ret;
@@ -86,8 +87,8 @@ static void irq_dispatch(unsigned int irq)
86 atomic_inc(&irq_err_count); 87 atomic_inc(&irq_err_count);
87 else 88 else
88 irq_dispatch(irq); 89 irq_dispatch(irq);
89 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) 90 if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask)
90 desc->chip->unmask(source_irq); 91 chip->irq_unmask(idata);
91 } else 92 } else
92 do_IRQ(irq); 93 do_IRQ(irq);
93} 94}