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authorRalf Baechle <ralf@linux-mips.org>2013-01-22 06:59:30 -0500
committerRalf Baechle <ralf@linux-mips.org>2013-02-01 04:00:22 -0500
commit7034228792cc561e79ff8600f02884bd4c80e287 (patch)
tree89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/pci/pci-vr41xx.c
parent405ab01c70e18058d9c01a1256769a61fc65413e (diff)
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/pci/pci-vr41xx.c')
-rw-r--r--arch/mips/pci/pci-vr41xx.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c
index 444b8d8004ad..157c7715b7c8 100644
--- a/arch/mips/pci/pci-vr41xx.c
+++ b/arch/mips/pci/pci-vr41xx.c
@@ -69,17 +69,17 @@ static struct pci_target_address_window pci_target_window1 = {
69}; 69};
70 70
71static struct resource pci_mem_resource = { 71static struct resource pci_mem_resource = {
72 .name = "PCI Memory resources", 72 .name = "PCI Memory resources",
73 .start = PCI_MEM_RESOURCE_START, 73 .start = PCI_MEM_RESOURCE_START,
74 .end = PCI_MEM_RESOURCE_END, 74 .end = PCI_MEM_RESOURCE_END,
75 .flags = IORESOURCE_MEM, 75 .flags = IORESOURCE_MEM,
76}; 76};
77 77
78static struct resource pci_io_resource = { 78static struct resource pci_io_resource = {
79 .name = "PCI I/O resources", 79 .name = "PCI I/O resources",
80 .start = PCI_IO_RESOURCE_START, 80 .start = PCI_IO_RESOURCE_START,
81 .end = PCI_IO_RESOURCE_END, 81 .end = PCI_IO_RESOURCE_END,
82 .flags = IORESOURCE_IO, 82 .flags = IORESOURCE_IO,
83}; 83};
84 84
85static struct pci_controller_unit_setup vr41xx_pci_controller_unit_setup = { 85static struct pci_controller_unit_setup vr41xx_pci_controller_unit_setup = {
@@ -97,7 +97,7 @@ static struct pci_controller_unit_setup vr41xx_pci_controller_unit_setup = {
97}; 97};
98 98
99static struct pci_controller vr41xx_pci_controller = { 99static struct pci_controller vr41xx_pci_controller = {
100 .pci_ops = &vr41xx_pci_ops, 100 .pci_ops = &vr41xx_pci_ops,
101 .mem_resource = &pci_mem_resource, 101 .mem_resource = &pci_mem_resource,
102 .io_resource = &pci_io_resource, 102 .io_resource = &pci_io_resource,
103}; 103};
@@ -148,7 +148,7 @@ static int __init vr41xx_pciu_init(void)
148 else if ((vtclock / 2) < pci_clock_max) 148 else if ((vtclock / 2) < pci_clock_max)
149 pciu_write(PCICLKSELREG, HALF_VTCLOCK); 149 pciu_write(PCICLKSELREG, HALF_VTCLOCK);
150 else if (current_cpu_data.processor_id >= PRID_VR4131_REV2_1 && 150 else if (current_cpu_data.processor_id >= PRID_VR4131_REV2_1 &&
151 (vtclock / 3) < pci_clock_max) 151 (vtclock / 3) < pci_clock_max)
152 pciu_write(PCICLKSELREG, ONE_THIRD_VTCLOCK); 152 pciu_write(PCICLKSELREG, ONE_THIRD_VTCLOCK);
153 else if ((vtclock / 4) < pci_clock_max) 153 else if ((vtclock / 4) < pci_clock_max)
154 pciu_write(PCICLKSELREG, QUARTER_VTCLOCK); 154 pciu_write(PCICLKSELREG, QUARTER_VTCLOCK);
@@ -281,7 +281,7 @@ static int __init vr41xx_pciu_init(void)
281 pciu_write(PCIAPCNTREG, val); 281 pciu_write(PCIAPCNTREG, val);
282 282
283 pciu_write(COMMANDREG, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | 283 pciu_write(COMMANDREG, PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
284 PCI_COMMAND_MASTER | PCI_COMMAND_PARITY | 284 PCI_COMMAND_MASTER | PCI_COMMAND_PARITY |
285 PCI_COMMAND_SERR); 285 PCI_COMMAND_SERR);
286 286
287 /* Clear bus error */ 287 /* Clear bus error */