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authorSteven J. Hill <sjhill@mips.com>2012-05-11 00:21:18 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-05-15 11:48:39 -0400
commit03751e792420f88e224ce247dfdd26a6ba3e4091 (patch)
tree0f286847f083fec011e6b15f1d52e600adab6280 /arch/mips/kernel/proc.c
parent36be50515fe2aef61533b516fa2576a2c7fe7664 (diff)
MIPS: Code formatting fixes.
Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/proc.c')
-rw-r--r--arch/mips/kernel/proc.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index f8b2c592514d..5542817c1b49 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -41,27 +41,27 @@ static int show_cpuinfo(struct seq_file *m, void *v)
41 41
42 seq_printf(m, "processor\t\t: %ld\n", n); 42 seq_printf(m, "processor\t\t: %ld\n", n);
43 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n", 43 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
44 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : ""); 44 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
45 seq_printf(m, fmt, __cpu_name[n], 45 seq_printf(m, fmt, __cpu_name[n],
46 (version >> 4) & 0x0f, version & 0x0f, 46 (version >> 4) & 0x0f, version & 0x0f,
47 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f); 47 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
48 seq_printf(m, "BogoMIPS\t\t: %u.%02u\n", 48 seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
49 cpu_data[n].udelay_val / (500000/HZ), 49 cpu_data[n].udelay_val / (500000/HZ),
50 (cpu_data[n].udelay_val / (5000/HZ)) % 100); 50 (cpu_data[n].udelay_val / (5000/HZ)) % 100);
51 seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no"); 51 seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
52 seq_printf(m, "microsecond timers\t: %s\n", 52 seq_printf(m, "microsecond timers\t: %s\n",
53 cpu_has_counter ? "yes" : "no"); 53 cpu_has_counter ? "yes" : "no");
54 seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize); 54 seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
55 seq_printf(m, "extra interrupt vector\t: %s\n", 55 seq_printf(m, "extra interrupt vector\t: %s\n",
56 cpu_has_divec ? "yes" : "no"); 56 cpu_has_divec ? "yes" : "no");
57 seq_printf(m, "hardware watchpoint\t: %s", 57 seq_printf(m, "hardware watchpoint\t: %s",
58 cpu_has_watch ? "yes, " : "no\n"); 58 cpu_has_watch ? "yes, " : "no\n");
59 if (cpu_has_watch) { 59 if (cpu_has_watch) {
60 seq_printf(m, "count: %d, address/irw mask: [", 60 seq_printf(m, "count: %d, address/irw mask: [",
61 cpu_data[n].watch_reg_count); 61 cpu_data[n].watch_reg_count);
62 for (i = 0; i < cpu_data[n].watch_reg_count; i++) 62 for (i = 0; i < cpu_data[n].watch_reg_count; i++)
63 seq_printf(m, "%s0x%04x", i ? ", " : "" , 63 seq_printf(m, "%s0x%04x", i ? ", " : "" ,
64 cpu_data[n].watch_reg_masks[i]); 64 cpu_data[n].watch_reg_masks[i]);
65 seq_printf(m, "]\n"); 65 seq_printf(m, "]\n");
66 } 66 }
67 seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n", 67 seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
@@ -73,13 +73,13 @@ static int show_cpuinfo(struct seq_file *m, void *v)
73 cpu_has_mipsmt ? " mt" : "" 73 cpu_has_mipsmt ? " mt" : ""
74 ); 74 );
75 seq_printf(m, "shadow register sets\t: %d\n", 75 seq_printf(m, "shadow register sets\t: %d\n",
76 cpu_data[n].srsets); 76 cpu_data[n].srsets);
77 seq_printf(m, "kscratch registers\t: %d\n", 77 seq_printf(m, "kscratch registers\t: %d\n",
78 hweight8(cpu_data[n].kscratch_mask)); 78 hweight8(cpu_data[n].kscratch_mask));
79 seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); 79 seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
80 80
81 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", 81 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
82 cpu_has_vce ? "%u" : "not available"); 82 cpu_has_vce ? "%u" : "not available");
83 seq_printf(m, fmt, 'D', vced_count); 83 seq_printf(m, fmt, 'D', vced_count);
84 seq_printf(m, fmt, 'I', vcei_count); 84 seq_printf(m, fmt, 'I', vcei_count);
85 seq_printf(m, "\n"); 85 seq_printf(m, "\n");