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authorManuel Lauss <manuel.lauss@googlemail.com>2011-12-08 05:42:15 -0500
committerRalf Baechle <ralf@linux-mips.org>2011-12-08 05:42:15 -0500
commitcd671c16f0b18c83d949218867b2d88583080b36 (patch)
tree68b3bbabb335ca0b76c343bb7a2af54a73dfdb04 /arch/mips/include/asm/mach-au1x00/au1000.h
parent4d2216afeeaa1571f7608107f41cdb2ac6fe30b1 (diff)
net/irda: convert au1k_ir to platform driver.
Moderate driver cleanup: convert to platform driver, get rid of board-specific code. Driver loads and runs on a DB1100 board. But since I have no other IrDA hardware to exchange data with I can't say whether it really sends and receives. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: Samuel Ortiz <samuel@sortiz.org> Cc: netdev@vger.kernel.org To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2877/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-au1x00/au1000.h')
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h52
1 files changed, 14 insertions, 38 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index 65f126217175..569828d3ccab 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -1265,44 +1265,20 @@ enum soc_au1200_ints {
1265#define SSI_ENABLE_CD (1 << 1) 1265#define SSI_ENABLE_CD (1 << 1)
1266#define SSI_ENABLE_E (1 << 0) 1266#define SSI_ENABLE_E (1 << 0)
1267 1267
1268/* IrDA Controller */ 1268
1269#define IRDA_BASE 0xB0300000 1269/*
1270#define IR_RING_PTR_STATUS (IRDA_BASE + 0x00) 1270 * The IrDA peripheral has an IRFIRSEL pin, but on the DB/PB boards it's not
1271#define IR_RING_BASE_ADDR_H (IRDA_BASE + 0x04) 1271 * used to select FIR/SIR mode on the transceiver but as a GPIO. Instead a
1272#define IR_RING_BASE_ADDR_L (IRDA_BASE + 0x08) 1272 * CPLD has to be told about the mode.
1273#define IR_RING_SIZE (IRDA_BASE + 0x0C) 1273 */
1274#define IR_RING_PROMPT (IRDA_BASE + 0x10) 1274#define AU1000_IRDA_PHY_MODE_OFF 0
1275#define IR_RING_ADDR_CMPR (IRDA_BASE + 0x14) 1275#define AU1000_IRDA_PHY_MODE_SIR 1
1276#define IR_INT_CLEAR (IRDA_BASE + 0x18) 1276#define AU1000_IRDA_PHY_MODE_FIR 2
1277#define IR_CONFIG_1 (IRDA_BASE + 0x20) 1277
1278# define IR_RX_INVERT_LED (1 << 0) 1278struct au1k_irda_platform_data {
1279# define IR_TX_INVERT_LED (1 << 1) 1279 void(*set_phy_mode)(int mode);
1280# define IR_ST (1 << 2) 1280};
1281# define IR_SF (1 << 3) 1281
1282# define IR_SIR (1 << 4)
1283# define IR_MIR (1 << 5)
1284# define IR_FIR (1 << 6)
1285# define IR_16CRC (1 << 7)
1286# define IR_TD (1 << 8)
1287# define IR_RX_ALL (1 << 9)
1288# define IR_DMA_ENABLE (1 << 10)
1289# define IR_RX_ENABLE (1 << 11)
1290# define IR_TX_ENABLE (1 << 12)
1291# define IR_LOOPBACK (1 << 14)
1292# define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \
1293 IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC)
1294#define IR_SIR_FLAGS (IRDA_BASE + 0x24)
1295#define IR_ENABLE (IRDA_BASE + 0x28)
1296# define IR_RX_STATUS (1 << 9)
1297# define IR_TX_STATUS (1 << 10)
1298#define IR_READ_PHY_CONFIG (IRDA_BASE + 0x2C)
1299#define IR_WRITE_PHY_CONFIG (IRDA_BASE + 0x30)
1300#define IR_MAX_PKT_LEN (IRDA_BASE + 0x34)
1301#define IR_RX_BYTE_CNT (IRDA_BASE + 0x38)
1302#define IR_CONFIG_2 (IRDA_BASE + 0x3C)
1303# define IR_MODE_INV (1 << 0)
1304# define IR_ONE_PIN (1 << 1)
1305#define IR_INTERFACE_CONFIG (IRDA_BASE + 0x40)
1306 1282
1307/* GPIO */ 1283/* GPIO */
1308#define SYS_PINFUNC 0xB190002C 1284#define SYS_PINFUNC 0xB190002C