aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/bcm47xx/wgt634u.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 17:27:45 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 17:27:45 -0500
commitcebfa85eb86d92bf85d3b041c6b044184517a988 (patch)
treebe0a374556fe335ce96dfdb296c89537750d5868 /arch/mips/bcm47xx/wgt634u.c
parentd42b3a2906a10b732ea7d7f849d49be79d242ef0 (diff)
parent241738bd51cb0efe58e6c570223153e970afe3ae (diff)
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "The MIPS bits for 3.8. This also includes a bunch fixes that were sitting in the linux-mips.org git tree for a long time. This pull request contains updates to several OCTEON drivers and the board support code for BCM47XX, BCM63XX, XLP, XLR, XLS, lantiq, Loongson1B, updates to the SSB bus support, MIPS kexec code and adds support for kdump. When pulling this, there are two expected merge conflicts in include/linux/bcma/bcma_driver_chipcommon.h which are trivial to resolve, just remove the conflict markers and keep both alternatives." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (90 commits) MIPS: PMC-Sierra Yosemite: Remove support. VIDEO: Newport Fix console crashes MIPS: wrppmc: Fix build of PCI code. MIPS: IP22/IP28: Fix build of EISA code. MIPS: RB532: Fix build of prom code. MIPS: PowerTV: Fix build. MIPS: IP27: Correct fucked grammar in ops-bridge.c MIPS: Highmem: Fix build error if CONFIG_DEBUG_HIGHMEM is disabled MIPS: Fix potencial corruption MIPS: Fix for warning from FPU emulation code MIPS: Handle COP3 Unusable exception as COP1X for FP emulation MIPS: Fix poweroff failure when HOTPLUG_CPU configured. MIPS: MT: Fix build with CONFIG_UIDGID_STRICT_TYPE_CHECKS=y MIPS: Remove unused smvp.h MIPS/EDAC: Improve OCTEON EDAC support. MIPS: OCTEON: Add definitions for OCTEON memory contoller registers. MIPS: OCTEON: Add OCTEON family definitions to octeon-model.h ata: pata_octeon_cf: Use correct byte order for DMA in when built little-endian. MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree. MIPS: Remove usage of CEVT_R4K_LIB config option. ...
Diffstat (limited to 'arch/mips/bcm47xx/wgt634u.c')
-rw-r--r--arch/mips/bcm47xx/wgt634u.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/mips/bcm47xx/wgt634u.c b/arch/mips/bcm47xx/wgt634u.c
index e80d585731aa..9d111e8087ec 100644
--- a/arch/mips/bcm47xx/wgt634u.c
+++ b/arch/mips/bcm47xx/wgt634u.c
@@ -11,6 +11,7 @@
11#include <linux/leds.h> 11#include <linux/leds.h>
12#include <linux/mtd/physmap.h> 12#include <linux/mtd/physmap.h>
13#include <linux/ssb/ssb.h> 13#include <linux/ssb/ssb.h>
14#include <linux/ssb/ssb_embedded.h>
14#include <linux/interrupt.h> 15#include <linux/interrupt.h>
15#include <linux/reboot.h> 16#include <linux/reboot.h>
16#include <linux/gpio.h> 17#include <linux/gpio.h>
@@ -116,7 +117,8 @@ static irqreturn_t gpio_interrupt(int irq, void *ignored)
116 117
117 /* Interrupt are level triggered, revert the interrupt polarity 118 /* Interrupt are level triggered, revert the interrupt polarity
118 to clear the interrupt. */ 119 to clear the interrupt. */
119 gpio_polarity(WGT634U_GPIO_RESET, state); 120 ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << WGT634U_GPIO_RESET,
121 state ? 1 << WGT634U_GPIO_RESET : 0);
120 122
121 if (!state) { 123 if (!state) {
122 printk(KERN_INFO "Reset button pressed"); 124 printk(KERN_INFO "Reset button pressed");
@@ -150,7 +152,9 @@ static int __init wgt634u_init(void)
150 gpio_interrupt, IRQF_SHARED, 152 gpio_interrupt, IRQF_SHARED,
151 "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) { 153 "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) {
152 gpio_direction_input(WGT634U_GPIO_RESET); 154 gpio_direction_input(WGT634U_GPIO_RESET);
153 gpio_intmask(WGT634U_GPIO_RESET, 1); 155 ssb_gpio_intmask(&bcm47xx_bus.ssb,
156 1 << WGT634U_GPIO_RESET,
157 1 << WGT634U_GPIO_RESET);
154 ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco, 158 ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco,
155 SSB_CHIPCO_IRQ_GPIO, 159 SSB_CHIPCO_IRQ_GPIO,
156 SSB_CHIPCO_IRQ_GPIO); 160 SSB_CHIPCO_IRQ_GPIO);