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authorJames Morris <jmorris@namei.org>2011-04-19 07:32:41 -0400
committerJames Morris <jmorris@namei.org>2011-04-19 07:32:41 -0400
commitd4ab4e6a23f805abb8fc3cc34525eec3788aeca1 (patch)
treeeefd82c155bc27469a85667d759cd90facf4a6e3 /arch/blackfin/include
parentc0fa797ae6cd02ff87c0bfe0d509368a3b45640e (diff)
parent96fd2d57b8252e16dfacf8941f7a74a6119197f5 (diff)
Merge branch 'master'; commit 'v2.6.39-rc3' into next
Diffstat (limited to 'arch/blackfin/include')
-rw-r--r--arch/blackfin/include/asm/bitops.h4
-rw-r--r--arch/blackfin/include/asm/system.h36
-rw-r--r--arch/blackfin/include/asm/traps.h2
3 files changed, 22 insertions, 20 deletions
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h
index 49762c6bb0d5..8a0fed16058f 100644
--- a/arch/blackfin/include/asm/bitops.h
+++ b/arch/blackfin/include/asm/bitops.h
@@ -25,7 +25,6 @@
25#include <asm-generic/bitops/const_hweight.h> 25#include <asm-generic/bitops/const_hweight.h>
26#include <asm-generic/bitops/lock.h> 26#include <asm-generic/bitops/lock.h>
27 27
28#include <asm-generic/bitops/le.h>
29#include <asm-generic/bitops/ext2-atomic.h> 28#include <asm-generic/bitops/ext2-atomic.h>
30 29
31#ifndef CONFIG_SMP 30#ifndef CONFIG_SMP
@@ -113,6 +112,9 @@ static inline int test_and_change_bit(int nr, volatile unsigned long *addr)
113 112
114#endif /* CONFIG_SMP */ 113#endif /* CONFIG_SMP */
115 114
115/* Needs to be after test_bit and friends */
116#include <asm-generic/bitops/le.h>
117
116/* 118/*
117 * hweightN: returns the hamming weight (i.e. the number 119 * hweightN: returns the hamming weight (i.e. the number
118 * of bits set) of a N-bit word 120 * of bits set) of a N-bit word
diff --git a/arch/blackfin/include/asm/system.h b/arch/blackfin/include/asm/system.h
index 19e2c7c3e63a..44bd0cced725 100644
--- a/arch/blackfin/include/asm/system.h
+++ b/arch/blackfin/include/asm/system.h
@@ -19,11 +19,11 @@
19 * Force strict CPU ordering. 19 * Force strict CPU ordering.
20 */ 20 */
21#define nop() __asm__ __volatile__ ("nop;\n\t" : : ) 21#define nop() __asm__ __volatile__ ("nop;\n\t" : : )
22#define mb() __asm__ __volatile__ ("" : : : "memory") 22#define smp_mb() mb()
23#define rmb() __asm__ __volatile__ ("" : : : "memory") 23#define smp_rmb() rmb()
24#define wmb() __asm__ __volatile__ ("" : : : "memory") 24#define smp_wmb() wmb()
25#define set_mb(var, value) do { (void) xchg(&var, value); } while (0) 25#define set_mb(var, value) do { var = value; mb(); } while (0)
26#define read_barrier_depends() do { } while(0) 26#define smp_read_barrier_depends() read_barrier_depends()
27 27
28#ifdef CONFIG_SMP 28#ifdef CONFIG_SMP
29asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value); 29asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
@@ -37,16 +37,16 @@ asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
37 unsigned long new, unsigned long old); 37 unsigned long new, unsigned long old);
38 38
39#ifdef __ARCH_SYNC_CORE_DCACHE 39#ifdef __ARCH_SYNC_CORE_DCACHE
40# define smp_mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0) 40/* Force Core data cache coherence */
41# define smp_rmb() do { barrier(); smp_check_barrier(); } while (0) 41# define mb() do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
42# define smp_wmb() do { barrier(); smp_mark_barrier(); } while (0) 42# define rmb() do { barrier(); smp_check_barrier(); } while (0)
43#define smp_read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0) 43# define wmb() do { barrier(); smp_mark_barrier(); } while (0)
44 44# define read_barrier_depends() do { barrier(); smp_check_barrier(); } while (0)
45#else 45#else
46# define smp_mb() barrier() 46# define mb() barrier()
47# define smp_rmb() barrier() 47# define rmb() barrier()
48# define smp_wmb() barrier() 48# define wmb() barrier()
49#define smp_read_barrier_depends() barrier() 49# define read_barrier_depends() do { } while (0)
50#endif 50#endif
51 51
52static inline unsigned long __xchg(unsigned long x, volatile void *ptr, 52static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
@@ -99,10 +99,10 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
99 99
100#else /* !CONFIG_SMP */ 100#else /* !CONFIG_SMP */
101 101
102#define smp_mb() barrier() 102#define mb() barrier()
103#define smp_rmb() barrier() 103#define rmb() barrier()
104#define smp_wmb() barrier() 104#define wmb() barrier()
105#define smp_read_barrier_depends() do { } while(0) 105#define read_barrier_depends() do { } while (0)
106 106
107struct __xchg_dummy { 107struct __xchg_dummy {
108 unsigned long a[100]; 108 unsigned long a[100];
diff --git a/arch/blackfin/include/asm/traps.h b/arch/blackfin/include/asm/traps.h
index 9fe0da612c09..70c4e511cae6 100644
--- a/arch/blackfin/include/asm/traps.h
+++ b/arch/blackfin/include/asm/traps.h
@@ -57,7 +57,7 @@
57#define HWC_x3(level) \ 57#define HWC_x3(level) \
58 "External Memory Addressing Error\n" 58 "External Memory Addressing Error\n"
59#define EXC_0x04(level) \ 59#define EXC_0x04(level) \
60 "Unimplmented exception occured\n" \ 60 "Unimplmented exception occurred\n" \
61 level " - Maybe you forgot to install a custom exception handler?\n" 61 level " - Maybe you forgot to install a custom exception handler?\n"
62#define HWC_x12(level) \ 62#define HWC_x12(level) \
63 "Performance Monitor Overflow\n" 63 "Performance Monitor Overflow\n"