[PATCH] avr32 architecture

This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.

AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.

The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf

The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.

Full data sheet is available from

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

Information about the AT32STK1000 development board can be found at

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918

including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.

Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.

This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.

[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

1 files changed, 99 insertions, 0 deletions

diff --git a/arch/avr32/lib/csum_partial_copy_generic.S b/arch/avr32/lib/csum_partial_copy_generic.S
new file mode 100644
index 000000000000..a3a0f9b8929c
--- /dev/null
+++ b/arch/avr32/lib/csum_partial_copy_generic.S
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 2004-2006 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <asm/errno.h>
+#include <asm/asm.h>
+
+        /*
+         * unsigned int csum_partial_copy_generic(const char *src, char *dst, int len
+         *                                        int sum, int *src_err_ptr,
+         *                                        int *dst_err_ptr)
+         *
+         * Copy src to dst while checksumming, otherwise like csum_partial.
+         */
+
+        .macro ld_src size, reg, ptr
+9999:   ld.\size \reg, \ptr
+        .section __ex_table, "a"
+        .long   9999b, fixup_ld_src
+        .previous
+        .endm
+
+        .macro st_dst size, ptr, reg
+9999:   st.\size \ptr, \reg
+        .section __ex_table, "a"
+        .long   9999b, fixup_st_dst
+        .previous
+        .endm
+
+        .text
+        .global csum_partial_copy_generic
+        .type   csum_partial_copy_generic,"function"
+        .align  1
+csum_partial_copy_generic:
+        pushm   r4-r7,lr
+
+        /* The inner loop */
+1:      sub     r10, 4
+        brlt    5f
+2:      ld_src  w, r5, r12++
+        st_dst  w, r11++, r5
+        add     r9, r5
+        acr     r9
+        sub     r10, 4
+        brge    2b
+
+        /* return if we had a whole number of words */
+5:      sub     r10, -4
+        brne    7f
+
+6:      mov     r12, r9
+        popm    r4-r7,pc
+
+        /* handle additional bytes at the tail */
+7:      mov     r5, 0
+        mov     r4, 32
+8:      ld_src  ub, r6, r12++
+        st_dst  b, r11++, r6
+        lsl     r5, 8
+        sub     r4, 8
+        bfins   r5, r6, 0, 8
+        sub     r10, 1
+        brne    8b
+
+        lsl     r5, r5, r4
+        add     r9, r5
+        acr     r9
+        rjmp    6b
+
+        /* Exception handler */
+        .section .fixup,"ax"
+        .align  1
+fixup_ld_src:
+        mov     r9, -EFAULT
+        cp.w    r8, 0
+        breq    1f
+        st.w    r8[0], r9
+
+1:      /*
+         * TODO: zero the complete destination - computing the rest
+         * is too much work
+         */
+
+        mov     r9, 0
+        rjmp    6b
+
+fixup_st_dst:
+        mov     r9, -EFAULT
+        lddsp   r8, sp[20]
+        cp.w    r8, 0
+        breq    1f
+        st.w    r8[0], r9
+1:      mov     r9, 0
+        rjmp    6b
+
+        .previous