diff options
author | Rajendra Nayak <rnayak@ti.com> | 2012-11-10 18:58:40 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2012-11-12 15:55:49 -0500 |
commit | b5a2366c1833100aae0d00eaec4c15d15d290c85 (patch) | |
tree | 55e17eed9db9516de45f570ae045a437054786c2 /arch/arm | |
parent | c9d501e5cb0238910337213e12a09127221c35d8 (diff) |
ARM: OMAP: clock: Nuke plat/clock.c & reuse struct clk as clk_hw_omap
plat/clock.c which has most of usecounting/locking infrastructure will
be used only for OMAP1 until that is moved to use COMMON clk.
reuse most of what plat/clock.h has while we move to common clk, and
move most of what 'struct clk' was as 'struct clk_hw_omap' which
will then be used to define platform specific parameters.
All usecounting/locking related variables from 'struct clk' are
dropped as they will not be used with 'struct clk_hw_omap'.
Based on the original changes from Mike Turquette.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/clock.h | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index ff9789bc0fd1..697e044156dd 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h | |||
@@ -52,6 +52,14 @@ struct omap_clk { | |||
52 | #define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) | 52 | #define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) |
53 | #define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX) | 53 | #define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX) |
54 | 54 | ||
55 | #ifdef CONFIG_COMMON_CLK | ||
56 | #include <linux/clk-provider.h> | ||
57 | |||
58 | struct clockdomain; | ||
59 | #define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw) | ||
60 | |||
61 | #else | ||
62 | |||
55 | struct module; | 63 | struct module; |
56 | struct clk; | 64 | struct clk; |
57 | struct clockdomain; | 65 | struct clockdomain; |
@@ -89,6 +97,7 @@ struct clkops { | |||
89 | void (*allow_idle)(struct clk *); | 97 | void (*allow_idle)(struct clk *); |
90 | void (*deny_idle)(struct clk *); | 98 | void (*deny_idle)(struct clk *); |
91 | }; | 99 | }; |
100 | #endif | ||
92 | 101 | ||
93 | /* struct clksel_rate.flags possibilities */ | 102 | /* struct clksel_rate.flags possibilities */ |
94 | #define RATE_IN_242X (1 << 0) | 103 | #define RATE_IN_242X (1 << 0) |
@@ -228,6 +237,60 @@ struct dpll_data { | |||
228 | #define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ | 237 | #define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ |
229 | #define CLOCK_CLKOUTX2 (1 << 5) | 238 | #define CLOCK_CLKOUTX2 (1 << 5) |
230 | 239 | ||
240 | #ifdef CONFIG_COMMON_CLK | ||
241 | /** | ||
242 | * struct clk_hw_omap - OMAP struct clk | ||
243 | * @node: list_head connecting this clock into the full clock list | ||
244 | * @enable_reg: register to write to enable the clock (see @enable_bit) | ||
245 | * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) | ||
246 | * @flags: see "struct clk.flags possibilities" above | ||
247 | * @clksel_reg: for clksel clks, register va containing src/divisor select | ||
248 | * @clksel_mask: bitmask in @clksel_reg for the src/divisor selector | ||
249 | * @clksel: for clksel clks, pointer to struct clksel for this clock | ||
250 | * @dpll_data: for DPLLs, pointer to struct dpll_data for this clock | ||
251 | * @clkdm_name: clockdomain name that this clock is contained in | ||
252 | * @clkdm: pointer to struct clockdomain, resolved from @clkdm_name at runtime | ||
253 | * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) | ||
254 | * @src_offset: bitshift for source selection bitfield (OMAP1 only) | ||
255 | * | ||
256 | * XXX @rate_offset, @src_offset should probably be removed and OMAP1 | ||
257 | * clock code converted to use clksel. | ||
258 | * | ||
259 | */ | ||
260 | |||
261 | struct clk_hw_omap_ops; | ||
262 | |||
263 | struct clk_hw_omap { | ||
264 | struct clk_hw hw; | ||
265 | struct list_head node; | ||
266 | unsigned long fixed_rate; | ||
267 | u8 fixed_div; | ||
268 | void __iomem *enable_reg; | ||
269 | u8 enable_bit; | ||
270 | u8 flags; | ||
271 | void __iomem *clksel_reg; | ||
272 | u32 clksel_mask; | ||
273 | const struct clksel *clksel; | ||
274 | struct dpll_data *dpll_data; | ||
275 | const char *clkdm_name; | ||
276 | struct clockdomain *clkdm; | ||
277 | const struct clk_hw_omap_ops *ops; | ||
278 | }; | ||
279 | |||
280 | struct clk_hw_omap_ops { | ||
281 | void (*find_idlest)(struct clk_hw_omap *oclk, | ||
282 | void __iomem **idlest_reg, | ||
283 | u8 *idlest_bit, u8 *idlest_val); | ||
284 | void (*find_companion)(struct clk_hw_omap *oclk, | ||
285 | void __iomem **other_reg, | ||
286 | u8 *other_bit); | ||
287 | void (*allow_idle)(struct clk_hw_omap *oclk); | ||
288 | void (*deny_idle)(struct clk_hw_omap *oclk); | ||
289 | }; | ||
290 | |||
291 | unsigned long omap_fixed_divisor_recalc(struct clk_hw *hw, | ||
292 | unsigned long parent_rate); | ||
293 | #else | ||
231 | /** | 294 | /** |
232 | * struct clk - OMAP struct clk | 295 | * struct clk - OMAP struct clk |
233 | * @node: list_head connecting this clock into the full clock list | 296 | * @node: list_head connecting this clock into the full clock list |
@@ -456,4 +519,5 @@ extern struct clk virt_26000000_ck; | |||
456 | 519 | ||
457 | extern int am33xx_clk_init(void); | 520 | extern int am33xx_clk_init(void); |
458 | 521 | ||
522 | #endif /* CONFIG_COMMON_CLK */ | ||
459 | #endif | 523 | #endif |