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authorsricharan <r.sricharan@ti.com>2011-08-23 03:28:48 -0400
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2011-09-24 03:58:57 -0400
commit6616aac66d798f3f185d90d9057e47abd7d3c9b3 (patch)
treeed4bad47201257b917dc9a9f6f3c52ef202a6fd5 /arch/arm
parented0e352073ff86c876ff7820ad0b6bac123082b5 (diff)
OMAP: Fix sparse warnings in l3 error handler.
Fix below sparse warnings from the l3-noc and l3-smx error handlers files. arch/arm/mach-omap2/omap_l3_smx.h:209:22: warning: symbol 'omap3_l3_app_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:308:22: warning: symbol 'omap3_l3_debug_bases' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_smx.h:325:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:325:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:325:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_smx.h:326:2: warning: incorrect type in initializer (different address spaces) arch/arm/mach-omap2/omap_l3_smx.h:326:2: expected unsigned int [usertype] * arch/arm/mach-omap2/omap_l3_smx.h:326:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_smx.h:324:5: warning: symbol 'omap3_l3_bases' was not declared. Should it be static? CC arch/arm/mach-omap2/omap_l3_smx.o CHECK arch/arm/mach-omap2/omap_l3_noc.c arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:73:13: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:83:20: originally declared here arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: symbol '__v' shadows an earlier one arch/arm/mach-omap2/omap_l3_noc.c:90:5: originally declared here arch/arm/mach-omap2/omap_l3_noc.h:39:5: warning: symbol 'l3_flagmux' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:46:5: warning: symbol 'l3_targ_inst_clk1' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:54:5: warning: symbol 'l3_targ_inst_clk2' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:75:5: warning: symbol 'l3_targ_inst_clk3' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:79:6: warning: symbol 'l3_targ_inst_name' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.h:112:5: warning: symbol 'l3_targ' was not declared. Should it be static? arch/arm/mach-omap2/omap_l3_noc.c:72:11: warning: cast removes address space of expression arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:73:13: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:73:13: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:83:20: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:83:20: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:90:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:90:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:96:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:96:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:96:5: got unsigned int arch/arm/mach-omap2/omap_l3_noc.c:108:5: warning: incorrect type in argument 1 (different base types) arch/arm/mach-omap2/omap_l3_noc.c:108:5: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/omap_l3_noc.c:108:5: got unsigned int Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reported-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.c11
-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.h12
-rw-r--r--arch/arm/mach-omap2/omap_l3_smx.h6
3 files changed, 15 insertions, 14 deletions
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 1f68e95c3e80..8f1835711676 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -58,7 +58,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
58 struct omap4_l3 *l3 = _l3; 58 struct omap4_l3 *l3 = _l3;
59 int inttype, i; 59 int inttype, i;
60 int err_src = 0; 60 int err_src = 0;
61 u32 std_err_main, err_reg, clear, base, l3_targ_base; 61 u32 std_err_main, err_reg, clear;
62 void __iomem *base, *l3_targ_base;
62 char *source_name; 63 char *source_name;
63 64
64 /* Get the Type of interrupt */ 65 /* Get the Type of interrupt */
@@ -69,8 +70,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
69 * Read the regerr register of the clock domain 70 * Read the regerr register of the clock domain
70 * to determine the source 71 * to determine the source
71 */ 72 */
72 base = (u32)l3->l3_base[i]; 73 base = l3->l3_base[i];
73 err_reg = readl(base + l3_flagmux[i] + 74 err_reg = __raw_readl(base + l3_flagmux[i] +
74 + L3_FLAGMUX_REGERR0 + (inttype << 3)); 75 + L3_FLAGMUX_REGERR0 + (inttype << 3));
75 76
76 /* Get the corresponding error and analyse */ 77 /* Get the corresponding error and analyse */
@@ -80,7 +81,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
80 81
81 /* Read the stderrlog_main_source from clk domain */ 82 /* Read the stderrlog_main_source from clk domain */
82 l3_targ_base = base + *(l3_targ[i] + err_src); 83 l3_targ_base = base + *(l3_targ[i] + err_src);
83 std_err_main = readl(l3_targ_base + 84 std_err_main = __raw_readl(l3_targ_base +
84 L3_TARG_STDERRLOG_MAIN); 85 L3_TARG_STDERRLOG_MAIN);
85 86
86 switch (std_err_main & CUSTOM_ERROR) { 87 switch (std_err_main & CUSTOM_ERROR) {
@@ -89,7 +90,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
89 l3_targ_inst_name[i][err_src]; 90 l3_targ_inst_name[i][err_src];
90 WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n", 91 WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
91 source_name, 92 source_name,
92 readl(l3_targ_base + 93 __raw_readl(l3_targ_base +
93 L3_TARG_STDERRLOG_SLVOFSLSB)); 94 L3_TARG_STDERRLOG_SLVOFSLSB));
94 /* clear the std error log*/ 95 /* clear the std error log*/
95 clear = std_err_main | CLEAR_STDERR_LOG; 96 clear = std_err_main | CLEAR_STDERR_LOG;
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 9120e70aa08a..74c16434f2bc 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -36,14 +36,14 @@
36#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c 36#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
37#define L3_FLAGMUX_REGERR0 0xc 37#define L3_FLAGMUX_REGERR0 0xc
38 38
39u32 l3_flagmux[L3_MODULES] = { 39static u32 l3_flagmux[L3_MODULES] = {
40 0x500, 40 0x500,
41 0x1000, 41 0x1000,
42 0X0200 42 0X0200
43}; 43};
44 44
45/* L3 Target standard Error register offsets */ 45/* L3 Target standard Error register offsets */
46u32 l3_targ_inst_clk1[] = { 46static u32 l3_targ_inst_clk1[] = {
47 0x100, /* DMM1 */ 47 0x100, /* DMM1 */
48 0x200, /* DMM2 */ 48 0x200, /* DMM2 */
49 0x300, /* ABE */ 49 0x300, /* ABE */
@@ -51,7 +51,7 @@ u32 l3_targ_inst_clk1[] = {
51 0x600 /* CLK2 PWR DISC */ 51 0x600 /* CLK2 PWR DISC */
52}; 52};
53 53
54u32 l3_targ_inst_clk2[] = { 54static u32 l3_targ_inst_clk2[] = {
55 0x500, /* CORTEX M3 */ 55 0x500, /* CORTEX M3 */
56 0x300, /* DSS */ 56 0x300, /* DSS */
57 0x100, /* GPMC */ 57 0x100, /* GPMC */
@@ -72,11 +72,11 @@ u32 l3_targ_inst_clk2[] = {
72 0xB00 /* L4 PER2*/ 72 0xB00 /* L4 PER2*/
73}; 73};
74 74
75u32 l3_targ_inst_clk3[] = { 75static u32 l3_targ_inst_clk3[] = {
76 0x0100 /* EMUSS */ 76 0x0100 /* EMUSS */
77}; 77};
78 78
79char *l3_targ_inst_name[L3_MODULES][18] = { 79static char *l3_targ_inst_name[L3_MODULES][18] = {
80 { 80 {
81 "DMM1", 81 "DMM1",
82 "DMM2", 82 "DMM2",
@@ -109,7 +109,7 @@ char *l3_targ_inst_name[L3_MODULES][18] = {
109 }, 109 },
110}; 110};
111 111
112u32 *l3_targ[L3_MODULES] = { 112static u32 *l3_targ[L3_MODULES] = {
113 l3_targ_inst_clk1, 113 l3_targ_inst_clk1,
114 l3_targ_inst_clk2, 114 l3_targ_inst_clk2,
115 l3_targ_inst_clk3, 115 l3_targ_inst_clk3,
diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h
index 18e5ec2629ca..4f3cebca4179 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.h
+++ b/arch/arm/mach-omap2/omap_l3_smx.h
@@ -206,7 +206,7 @@ struct omap3_l3 {
206}; 206};
207 207
208/* offsets for l3 agents in order with the Flag status register */ 208/* offsets for l3 agents in order with the Flag status register */
209unsigned int __iomem omap3_l3_app_bases[] = { 209static unsigned int omap3_l3_app_bases[] = {
210 /* MPU IA */ 210 /* MPU IA */
211 0x1400, 211 0x1400,
212 0x1400, 212 0x1400,
@@ -305,7 +305,7 @@ unsigned int __iomem omap3_l3_app_bases[] = {
305 0, 305 0,
306}; 306};
307 307
308unsigned int __iomem omap3_l3_debug_bases[] = { 308static unsigned int omap3_l3_debug_bases[] = {
309 /* MPU DATA IA */ 309 /* MPU DATA IA */
310 0x1400, 310 0x1400,
311 /* RESERVED */ 311 /* RESERVED */
@@ -321,7 +321,7 @@ unsigned int __iomem omap3_l3_debug_bases[] = {
321 /* REST RESERVED */ 321 /* REST RESERVED */
322}; 322};
323 323
324u32 *omap3_l3_bases[] = { 324static u32 *omap3_l3_bases[] = {
325 omap3_l3_app_bases, 325 omap3_l3_app_bases,
326 omap3_l3_debug_bases, 326 omap3_l3_debug_bases,
327}; 327};