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authorOlof Johansson <olof@lixom.net>2013-01-22 14:20:18 -0500
committerOlof Johansson <olof@lixom.net>2013-01-22 14:20:29 -0500
commit51edce0ccee090ea762a3014510e7870d25c49df (patch)
treeb960c6e50a318cb3a737f31323fe50246a87a0f3 /arch/arm
parentb2555b877bf9faf7045ae362ca051590e79167cf (diff)
parent7662a9c60fee25d7234da4be6d8eab2b2ac88448 (diff)
Merge tag 'omap-for-v3.8-rc4/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
From Tony Lindgren: Minimal omap fixes for the -rc series: - A build fix for recently merged omap DRM changes - Regression fixes from the common clock framework conversion for omap4 audio and omap2 reboot - Regression fix for pandaboard WLAN control UART muxing caused by u-boot only muxing essential pins nowadays - Timer iteration fix for CONFIG_OF_DYNAMIC - A section mismatch fix for ocp2scp init * tag 'omap-for-v3.8-rc4/fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (306 commits) ARM: OMAP2+: omap4-panda: add UART2 muxing for WiLink shared transport ARM: OMAP2+: DT node Timer iteration fix ARM: OMAP2+: Fix section warning for omap_init_ocp2scp() ARM: OMAP2+: fix build break for omapdrm ARM: OMAP2: Fix missing omap2xxx_clkt_vps_late_init function calls ARM: OMAP4: hwmod_data: Correct IDLEMODE for McPDM ARM: OMAP4: clock data: Lock ABE DPLL on all revisions + Linux 3.8-rc4 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/Makefile1
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi18
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi36
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi36
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi26
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi32
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c6
-rw-r--r--arch/arm/mach-omap2/cclock2420_data.c2
-rw-r--r--arch/arm/mach-omap2/cclock2430_data.c2
-rw-r--r--arch/arm/mach-omap2/cclock44xx_data.c13
-rw-r--r--arch/arm/mach-omap2/devices.c2
-rw-r--r--arch/arm/mach-omap2/drm.c3
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c6
-rw-r--r--arch/arm/mach-omap2/timer.c8
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa27x.h3
-rw-r--r--arch/arm/mach-pxa/pxa27x.c4
16 files changed, 173 insertions, 25 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e44da40d984f..5ebb44fe826a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -155,6 +155,7 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
155dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb 155dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
156 156
157targets += dtbs 157targets += dtbs
158targets += $(dtb-y)
158endif 159endif
159 160
160# *.dtb used to be generated in the directory above. Clean out the 161# *.dtb used to be generated in the directory above. Clean out the
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 68bccf41a2c6..cb7bcc51608d 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -306,6 +306,22 @@
306 }; 306 };
307 }; 307 };
308 308
309 ssc0 {
310 pinctrl_ssc0_tx: ssc0_tx-0 {
311 atmel,pins =
312 <1 16 0x1 0x0 /* PB16 periph A */
313 1 17 0x1 0x0 /* PB17 periph A */
314 1 18 0x1 0x0>; /* PB18 periph A */
315 };
316
317 pinctrl_ssc0_rx: ssc0_rx-0 {
318 atmel,pins =
319 <1 19 0x1 0x0 /* PB19 periph A */
320 1 20 0x1 0x0 /* PB20 periph A */
321 1 21 0x1 0x0>; /* PB21 periph A */
322 };
323 };
324
309 pioA: gpio@fffff400 { 325 pioA: gpio@fffff400 {
310 compatible = "atmel,at91rm9200-gpio"; 326 compatible = "atmel,at91rm9200-gpio";
311 reg = <0xfffff400 0x200>; 327 reg = <0xfffff400 0x200>;
@@ -450,6 +466,8 @@
450 compatible = "atmel,at91rm9200-ssc"; 466 compatible = "atmel,at91rm9200-ssc";
451 reg = <0xfffbc000 0x4000>; 467 reg = <0xfffbc000 0x4000>;
452 interrupts = <14 4 5>; 468 interrupts = <14 4 5>;
469 pinctrl-names = "default";
470 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
453 status = "disabled"; 471 status = "disabled";
454 }; 472 };
455 473
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 32ec62cf5385..271d4de026e9 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -271,6 +271,38 @@
271 }; 271 };
272 }; 272 };
273 273
274 ssc0 {
275 pinctrl_ssc0_tx: ssc0_tx-0 {
276 atmel,pins =
277 <1 0 0x2 0x0 /* PB0 periph B */
278 1 1 0x2 0x0 /* PB1 periph B */
279 1 2 0x2 0x0>; /* PB2 periph B */
280 };
281
282 pinctrl_ssc0_rx: ssc0_rx-0 {
283 atmel,pins =
284 <1 3 0x2 0x0 /* PB3 periph B */
285 1 4 0x2 0x0 /* PB4 periph B */
286 1 5 0x2 0x0>; /* PB5 periph B */
287 };
288 };
289
290 ssc1 {
291 pinctrl_ssc1_tx: ssc1_tx-0 {
292 atmel,pins =
293 <1 6 0x1 0x0 /* PB6 periph A */
294 1 7 0x1 0x0 /* PB7 periph A */
295 1 8 0x1 0x0>; /* PB8 periph A */
296 };
297
298 pinctrl_ssc1_rx: ssc1_rx-0 {
299 atmel,pins =
300 <1 9 0x1 0x0 /* PB9 periph A */
301 1 10 0x1 0x0 /* PB10 periph A */
302 1 11 0x1 0x0>; /* PB11 periph A */
303 };
304 };
305
274 pioA: gpio@fffff200 { 306 pioA: gpio@fffff200 {
275 compatible = "atmel,at91rm9200-gpio"; 307 compatible = "atmel,at91rm9200-gpio";
276 reg = <0xfffff200 0x200>; 308 reg = <0xfffff200 0x200>;
@@ -368,6 +400,8 @@
368 compatible = "atmel,at91rm9200-ssc"; 400 compatible = "atmel,at91rm9200-ssc";
369 reg = <0xfff98000 0x4000>; 401 reg = <0xfff98000 0x4000>;
370 interrupts = <16 4 5>; 402 interrupts = <16 4 5>;
403 pinctrl-names = "default";
404 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
371 status = "disabled"; 405 status = "disabled";
372 }; 406 };
373 407
@@ -375,6 +409,8 @@
375 compatible = "atmel,at91rm9200-ssc"; 409 compatible = "atmel,at91rm9200-ssc";
376 reg = <0xfff9c000 0x4000>; 410 reg = <0xfff9c000 0x4000>;
377 interrupts = <17 4 5>; 411 interrupts = <17 4 5>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
378 status = "disabled"; 414 status = "disabled";
379 }; 415 };
380 416
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 231858ffd850..6b1d4cab24c2 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -290,6 +290,38 @@
290 }; 290 };
291 }; 291 };
292 292
293 ssc0 {
294 pinctrl_ssc0_tx: ssc0_tx-0 {
295 atmel,pins =
296 <3 0 0x1 0x0 /* PD0 periph A */
297 3 1 0x1 0x0 /* PD1 periph A */
298 3 2 0x1 0x0>; /* PD2 periph A */
299 };
300
301 pinctrl_ssc0_rx: ssc0_rx-0 {
302 atmel,pins =
303 <3 3 0x1 0x0 /* PD3 periph A */
304 3 4 0x1 0x0 /* PD4 periph A */
305 3 5 0x1 0x0>; /* PD5 periph A */
306 };
307 };
308
309 ssc1 {
310 pinctrl_ssc1_tx: ssc1_tx-0 {
311 atmel,pins =
312 <3 10 0x1 0x0 /* PD10 periph A */
313 3 11 0x1 0x0 /* PD11 periph A */
314 3 12 0x1 0x0>; /* PD12 periph A */
315 };
316
317 pinctrl_ssc1_rx: ssc1_rx-0 {
318 atmel,pins =
319 <3 13 0x1 0x0 /* PD13 periph A */
320 3 14 0x1 0x0 /* PD14 periph A */
321 3 15 0x1 0x0>; /* PD15 periph A */
322 };
323 };
324
293 pioA: gpio@fffff200 { 325 pioA: gpio@fffff200 {
294 compatible = "atmel,at91rm9200-gpio"; 326 compatible = "atmel,at91rm9200-gpio";
295 reg = <0xfffff200 0x200>; 327 reg = <0xfffff200 0x200>;
@@ -425,6 +457,8 @@
425 compatible = "atmel,at91sam9g45-ssc"; 457 compatible = "atmel,at91sam9g45-ssc";
426 reg = <0xfff9c000 0x4000>; 458 reg = <0xfff9c000 0x4000>;
427 interrupts = <16 4 5>; 459 interrupts = <16 4 5>;
460 pinctrl-names = "default";
461 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
428 status = "disabled"; 462 status = "disabled";
429 }; 463 };
430 464
@@ -432,6 +466,8 @@
432 compatible = "atmel,at91sam9g45-ssc"; 466 compatible = "atmel,at91sam9g45-ssc";
433 reg = <0xfffa0000 0x4000>; 467 reg = <0xfffa0000 0x4000>;
434 interrupts = <17 4 5>; 468 interrupts = <17 4 5>;
469 pinctrl-names = "default";
470 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
435 status = "disabled"; 471 status = "disabled";
436 }; 472 };
437 473
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index e9efb34f4379..80e29c605d4e 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -28,6 +28,7 @@
28 tcb1 = &tcb1; 28 tcb1 = &tcb1;
29 i2c0 = &i2c0; 29 i2c0 = &i2c0;
30 i2c1 = &i2c1; 30 i2c1 = &i2c1;
31 ssc0 = &ssc0;
31 }; 32 };
32 cpus { 33 cpus {
33 cpu@0 { 34 cpu@0 {
@@ -244,6 +245,22 @@
244 }; 245 };
245 }; 246 };
246 247
248 ssc0 {
249 pinctrl_ssc0_tx: ssc0_tx-0 {
250 atmel,pins =
251 <0 24 0x2 0x0 /* PA24 periph B */
252 0 25 0x2 0x0 /* PA25 periph B */
253 0 26 0x2 0x0>; /* PA26 periph B */
254 };
255
256 pinctrl_ssc0_rx: ssc0_rx-0 {
257 atmel,pins =
258 <0 27 0x2 0x0 /* PA27 periph B */
259 0 28 0x2 0x0 /* PA28 periph B */
260 0 29 0x2 0x0>; /* PA29 periph B */
261 };
262 };
263
247 pioA: gpio@fffff400 { 264 pioA: gpio@fffff400 {
248 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 265 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
249 reg = <0xfffff400 0x200>; 266 reg = <0xfffff400 0x200>;
@@ -294,6 +311,15 @@
294 status = "disabled"; 311 status = "disabled";
295 }; 312 };
296 313
314 ssc0: ssc@f0010000 {
315 compatible = "atmel,at91sam9g45-ssc";
316 reg = <0xf0010000 0x4000>;
317 interrupts = <28 4 5>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
320 status = "disabled";
321 };
322
297 usart0: serial@f801c000 { 323 usart0: serial@f801c000 {
298 compatible = "atmel,at91sam9260-usart"; 324 compatible = "atmel,at91sam9260-usart";
299 reg = <0xf801c000 0x4000>; 325 reg = <0xf801c000 0x4000>;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 40ac3a4eb1ab..3a47cf952146 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -88,13 +88,6 @@
88 interrupts = <1 4 7>; 88 interrupts = <1 4 7>;
89 }; 89 };
90 90
91 ssc0: ssc@f0010000 {
92 compatible = "atmel,at91sam9g45-ssc";
93 reg = <0xf0010000 0x4000>;
94 interrupts = <28 4 5>;
95 status = "disabled";
96 };
97
98 tcb0: timer@f8008000 { 91 tcb0: timer@f8008000 {
99 compatible = "atmel,at91sam9x5-tcb"; 92 compatible = "atmel,at91sam9x5-tcb";
100 reg = <0xf8008000 0x100>; 93 reg = <0xf8008000 0x100>;
@@ -290,6 +283,22 @@
290 }; 283 };
291 }; 284 };
292 285
286 ssc0 {
287 pinctrl_ssc0_tx: ssc0_tx-0 {
288 atmel,pins =
289 <0 24 0x2 0x0 /* PA24 periph B */
290 0 25 0x2 0x0 /* PA25 periph B */
291 0 26 0x2 0x0>; /* PA26 periph B */
292 };
293
294 pinctrl_ssc0_rx: ssc0_rx-0 {
295 atmel,pins =
296 <0 27 0x2 0x0 /* PA27 periph B */
297 0 28 0x2 0x0 /* PA28 periph B */
298 0 29 0x2 0x0>; /* PA29 periph B */
299 };
300 };
301
293 pioA: gpio@fffff400 { 302 pioA: gpio@fffff400 {
294 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; 303 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
295 reg = <0xfffff400 0x200>; 304 reg = <0xfffff400 0x200>;
@@ -333,6 +342,15 @@
333 }; 342 };
334 }; 343 };
335 344
345 ssc0: ssc@f0010000 {
346 compatible = "atmel,at91sam9g45-ssc";
347 reg = <0xf0010000 0x4000>;
348 interrupts = <28 4 5>;
349 pinctrl-names = "default";
350 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
351 status = "disabled";
352 };
353
336 mmc0: mmc@f0008000 { 354 mmc0: mmc@f0008000 {
337 compatible = "atmel,hsmci"; 355 compatible = "atmel,hsmci";
338 reg = <0xf0008000 0x600>; 356 reg = <0xf0008000 0x600>;
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 5c8e9cee2c2e..769c1feee1c4 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -397,6 +397,12 @@ static struct omap_board_mux board_mux[] __initdata = {
397 OMAP_PULL_ENA), 397 OMAP_PULL_ENA),
398 OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT), 398 OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
399 399
400 /* UART2 - BT/FM/GPS shared transport */
401 OMAP4_MUX(UART2_CTS, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
402 OMAP4_MUX(UART2_RTS, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
403 OMAP4_MUX(UART2_RX, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
404 OMAP4_MUX(UART2_TX, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
405
400 { .reg_offset = OMAP_MUX_TERMINATOR }, 406 { .reg_offset = OMAP_MUX_TERMINATOR },
401}; 407};
402 408
diff --git a/arch/arm/mach-omap2/cclock2420_data.c b/arch/arm/mach-omap2/cclock2420_data.c
index 7e5febe456d9..ab7e952d2070 100644
--- a/arch/arm/mach-omap2/cclock2420_data.c
+++ b/arch/arm/mach-omap2/cclock2420_data.c
@@ -1935,6 +1935,8 @@ int __init omap2420_clk_init(void)
1935 omap2_init_clk_hw_omap_clocks(c->lk.clk); 1935 omap2_init_clk_hw_omap_clocks(c->lk.clk);
1936 } 1936 }
1937 1937
1938 omap2xxx_clkt_vps_late_init();
1939
1938 omap2_clk_disable_autoidle_all(); 1940 omap2_clk_disable_autoidle_all();
1939 1941
1940 omap2_clk_enable_init_clocks(enable_init_clks, 1942 omap2_clk_enable_init_clocks(enable_init_clks,
diff --git a/arch/arm/mach-omap2/cclock2430_data.c b/arch/arm/mach-omap2/cclock2430_data.c
index eda079b96c6a..eb3dab68d536 100644
--- a/arch/arm/mach-omap2/cclock2430_data.c
+++ b/arch/arm/mach-omap2/cclock2430_data.c
@@ -2050,6 +2050,8 @@ int __init omap2430_clk_init(void)
2050 omap2_init_clk_hw_omap_clocks(c->lk.clk); 2050 omap2_init_clk_hw_omap_clocks(c->lk.clk);
2051 } 2051 }
2052 2052
2053 omap2xxx_clkt_vps_late_init();
2054
2053 omap2_clk_disable_autoidle_all(); 2055 omap2_clk_disable_autoidle_all();
2054 2056
2055 omap2_clk_enable_init_clocks(enable_init_clks, 2057 omap2_clk_enable_init_clocks(enable_init_clks,
diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c
index 5789a5e25563..a2cc046b47f4 100644
--- a/arch/arm/mach-omap2/cclock44xx_data.c
+++ b/arch/arm/mach-omap2/cclock44xx_data.c
@@ -2026,14 +2026,13 @@ int __init omap4xxx_clk_init(void)
2026 * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power 2026 * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power
2027 * state when turning the ABE clock domain. Workaround this by 2027 * state when turning the ABE clock domain. Workaround this by
2028 * locking the ABE DPLL on boot. 2028 * locking the ABE DPLL on boot.
2029 * Lock the ABE DPLL in any case to avoid issues with audio.
2029 */ 2030 */
2030 if (cpu_is_omap446x()) { 2031 rc = clk_set_parent(&abe_dpll_refclk_mux_ck, &sys_32k_ck);
2031 rc = clk_set_parent(&abe_dpll_refclk_mux_ck, &sys_32k_ck); 2032 if (!rc)
2032 if (!rc) 2033 rc = clk_set_rate(&dpll_abe_ck, OMAP4_DPLL_ABE_DEFFREQ);
2033 rc = clk_set_rate(&dpll_abe_ck, OMAP4_DPLL_ABE_DEFFREQ); 2034 if (rc)
2034 if (rc) 2035 pr_err("%s: failed to configure ABE DPLL!\n", __func__);
2035 pr_err("%s: failed to configure ABE DPLL!\n", __func__);
2036 }
2037 2036
2038 return 0; 2037 return 0;
2039} 2038}
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 5e304d0719a2..626f3ea3142f 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -639,7 +639,7 @@ static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
639 return cnt; 639 return cnt;
640} 640}
641 641
642static void omap_init_ocp2scp(void) 642static void __init omap_init_ocp2scp(void)
643{ 643{
644 struct omap_hwmod *oh; 644 struct omap_hwmod *oh;
645 struct platform_device *pdev; 645 struct platform_device *pdev;
diff --git a/arch/arm/mach-omap2/drm.c b/arch/arm/mach-omap2/drm.c
index 4c7566c7e24a..2a2cfa88ddbf 100644
--- a/arch/arm/mach-omap2/drm.c
+++ b/arch/arm/mach-omap2/drm.c
@@ -25,6 +25,7 @@
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/platform_data/omap_drm.h> 26#include <linux/platform_data/omap_drm.h>
27 27
28#include "soc.h"
28#include "omap_device.h" 29#include "omap_device.h"
29#include "omap_hwmod.h" 30#include "omap_hwmod.h"
30 31
@@ -56,7 +57,7 @@ static int __init omap_init_drm(void)
56 oh->name); 57 oh->name);
57 } 58 }
58 59
59 platform_data.omaprev = GET_OMAP_REVISION(); 60 platform_data.omaprev = GET_OMAP_TYPE;
60 61
61 return platform_device_register(&omap_drm_device); 62 return platform_device_register(&omap_drm_device);
62 63
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 129d5081ed15..793f54ac7d14 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -2132,8 +2132,12 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
2132 * currently reset very early during boot, before I2C is 2132 * currently reset very early during boot, before I2C is
2133 * available, so it doesn't seem that we have any choice in 2133 * available, so it doesn't seem that we have any choice in
2134 * the kernel other than to avoid resetting it. 2134 * the kernel other than to avoid resetting it.
2135 *
2136 * Also, McPDM needs to be configured to NO_IDLE mode when it
2137 * is in used otherwise vital clocks will be gated which
2138 * results 'slow motion' audio playback.
2135 */ 2139 */
2136 .flags = HWMOD_EXT_OPT_MAIN_CLK, 2140 .flags = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE,
2137 .mpu_irqs = omap44xx_mcpdm_irqs, 2141 .mpu_irqs = omap44xx_mcpdm_irqs,
2138 .sdma_reqs = omap44xx_mcpdm_sdma_reqs, 2142 .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
2139 .main_clk = "mcpdm_fck", 2143 .main_clk = "mcpdm_fck",
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 691aa674665a..b8ad6e632bb8 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -165,15 +165,11 @@ static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
165 struct device_node *np; 165 struct device_node *np;
166 166
167 for_each_matching_node(np, match) { 167 for_each_matching_node(np, match) {
168 if (!of_device_is_available(np)) { 168 if (!of_device_is_available(np))
169 of_node_put(np);
170 continue; 169 continue;
171 }
172 170
173 if (property && !of_get_property(np, property, NULL)) { 171 if (property && !of_get_property(np, property, NULL))
174 of_node_put(np);
175 continue; 172 continue;
176 }
177 173
178 of_add_property(np, &device_disabled); 174 of_add_property(np, &device_disabled);
179 return np; 175 return np;
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
index a611ad3153c7..b6132aa95dc0 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -463,6 +463,9 @@
463 GPIO76_LCD_PCLK, \ 463 GPIO76_LCD_PCLK, \
464 GPIO77_LCD_BIAS 464 GPIO77_LCD_BIAS
465 465
466/* these enable a work-around for a hw bug in pxa27x during ac97 warm reset */
467#define GPIO113_AC97_nRESET_GPIO_HIGH MFP_CFG_OUT(GPIO113, AF0, DEFAULT)
468#define GPIO95_AC97_nRESET_GPIO_HIGH MFP_CFG_OUT(GPIO95, AF0, DEFAULT)
466 469
467extern int keypad_set_wake(unsigned int on); 470extern int keypad_set_wake(unsigned int on);
468#endif /* __ASM_ARCH_MFP_PXA27X_H */ 471#endif /* __ASM_ARCH_MFP_PXA27X_H */
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index 8047ee0effc5..616cb87b6179 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -47,9 +47,9 @@ void pxa27x_clear_otgph(void)
47EXPORT_SYMBOL(pxa27x_clear_otgph); 47EXPORT_SYMBOL(pxa27x_clear_otgph);
48 48
49static unsigned long ac97_reset_config[] = { 49static unsigned long ac97_reset_config[] = {
50 GPIO113_GPIO, 50 GPIO113_AC97_nRESET_GPIO_HIGH,
51 GPIO113_AC97_nRESET, 51 GPIO113_AC97_nRESET,
52 GPIO95_GPIO, 52 GPIO95_AC97_nRESET_GPIO_HIGH,
53 GPIO95_AC97_nRESET, 53 GPIO95_AC97_nRESET,
54}; 54};
55 55
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-13 17:11:12 -0400