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authorJavi Merino <javi.merino@arm.com>2013-01-31 15:09:04 -0500
committerCatalin Marinas <catalin.marinas@arm.com>2013-03-20 13:22:12 -0400
commit3e98fdacc59bbbdbb659be1a144ccc48ed4860fa (patch)
tree2883828516c7f88b2f63138dfc28c93cb5b26b35 /arch/arm64/kernel
parentde79a64d61ed3f7ccec9f9661fab2f3e97256243 (diff)
arm64: kernel: make the pen of the secondary a 64-bit unsigned value
Change the prototype of write_pen_release() accordingly and clarify that's holding the hardware id of the secondary that's going to boot. This is in preparation of getting HWIDs parsed from the DT. Signed-off-by: Javi Merino <javi.merino@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel')
-rw-r--r--arch/arm64/kernel/smp.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index bdd34597254b..a57a373d305f 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -53,7 +53,7 @@
53 * where to place its SVC stack 53 * where to place its SVC stack
54 */ 54 */
55struct secondary_data secondary_data; 55struct secondary_data secondary_data;
56volatile unsigned long secondary_holding_pen_release = -1; 56volatile unsigned long secondary_holding_pen_release = INVALID_HWID;
57 57
58enum ipi_msg_type { 58enum ipi_msg_type {
59 IPI_RESCHEDULE, 59 IPI_RESCHEDULE,
@@ -70,7 +70,7 @@ static DEFINE_RAW_SPINLOCK(boot_lock);
70 * in coherency or not. This is necessary for the hotplug code to work 70 * in coherency or not. This is necessary for the hotplug code to work
71 * reliably. 71 * reliably.
72 */ 72 */
73static void __cpuinit write_pen_release(int val) 73static void __cpuinit write_pen_release(u64 val)
74{ 74{
75 void *start = (void *)&secondary_holding_pen_release; 75 void *start = (void *)&secondary_holding_pen_release;
76 unsigned long size = sizeof(secondary_holding_pen_release); 76 unsigned long size = sizeof(secondary_holding_pen_release);
@@ -105,7 +105,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
105 105
106 timeout = jiffies + (1 * HZ); 106 timeout = jiffies + (1 * HZ);
107 while (time_before(jiffies, timeout)) { 107 while (time_before(jiffies, timeout)) {
108 if (secondary_holding_pen_release == -1UL) 108 if (secondary_holding_pen_release == INVALID_HWID)
109 break; 109 break;
110 udelay(10); 110 udelay(10);
111 } 111 }
@@ -116,7 +116,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
116 */ 116 */
117 raw_spin_unlock(&boot_lock); 117 raw_spin_unlock(&boot_lock);
118 118
119 return secondary_holding_pen_release != -1 ? -ENOSYS : 0; 119 return secondary_holding_pen_release != INVALID_HWID ? -ENOSYS : 0;
120} 120}
121 121
122static DECLARE_COMPLETION(cpu_running); 122static DECLARE_COMPLETION(cpu_running);
@@ -190,7 +190,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
190 * Let the primary processor know we're out of the 190 * Let the primary processor know we're out of the
191 * pen, then head off into the C entry point 191 * pen, then head off into the C entry point
192 */ 192 */
193 write_pen_release(-1); 193 write_pen_release(INVALID_HWID);
194 194
195 /* 195 /*
196 * Synchronise with the boot thread. 196 * Synchronise with the boot thread.