diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 09:06:20 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 16:45:42 -0500 |
commit | b2a6cf3b1e099a724504ba16a4c9aea1eb0122a6 (patch) | |
tree | 32e898703506e2d90a5e7f4545bca44e13678388 /arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | |
parent | 72aaf09fda49f5919d98d65d35e5179f3acb0497 (diff) |
[ARM] S3C24XX: Default SPI pin configuration for SPI
Add a set of default pin configuration routines for
setting up the SPI gpio configuration when using the
hardware SPI driver.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c')
-rw-r--r-- | arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c new file mode 100644 index 000000000000..8b403cbb53d2 --- /dev/null +++ b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | |||
@@ -0,0 +1,37 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | ||
2 | * | ||
3 | * Copyright (c) 2008 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * S3C24XX SPI - gpio configuration for bus 0 on gpe11,12,13 | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | |||
16 | #include <mach/hardware.h> | ||
17 | |||
18 | #include <mach/spi.h> | ||
19 | #include <mach/regs-gpio.h> | ||
20 | |||
21 | void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, | ||
22 | int enable) | ||
23 | { | ||
24 | if (enable) { | ||
25 | s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPE13_SPICLK0); | ||
26 | s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPE12_SPIMOSI0); | ||
27 | s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPE11_SPIMISO0); | ||
28 | s3c2410_gpio_pullup(S3C2410_GPE11, 0); | ||
29 | s3c2410_gpio_pullup(S3C2410_GPE13, 0); | ||
30 | } else { | ||
31 | s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPIO_INPUT); | ||
32 | s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPIO_INPUT); | ||
33 | s3c2410_gpio_pullup(S3C2410_GPE11, 1); | ||
34 | s3c2410_gpio_pullup(S3C2410_GPE12, 1); | ||
35 | s3c2410_gpio_pullup(S3C2410_GPE13, 1); | ||
36 | } | ||
37 | } | ||