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authorZhangfei Gao <zhangfei.gao@marvell.com>2011-06-08 05:41:57 -0400
committerChris Ball <cjb@laptop.org>2011-07-20 17:20:49 -0400
commita702c8abb2a95a5b5920373a727be0b94d96b33c (patch)
tree85286f81398fcb0de72f101486bcb439a25079d3 /arch/arm/plat-pxa
parentf0de836923186e1fc0acb65299c2f2089c7992af (diff)
mmc: host: split up sdhci-pxa, create sdhci-pxav3.c
sdhci-pltfm driver for PXAV3 SoCs, such as MMP2. Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Signed-off-by: Philip Rakity <prakity@marvell.com> Acked-by: Philip Rakity <prakity@marvell.com> Acked-by: Mark F. Brown <mark.brown314@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'arch/arm/plat-pxa')
-rw-r--r--arch/arm/plat-pxa/include/plat/sdhci.h35
1 files changed, 30 insertions, 5 deletions
diff --git a/arch/arm/plat-pxa/include/plat/sdhci.h b/arch/arm/plat-pxa/include/plat/sdhci.h
index 1ab332e37d7d..800ebc149fc1 100644
--- a/arch/arm/plat-pxa/include/plat/sdhci.h
+++ b/arch/arm/plat-pxa/include/plat/sdhci.h
@@ -15,21 +15,46 @@
15 15
16/* pxa specific flag */ 16/* pxa specific flag */
17/* Require clock free running */ 17/* Require clock free running */
18#define PXA_FLAG_DISABLE_CLOCK_GATING (1<<0) 18#define PXA_FLAG_ENABLE_CLOCK_GATING (1<<0)
19 19/* card always wired to host, like on-chip emmc */
20#define PXA_FLAG_CARD_PERMANENT (1<<1)
20/* Board design supports 8-bit data on SD/SDIO BUS */ 21/* Board design supports 8-bit data on SD/SDIO BUS */
21#define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2) 22#define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2)
22 23
23/* 24/*
24 * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI 25 * struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
25 * @max_speed: the maximum speed supported
26 * @quirks: quirks of specific device
27 * @flags: flags for platform requirement 26 * @flags: flags for platform requirement
27 * @clk_delay_cycles:
28 * mmp2: each step is roughly 100ps, 5bits width
29 * pxa910: each step is 1ns, 4bits width
30 * @clk_delay_sel: select clk_delay, used on pxa910
31 * 0: choose feedback clk
32 * 1: choose feedback clk + delay value
33 * 2: choose internal clk
34 * @clk_delay_enable: enable clk_delay or not, used on pxa910
35 * @ext_cd_gpio: gpio pin used for external CD line
36 * @ext_cd_gpio_invert: invert values for external CD gpio line
37 * @max_speed: the maximum speed supported
38 * @host_caps: Standard MMC host capabilities bit field.
39 * @quirks: quirks of platfrom
40 * @pm_caps: pm_caps of platfrom
28 */ 41 */
29struct sdhci_pxa_platdata { 42struct sdhci_pxa_platdata {
43 unsigned int flags;
44 unsigned int clk_delay_cycles;
45 unsigned int clk_delay_sel;
46 bool clk_delay_enable;
47 unsigned int ext_cd_gpio;
48 bool ext_cd_gpio_invert;
30 unsigned int max_speed; 49 unsigned int max_speed;
50 unsigned int host_caps;
31 unsigned int quirks; 51 unsigned int quirks;
32 unsigned int flags; 52 unsigned int pm_caps;
53};
54
55struct sdhci_pxa {
56 u8 clk_enable;
57 u8 power_mode;
33}; 58};
34 59
35#endif /* __PLAT_PXA_SDHCI_H */ 60#endif /* __PLAT_PXA_SDHCI_H */