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authorFabio Estevam <fabio.estevam@freescale.com>2011-06-27 16:12:09 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-07-07 04:01:13 -0400
commite1fb61e38f8ec8e586c63d67a06197aa44ba952e (patch)
tree75fff88b37a8bdc80824cfe4059d48d2f6bccf6a /arch/arm/plat-mxc/include/mach/mx53.h
parentfce43f99631b03a65b9309d956bfca93a8fe052f (diff)
ARM: mx53: Add SSI suport
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx53.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx53.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx53.h b/arch/arm/plat-mxc/include/mach/mx53.h
index d1d1bf38efae..5e3c3236ebf3 100644
--- a/arch/arm/plat-mxc/include/mach/mx53.h
+++ b/arch/arm/plat-mxc/include/mach/mx53.h
@@ -176,10 +176,10 @@
176/* 176/*
177 * DMA request assignments 177 * DMA request assignments
178 */ 178 */
179#define MX53_DMA_REQ_SSI3_TX1 47 179#define MX53_DMA_REQ_SSI3_TX0 47
180#define MX53_DMA_REQ_SSI3_RX1 46 180#define MX53_DMA_REQ_SSI3_RX0 46
181#define MX53_DMA_REQ_SSI3_TX2 45 181#define MX53_DMA_REQ_SSI3_TX1 45
182#define MX53_DMA_REQ_SSI3_RX2 44 182#define MX53_DMA_REQ_SSI3_RX1 44
183#define MX53_DMA_REQ_UART3_TX 43 183#define MX53_DMA_REQ_UART3_TX 43
184#define MX53_DMA_REQ_UART3_RX 42 184#define MX53_DMA_REQ_UART3_RX 42
185#define MX53_DMA_REQ_ESAI_TX 41 185#define MX53_DMA_REQ_ESAI_TX 41
@@ -194,14 +194,14 @@
194#define MX53_DMA_REQ_ASRC_DMA1 32 194#define MX53_DMA_REQ_ASRC_DMA1 32
195#define MX53_DMA_REQ_EMI_WR 31 195#define MX53_DMA_REQ_EMI_WR 31
196#define MX53_DMA_REQ_EMI_RD 30 196#define MX53_DMA_REQ_EMI_RD 30
197#define MX53_DMA_REQ_SSI1_TX1 29 197#define MX53_DMA_REQ_SSI1_TX0 29
198#define MX53_DMA_REQ_SSI1_RX1 28 198#define MX53_DMA_REQ_SSI1_RX0 28
199#define MX53_DMA_REQ_SSI1_TX2 27 199#define MX53_DMA_REQ_SSI1_TX1 27
200#define MX53_DMA_REQ_SSI1_RX2 26 200#define MX53_DMA_REQ_SSI1_RX1 26
201#define MX53_DMA_REQ_SSI2_TX1 25 201#define MX53_DMA_REQ_SSI2_TX0 25
202#define MX53_DMA_REQ_SSI2_RX1 24 202#define MX53_DMA_REQ_SSI2_RX0 24
203#define MX53_DMA_REQ_SSI2_TX2 23 203#define MX53_DMA_REQ_SSI2_TX1 23
204#define MX53_DMA_REQ_SSI2_RX2 22 204#define MX53_DMA_REQ_SSI2_RX1 22
205#define MX53_DMA_REQ_I2C2_SDHC2 21 205#define MX53_DMA_REQ_I2C2_SDHC2 21
206#define MX53_DMA_REQ_I2C1_SDHC1 20 206#define MX53_DMA_REQ_I2C1_SDHC1 20
207#define MX53_DMA_REQ_UART1_TX 19 207#define MX53_DMA_REQ_UART1_TX 19