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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-09-06 12:19:08 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-01 11:40:52 -0400
commitda0916539d20f257dfa46784357300e49d6bfd00 (patch)
treee581749819a4a7e5aea471c242a51773a360bd1d /arch/arm/mm/proc-v6.S
parent1ad77a876da48331451698cc4172c90ab9b6372f (diff)
[ARM] Convert set_pte_ext implementions to macros
There are actually only four separate implementations of set_pte_ext. Use assembler macros to insert code for these into the proc-*.S files. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-v6.S')
-rw-r--r--arch/arm/mm/proc-v6.S38
1 files changed, 1 insertions, 37 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 5702ec58b2a2..70c623534021 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -114,46 +114,10 @@ ENTRY(cpu_v6_switch_mm)
114 * (hardware version is stored at -1024 bytes) 114 * (hardware version is stored at -1024 bytes)
115 * - pte - PTE value to store 115 * - pte - PTE value to store
116 * - ext - value for extended PTE bits 116 * - ext - value for extended PTE bits
117 *
118 * Permissions:
119 * YUWD APX AP1 AP0 SVC User
120 * 0xxx 0 0 0 no acc no acc
121 * 100x 1 0 1 r/o no acc
122 * 10x0 1 0 1 r/o no acc
123 * 1011 0 0 1 r/w no acc
124 * 110x 0 1 0 r/w r/o
125 * 11x0 0 1 0 r/w r/o
126 * 1111 0 1 1 r/w r/w
127 */ 117 */
128ENTRY(cpu_v6_set_pte_ext) 118ENTRY(cpu_v6_set_pte_ext)
129#ifdef CONFIG_MMU 119#ifdef CONFIG_MMU
130 str r1, [r0], #-2048 @ linux version 120 armv6_set_pte_ext
131
132 bic r3, r1, #0x000003f0
133 bic r3, r3, #0x00000003
134 orr r3, r3, r2
135 orr r3, r3, #PTE_EXT_AP0 | 2
136
137 tst r1, #L_PTE_WRITE
138 tstne r1, #L_PTE_DIRTY
139 orreq r3, r3, #PTE_EXT_APX
140
141 tst r1, #L_PTE_USER
142 orrne r3, r3, #PTE_EXT_AP1
143 tstne r3, #PTE_EXT_APX
144 bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
145
146 tst r1, #L_PTE_YOUNG
147 biceq r3, r3, #PTE_EXT_APX | PTE_EXT_AP_MASK
148
149 tst r1, #L_PTE_EXEC
150 orreq r3, r3, #PTE_EXT_XN
151
152 tst r1, #L_PTE_PRESENT
153 moveq r3, #0
154
155 str r3, [r0]
156 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
157#endif 121#endif
158 mov pc, lr 122 mov pc, lr
159 123