ARM: entry: prefetch abort helper: pass aborted pc in r4 rather than r0

This avoids unnecessary instructions for CPUs which implement the IFAR
(instruction fault address register).

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 2 insertions, 1 deletions

diff --git a/arch/arm/mm/pabort-legacy.S b/arch/arm/mm/pabort-legacy.S
index 87970eba88ea..8a5d8aaf2d5e 100644
--- a/arch/arm/mm/pabort-legacy.S
+++ b/arch/arm/mm/pabort-legacy.S
@@ -4,7 +4,7 @@
 /*
  * Function: legacy_pabort
  *
- * Params  : r0 = address of aborted instruction
+ * Params  : r4 = address of aborted instruction
  *
  * Returns : r0 = address of abort
  *         : r1 = Simulated IFSR with section translation fault status
@@ -14,6 +14,7 @@
 
         .align  5
 ENTRY(legacy_pabort)
+        mov     r0, r4
         mov     r1, #5
         mov     pc, lr
 ENDPROC(legacy_pabort)