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authorPatrice Chotard <patrice.chotard@stericsson.com>2012-10-09 09:26:11 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-10-15 07:59:50 -0400
commitd036809d8bd9f5acebb606d5bafa2c5c22d4ae88 (patch)
tree7365aaa236c7a8da04551d455e897879263d74b6 /arch/arm/mach-ux500/board-mop500-pins.c
parent9728df9565c8031eee78075a6b37fb3068d02322 (diff)
ARM: ux500: 8500: add IDLE pin configuration for SPI
This adds an idle state to the SPI pin control entry. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500/board-mop500-pins.c')
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 8ab86889f037..9c9e46580234 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -70,6 +70,9 @@ BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_NOPULL|PIN_S
70 PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func) 70 PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
71#define DB8500_PIN(pin,conf,dev) \ 71#define DB8500_PIN(pin,conf,dev) \
72 PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf) 72 PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
73#define DB8500_PIN_IDLE(pin, conf, dev) \
74 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_IDLE, "pinctrl-db8500", \
75 pin, conf)
73#define DB8500_PIN_SLEEP(pin, conf, dev) \ 76#define DB8500_PIN_SLEEP(pin, conf, dev) \
74 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \ 77 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
75 pin, conf) 78 pin, conf)
@@ -242,7 +245,12 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
242 DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */ 245 DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
243 DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */ 246 DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
244 DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */ 247 DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
248 /* SPI2 idle state */
249 DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
250 DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
251 DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
245 /* SPI2 sleep state */ 252 /* SPI2 sleep state */
253 DB8500_PIN_SLEEP("GPIO216_AG12", slpm_in_wkup_pdis, "spi2"), /* FRM */
246 DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */ 254 DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
247 DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */ 255 DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
248 DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */ 256 DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */