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authorPatrice Chotard <patrice.chotard@stericsson.com>2012-10-18 08:26:24 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-10-22 03:35:43 -0400
commit28f88306d73b21dd61a7d975f50bb5f53bc391a1 (patch)
tree4b38b72a6f8ec186d5ce5e336920c1c82b1baa87 /arch/arm/mach-ux500/board-mop500-pins.c
parent9cd9d65ba40aef21342bcdf0ea35d20c9a75be07 (diff)
ARM: ux500: 8500: define SDI sleep states
This defines the sleep states for the SDI (MMC/SD) interfaces on the MOP500 reference designs. Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ux500/board-mop500-pins.c')
-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c57
1 files changed, 55 insertions, 2 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 446cbc09e164..662563a8c306 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -53,18 +53,24 @@ BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|
53 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 53 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
54BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED| 54BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|
55 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 55 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
56BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|
57 PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
58BIAS(slpm_out_lo_pdis, PIN_SLEEPMODE_ENABLED| 56BIAS(slpm_out_lo_pdis, PIN_SLEEPMODE_ENABLED|
59 PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE|PIN_SLPM_PDIS_DISABLED); 57 PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE|PIN_SLPM_PDIS_DISABLED);
60BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED| 58BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|
61 PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE); 59 PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
62BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED| 60BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|
63 PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 61 PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
62BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|PIN_SLPM_OUTPUT_HIGH|
63 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
64BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED| 64BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|
65 PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED); 65 PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
66BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP| 66BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP|
67 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED); 67 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED);
68BIAS(out_lo_wkup_pdis, PIN_SLPM_OUTPUT_LOW|
69 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
70BIAS(in_wkup_pdis_en, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
71 PIN_SLPM_PDIS_ENABLED);
72BIAS(in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
73 PIN_SLPM_PDIS_DISABLED);
68 74
69/* We use these to define hog settings that are always done on boot */ 75/* We use these to define hog settings that are always done on boot */
70#define DB8500_MUX_HOG(group,func) \ 76#define DB8500_MUX_HOG(group,func) \
@@ -207,6 +213,18 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
207 DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */ 213 DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
208 DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */ 214 DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
209 DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */ 215 DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
216 /* SDI0 sleep state */
217 DB8500_PIN_SLEEP("GPIO18_AC2", slpm_out_hi_wkup_pdis, "sdi0"),
218 DB8500_PIN_SLEEP("GPIO19_AC1", slpm_out_hi_wkup_pdis, "sdi0"),
219 DB8500_PIN_SLEEP("GPIO20_AB4", slpm_out_hi_wkup_pdis, "sdi0"),
220 DB8500_PIN_SLEEP("GPIO22_AA3", slpm_in_wkup_pdis, "sdi0"),
221 DB8500_PIN_SLEEP("GPIO23_AA4", slpm_out_lo_wkup_pdis, "sdi0"),
222 DB8500_PIN_SLEEP("GPIO24_AB2", slpm_in_wkup_pdis, "sdi0"),
223 DB8500_PIN_SLEEP("GPIO25_Y4", slpm_in_wkup_pdis, "sdi0"),
224 DB8500_PIN_SLEEP("GPIO26_Y2", slpm_in_wkup_pdis, "sdi0"),
225 DB8500_PIN_SLEEP("GPIO27_AA2", slpm_in_wkup_pdis, "sdi0"),
226 DB8500_PIN_SLEEP("GPIO28_AA1", slpm_in_wkup_pdis, "sdi0"),
227
210 /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */ 228 /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
211 DB8500_MUX("mc1_a_1", "mc1", "sdi1"), 229 DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
212 DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */ 230 DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
@@ -216,6 +234,15 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
216 DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */ 234 DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
217 DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */ 235 DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
218 DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */ 236 DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
237 /* SDI1 sleep state */
238 DB8500_PIN_SLEEP("GPIO208_AH16", slpm_out_lo_wkup_pdis, "sdi1"), /* CLK */
239 DB8500_PIN_SLEEP("GPIO209_AG15", slpm_in_wkup_pdis, "sdi1"), /* FBCLK */
240 DB8500_PIN_SLEEP("GPIO210_AJ15", slpm_in_wkup_pdis, "sdi1"), /* CMD */
241 DB8500_PIN_SLEEP("GPIO211_AG14", slpm_in_wkup_pdis, "sdi1"), /* DAT0 */
242 DB8500_PIN_SLEEP("GPIO212_AF13", slpm_in_wkup_pdis, "sdi1"), /* DAT1 */
243 DB8500_PIN_SLEEP("GPIO213_AG13", slpm_in_wkup_pdis, "sdi1"), /* DAT2 */
244 DB8500_PIN_SLEEP("GPIO214_AH15", slpm_in_wkup_pdis, "sdi1"), /* DAT3 */
245
219 /* Mux in SDI2 (here called MC2) used for for PoP eMMC */ 246 /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
220 DB8500_MUX("mc2_a_1", "mc2", "sdi2"), 247 DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
221 DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */ 248 DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
@@ -229,6 +256,19 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
229 DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */ 256 DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
230 DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */ 257 DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
231 DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */ 258 DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
259 /* SDI2 sleep state */
260 DB8500_PIN_SLEEP("GPIO128_A5", out_lo_wkup_pdis, "sdi2"), /* CLK */
261 DB8500_PIN_SLEEP("GPIO129_B4", in_wkup_pdis_en, "sdi2"), /* CMD */
262 DB8500_PIN_SLEEP("GPIO130_C8", in_wkup_pdis_en, "sdi2"), /* FBCLK */
263 DB8500_PIN_SLEEP("GPIO131_A12", in_wkup_pdis, "sdi2"), /* DAT0 */
264 DB8500_PIN_SLEEP("GPIO132_C10", in_wkup_pdis, "sdi2"), /* DAT1 */
265 DB8500_PIN_SLEEP("GPIO133_B10", in_wkup_pdis, "sdi2"), /* DAT2 */
266 DB8500_PIN_SLEEP("GPIO134_B9", in_wkup_pdis, "sdi2"), /* DAT3 */
267 DB8500_PIN_SLEEP("GPIO135_A9", in_wkup_pdis, "sdi2"), /* DAT4 */
268 DB8500_PIN_SLEEP("GPIO136_C7", in_wkup_pdis, "sdi2"), /* DAT5 */
269 DB8500_PIN_SLEEP("GPIO137_A7", in_wkup_pdis, "sdi2"), /* DAT6 */
270 DB8500_PIN_SLEEP("GPIO138_C5", in_wkup_pdis, "sdi2"), /* DAT7 */
271
232 /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */ 272 /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
233 DB8500_MUX("mc4_a_1", "mc4", "sdi4"), 273 DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
234 DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */ 274 DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
@@ -242,6 +282,19 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
242 DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */ 282 DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
243 DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */ 283 DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
244 DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */ 284 DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
285 /*SDI4 sleep state */
286 DB8500_PIN_SLEEP("GPIO197_AH24", slpm_in_wkup_pdis, "sdi4"), /* DAT3 */
287 DB8500_PIN_SLEEP("GPIO198_AG25", slpm_in_wkup_pdis, "sdi4"), /* DAT2 */
288 DB8500_PIN_SLEEP("GPIO199_AH23", slpm_in_wkup_pdis, "sdi4"), /* DAT1 */
289 DB8500_PIN_SLEEP("GPIO200_AH26", slpm_in_wkup_pdis, "sdi4"), /* DAT0 */
290 DB8500_PIN_SLEEP("GPIO201_AF24", slpm_in_wkup_pdis, "sdi4"), /* CMD */
291 DB8500_PIN_SLEEP("GPIO202_AF25", slpm_in_wkup_pdis, "sdi4"), /* FBCLK */
292 DB8500_PIN_SLEEP("GPIO203_AE23", slpm_out_lo_wkup_pdis, "sdi4"), /* CLK */
293 DB8500_PIN_SLEEP("GPIO204_AF23", slpm_in_wkup_pdis, "sdi4"), /* DAT7 */
294 DB8500_PIN_SLEEP("GPIO205_AG23", slpm_in_wkup_pdis, "sdi4"), /* DAT6 */
295 DB8500_PIN_SLEEP("GPIO206_AG24", slpm_in_wkup_pdis, "sdi4"), /* DAT5 */
296 DB8500_PIN_SLEEP("GPIO207_AJ23", slpm_in_wkup_pdis, "sdi4"), /* DAT4 */
297
245 /* Mux in USB pins, drive STP high */ 298 /* Mux in USB pins, drive STP high */
246 DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"), 299 DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
247 DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */ 300 DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */