diff options
author | Prashant Gaikwad <pgaikwad@nvidia.com> | 2013-01-11 02:46:26 -0500 |
---|---|---|
committer | Stephen Warren <swarren@nvidia.com> | 2013-01-28 13:19:07 -0500 |
commit | 61fd290d213e25d5a119b8ca25644001ed9f8f2d (patch) | |
tree | 16d8d1da34b5970985145c14cd6b8a624486abba /arch/arm/mach-tegra/clock.c | |
parent | b08e8c0ecc42afa3a2e1019851af741980dd5a6b (diff) |
ARM: tegra: migrate to new clock code
Migrate Tegra clock support to drivers/clk/tegra, this involves
moving:
1. definition of tegra_cpu_car_ops to clk.c
2. definition of reset functions to clk-peripheral.c
3. change parent of cpu clock.
4. Remove legacy clock initialization.
5. Initialize clocks using DT.
6. Remove all instance of mach/clk.h
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: use to_clk_periph_gate().]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/clock.c')
-rw-r--r-- | arch/arm/mach-tegra/clock.c | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 8c0ff061f8cf..baa0c5b008f1 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c | |||
@@ -31,9 +31,6 @@ | |||
31 | #include "board.h" | 31 | #include "board.h" |
32 | #include "clock.h" | 32 | #include "clock.h" |
33 | 33 | ||
34 | /* Global data of Tegra CPU CAR ops */ | ||
35 | struct tegra_cpu_car_ops *tegra_cpu_car_ops; | ||
36 | |||
37 | /* | 34 | /* |
38 | * Locking: | 35 | * Locking: |
39 | * | 36 | * |
@@ -131,22 +128,6 @@ void tegra_clk_init_from_table(struct tegra_clk_init_table *table) | |||
131 | tegra_clk_init_one_from_table(table); | 128 | tegra_clk_init_one_from_table(table); |
132 | } | 129 | } |
133 | 130 | ||
134 | void tegra_periph_reset_deassert(struct clk *c) | ||
135 | { | ||
136 | struct clk_tegra *clk = to_clk_tegra(__clk_get_hw(c)); | ||
137 | BUG_ON(!clk->reset); | ||
138 | clk->reset(__clk_get_hw(c), false); | ||
139 | } | ||
140 | EXPORT_SYMBOL(tegra_periph_reset_deassert); | ||
141 | |||
142 | void tegra_periph_reset_assert(struct clk *c) | ||
143 | { | ||
144 | struct clk_tegra *clk = to_clk_tegra(__clk_get_hw(c)); | ||
145 | BUG_ON(!clk->reset); | ||
146 | clk->reset(__clk_get_hw(c), true); | ||
147 | } | ||
148 | EXPORT_SYMBOL(tegra_periph_reset_assert); | ||
149 | |||
150 | /* Several extended clock configuration bits (e.g., clock routing, clock | 131 | /* Several extended clock configuration bits (e.g., clock routing, clock |
151 | * phase control) are included in PLL and peripheral clock source | 132 | * phase control) are included in PLL and peripheral clock source |
152 | * registers. */ | 133 | * registers. */ |