ARM: tegra: add support for new clock framework features

Add support for new clock framework features implemented in tegra30.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 22 insertions, 0 deletions

diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 8337068a4abe..8dad8d18cb49 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -399,6 +399,28 @@ void tegra_periph_reset_assert(struct clk *c)
 }
 EXPORT_SYMBOL(tegra_periph_reset_assert);
 
+/* Several extended clock configuration bits (e.g., clock routing, clock
+ * phase control) are included in PLL and peripheral clock source
+ * registers. */
+int tegra_clk_cfg_ex(struct clk *c, enum tegra_clk_ex_param p, u32 setting)
+{
+        int ret = 0;
+        unsigned long flags;
+
+        spin_lock_irqsave(&c->spinlock, flags);
+
+        if (!c->ops || !c->ops->clk_cfg_ex) {
+                ret = -ENOSYS;
+                goto out;
+        }
+        ret = c->ops->clk_cfg_ex(c, p, setting);
+
+out:
+        spin_unlock_irqrestore(&c->spinlock, flags);
+
+        return ret;
+}
+
 #ifdef CONFIG_DEBUG_FS
 
 static int __clk_lock_all_spinlocks(void)