diff options
author | Magnus Damm <damm@opensource.se> | 2010-12-28 03:27:01 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-01-06 20:42:50 -0500 |
commit | 863b171952dba1a3ce9d345cfe4e93c9fdd42f49 (patch) | |
tree | 8181acaff12a0040ca6e86cfec380f54e4a2fd51 /arch/arm/mach-shmobile/entry-intc.S | |
parent | 60f1435c3bab8b88712a4f96806e5ac9396aa49c (diff) |
ARM: mach-shmobile: Run-time IRQ handler for INTCA
Break-out INTC specific IRQ demux code from the file
entry-macro-intc.S and register during run-time.
Covers sh7367, sh7377 and sh7372.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm/mach-shmobile/entry-intc.S')
-rw-r--r-- | arch/arm/mach-shmobile/entry-intc.S | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/entry-intc.S b/arch/arm/mach-shmobile/entry-intc.S new file mode 100644 index 000000000000..cac0a7ae2084 --- /dev/null +++ b/arch/arm/mach-shmobile/entry-intc.S | |||
@@ -0,0 +1,57 @@ | |||
1 | /* | ||
2 | * ARM Interrupt demux handler using INTC | ||
3 | * | ||
4 | * Copyright (C) 2010 Magnus Damm | ||
5 | * Copyright (C) 2008 Renesas Solutions Corp. | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public | ||
8 | * License version 2. This program is licensed "as is" without any | ||
9 | * warranty of any kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #include <asm/entry-macro-multi.S> | ||
13 | |||
14 | #define INTCA_BASE 0xe6980000 | ||
15 | #define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */ | ||
16 | #define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */ | ||
17 | #define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */ | ||
18 | #define INTLVLB_OFFS 0x00000034 /* previous priority level */ | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | ||
21 | ldr \base, =INTCA_BASE | ||
22 | .endm | ||
23 | |||
24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
25 | /* The single INTFLGA read access below results in the following: | ||
26 | * | ||
27 | * 1. INTLVLB is updated with old priority value from INTLVLA | ||
28 | * 2. Highest priority interrupt is accepted | ||
29 | * 3. INTLVLA is updated to contain priority of accepted interrupt | ||
30 | * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA | ||
31 | */ | ||
32 | ldr \irqnr, [\base, #INTFLGA_OFFS] | ||
33 | |||
34 | /* Restore INTLVLA with the value saved in INTLVLB. | ||
35 | * This is required to support interrupt priorities properly. | ||
36 | */ | ||
37 | ldrb \tmp, [\base, #INTLVLB_OFFS] | ||
38 | strb \tmp, [\base, #INTLVLA_OFFS] | ||
39 | |||
40 | /* Handle invalid vector number case */ | ||
41 | cmp \irqnr, #0 | ||
42 | beq 1000f | ||
43 | |||
44 | /* Convert vector to irq number, same as the evt2irq() macro */ | ||
45 | lsr \irqnr, \irqnr, #0x5 | ||
46 | subs \irqnr, \irqnr, #16 | ||
47 | |||
48 | 1000: | ||
49 | .endm | ||
50 | |||
51 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
52 | .endm | ||
53 | |||
54 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
55 | .endm | ||
56 | |||
57 | arch_irq_handler shmobile_handle_irq_intc | ||