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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-05-08 09:09:47 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-23 13:04:51 -0400
commit234b6ceddb4fc2a4bc5b9a7670f070f6e69e0868 (patch)
tree891f57ca663b5ec0bb61bb3e38c5306e0d13d2bd /arch/arm/mach-sa1100/time.c
parent442c8176d2efa468577738e3a99a6e051f6e8e55 (diff)
clocksource: convert ARM 32-bit up counting clocksources
Convert ixp4xx, lpc32xx, mxc, netx, pxa, sa1100, tcc8k, tegra and u300 to use the generic mmio clocksource recently introduced. Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Acked-by: Eric Miao <eric.y.miao@gmail.com> Acked-by: "Hans J. Koch" <hjk@hansjkoch.de> Acked-by: Colin Cross <ccross@android.com> Cc: Erik Gilling <konkers@android.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100/time.c')
-rw-r--r--arch/arm/mach-sa1100/time.c16
1 files changed, 2 insertions, 14 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 51c05292d145..fa6602491d54 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -97,19 +97,6 @@ static struct clock_event_device ckevt_sa1100_osmr0 = {
97 .set_mode = sa1100_osmr0_set_mode, 97 .set_mode = sa1100_osmr0_set_mode,
98}; 98};
99 99
100static cycle_t sa1100_read_oscr(struct clocksource *s)
101{
102 return OSCR;
103}
104
105static struct clocksource cksrc_sa1100_oscr = {
106 .name = "oscr",
107 .rating = 200,
108 .read = sa1100_read_oscr,
109 .mask = CLOCKSOURCE_MASK(32),
110 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
111};
112
113static struct irqaction sa1100_timer_irq = { 100static struct irqaction sa1100_timer_irq = {
114 .name = "ost0", 101 .name = "ost0",
115 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 102 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
@@ -134,7 +121,8 @@ static void __init sa1100_timer_init(void)
134 121
135 setup_irq(IRQ_OST0, &sa1100_timer_irq); 122 setup_irq(IRQ_OST0, &sa1100_timer_irq);
136 123
137 clocksource_register_hz(&cksrc_sa1100_oscr, CLOCK_TICK_RATE); 124 clocksource_mmio_init(&OSCR, "oscr", CLOCK_TICK_RATE, 200, 32,
125 clocksource_mmio_readl_up);
138 clockevents_register_device(&ckevt_sa1100_osmr0); 126 clockevents_register_device(&ckevt_sa1100_osmr0);
139} 127}
140 128