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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:30:28 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:30:28 -0500
commit190a44e65b0f32eaf5b4db3969f5eb224f83a7a2 (patch)
tree577c9a3949ba06e62d082eb11894b7045ebe3ef3 /arch/arm/mach-s5pv210
parentdfc1ebe76663d582a01c9dc572395cf8086d01de (diff)
parentb48741cce3be32a48af9a2b272f3f13a077375cf (diff)
Merge tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Cleanups for the Samsung platforms Various cleanup changes that the device driver changes are built upon. Since the samsung cleanups depend on the device tree series, which depends on the first set of cleanups for tegra. * tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: EXYNOS: Use gpio_request_one ARM: S5PV210: Use gpio_request_one ARM: S3C64XX: Modified according to SPI consolidation work ARM: S5PV210: Modified files for SPI consolidation work ARM: S5P64X0: Modified files for SPI consolidation work ARM: S5PC100: Modified files for SPI consolidation work ARM: S3C64XX: Modified files for SPI consolidation work ARM: SAMSUNG: Consolidation of SPI platform devices to plat-samsung ARM: SAMSUNG: Remove SPI bus clocks from platform data ARM: S5PV210: Add SPI clkdev support ARM: S5P64X0: Add SPI clkdev support ARM: S5PC100: Add SPI clkdev support ARM: S3C64XX: Add SPI clkdev support spi/s3c64xx: Use bus clocks created using clkdev mmc: sdhci-s3c: Use generic clock names for sdhci bus clock options ARM: SAMSUNG: Add lookup of sdhci-s3c clocks using generic names ARM: SAMSUNG: Remove SDHCI bus clocks from platform data ARM: SAMSUNG: Use kmemdup rather than duplicating its implementation ARM: EXYNOS: remove exynos4_scu_enable()
Diffstat (limited to 'arch/arm/mach-s5pv210')
-rw-r--r--arch/arm/mach-s5pv210/Kconfig5
-rw-r--r--arch/arm/mach-s5pv210/Makefile3
-rw-r--r--arch/arm/mach-s5pv210/clock.c217
-rw-r--r--arch/arm/mach-s5pv210/dev-spi.c175
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h2
-rw-r--r--arch/arm/mach-s5pv210/mach-aquila.c3
-rw-r--r--arch/arm/mach-s5pv210/mach-goni.c6
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c10
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci.c22
-rw-r--r--arch/arm/mach-s5pv210/setup-spi.c51
10 files changed, 198 insertions, 296 deletions
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 646057ab2e4c..2cdc42e838b8 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -60,6 +60,11 @@ config S5PV210_SETUP_FIMC
60 help 60 help
61 Common setup code for the camera interfaces. 61 Common setup code for the camera interfaces.
62 62
63config S5PV210_SETUP_SPI
64 bool
65 help
66 Common setup code for SPI GPIO configurations.
67
63menu "S5PC110 Machines" 68menu "S5PC110 Machines"
64 69
65config MACH_AQUILA 70config MACH_AQUILA
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 4c59186de957..76a121dd52b4 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -29,7 +29,6 @@ obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o
29# device support 29# device support
30 30
31obj-y += dev-audio.o 31obj-y += dev-audio.o
32obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
33 32
34obj-y += setup-i2c0.o 33obj-y += setup-i2c0.o
35obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o 34obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o
@@ -38,5 +37,5 @@ obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o
38obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o 37obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o
39obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o 38obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o
40obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o 39obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o
41obj-$(CONFIG_S5PV210_SETUP_SDHCI) += setup-sdhci.o
42obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 40obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
41obj-$(CONFIG_S5PV210_SETUP_SPI) += setup-spi.o
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index d8df66887060..c78dfddd77fd 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -400,30 +400,6 @@ static struct clk init_clocks_off[] = {
400 .enable = s5pv210_clk_ip1_ctrl, 400 .enable = s5pv210_clk_ip1_ctrl,
401 .ctrlbit = (1<<25), 401 .ctrlbit = (1<<25),
402 }, { 402 }, {
403 .name = "hsmmc",
404 .devname = "s3c-sdhci.0",
405 .parent = &clk_hclk_psys.clk,
406 .enable = s5pv210_clk_ip2_ctrl,
407 .ctrlbit = (1<<16),
408 }, {
409 .name = "hsmmc",
410 .devname = "s3c-sdhci.1",
411 .parent = &clk_hclk_psys.clk,
412 .enable = s5pv210_clk_ip2_ctrl,
413 .ctrlbit = (1<<17),
414 }, {
415 .name = "hsmmc",
416 .devname = "s3c-sdhci.2",
417 .parent = &clk_hclk_psys.clk,
418 .enable = s5pv210_clk_ip2_ctrl,
419 .ctrlbit = (1<<18),
420 }, {
421 .name = "hsmmc",
422 .devname = "s3c-sdhci.3",
423 .parent = &clk_hclk_psys.clk,
424 .enable = s5pv210_clk_ip2_ctrl,
425 .ctrlbit = (1<<19),
426 }, {
427 .name = "systimer", 403 .name = "systimer",
428 .parent = &clk_pclk_psys.clk, 404 .parent = &clk_pclk_psys.clk,
429 .enable = s5pv210_clk_ip3_ctrl, 405 .enable = s5pv210_clk_ip3_ctrl,
@@ -560,6 +536,38 @@ static struct clk init_clocks[] = {
560 }, 536 },
561}; 537};
562 538
539static struct clk clk_hsmmc0 = {
540 .name = "hsmmc",
541 .devname = "s3c-sdhci.0",
542 .parent = &clk_hclk_psys.clk,
543 .enable = s5pv210_clk_ip2_ctrl,
544 .ctrlbit = (1<<16),
545};
546
547static struct clk clk_hsmmc1 = {
548 .name = "hsmmc",
549 .devname = "s3c-sdhci.1",
550 .parent = &clk_hclk_psys.clk,
551 .enable = s5pv210_clk_ip2_ctrl,
552 .ctrlbit = (1<<17),
553};
554
555static struct clk clk_hsmmc2 = {
556 .name = "hsmmc",
557 .devname = "s3c-sdhci.2",
558 .parent = &clk_hclk_psys.clk,
559 .enable = s5pv210_clk_ip2_ctrl,
560 .ctrlbit = (1<<18),
561};
562
563static struct clk clk_hsmmc3 = {
564 .name = "hsmmc",
565 .devname = "s3c-sdhci.3",
566 .parent = &clk_hclk_psys.clk,
567 .enable = s5pv210_clk_ip2_ctrl,
568 .ctrlbit = (1<<19),
569};
570
563static struct clk *clkset_uart_list[] = { 571static struct clk *clkset_uart_list[] = {
564 [6] = &clk_mout_mpll.clk, 572 [6] = &clk_mout_mpll.clk,
565 [7] = &clk_mout_epll.clk, 573 [7] = &clk_mout_epll.clk,
@@ -867,46 +875,6 @@ static struct clksrc_clk clksrcs[] = {
867 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 }, 875 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 },
868 }, { 876 }, {
869 .clk = { 877 .clk = {
870 .name = "sclk_mmc",
871 .devname = "s3c-sdhci.0",
872 .enable = s5pv210_clk_mask0_ctrl,
873 .ctrlbit = (1 << 8),
874 },
875 .sources = &clkset_group2,
876 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 },
877 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 },
878 }, {
879 .clk = {
880 .name = "sclk_mmc",
881 .devname = "s3c-sdhci.1",
882 .enable = s5pv210_clk_mask0_ctrl,
883 .ctrlbit = (1 << 9),
884 },
885 .sources = &clkset_group2,
886 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 },
887 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 },
888 }, {
889 .clk = {
890 .name = "sclk_mmc",
891 .devname = "s3c-sdhci.2",
892 .enable = s5pv210_clk_mask0_ctrl,
893 .ctrlbit = (1 << 10),
894 },
895 .sources = &clkset_group2,
896 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 },
897 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 },
898 }, {
899 .clk = {
900 .name = "sclk_mmc",
901 .devname = "s3c-sdhci.3",
902 .enable = s5pv210_clk_mask0_ctrl,
903 .ctrlbit = (1 << 11),
904 },
905 .sources = &clkset_group2,
906 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 },
907 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
908 }, {
909 .clk = {
910 .name = "sclk_mfc", 878 .name = "sclk_mfc",
911 .devname = "s5p-mfc", 879 .devname = "s5p-mfc",
912 .enable = s5pv210_clk_ip0_ctrl, 880 .enable = s5pv210_clk_ip0_ctrl,
@@ -944,26 +912,6 @@ static struct clksrc_clk clksrcs[] = {
944 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 }, 912 .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 },
945 }, { 913 }, {
946 .clk = { 914 .clk = {
947 .name = "sclk_spi",
948 .devname = "s3c64xx-spi.0",
949 .enable = s5pv210_clk_mask0_ctrl,
950 .ctrlbit = (1 << 16),
951 },
952 .sources = &clkset_group2,
953 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
954 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
955 }, {
956 .clk = {
957 .name = "sclk_spi",
958 .devname = "s3c64xx-spi.1",
959 .enable = s5pv210_clk_mask0_ctrl,
960 .ctrlbit = (1 << 17),
961 },
962 .sources = &clkset_group2,
963 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
964 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
965 }, {
966 .clk = {
967 .name = "sclk_pwi", 915 .name = "sclk_pwi",
968 .enable = s5pv210_clk_mask0_ctrl, 916 .enable = s5pv210_clk_mask0_ctrl,
969 .ctrlbit = (1 << 29), 917 .ctrlbit = (1 << 29),
@@ -1031,11 +979,97 @@ static struct clksrc_clk clk_sclk_uart3 = {
1031 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 }, 979 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
1032}; 980};
1033 981
982static struct clksrc_clk clk_sclk_mmc0 = {
983 .clk = {
984 .name = "sclk_mmc",
985 .devname = "s3c-sdhci.0",
986 .enable = s5pv210_clk_mask0_ctrl,
987 .ctrlbit = (1 << 8),
988 },
989 .sources = &clkset_group2,
990 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 },
991 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 },
992};
993
994static struct clksrc_clk clk_sclk_mmc1 = {
995 .clk = {
996 .name = "sclk_mmc",
997 .devname = "s3c-sdhci.1",
998 .enable = s5pv210_clk_mask0_ctrl,
999 .ctrlbit = (1 << 9),
1000 },
1001 .sources = &clkset_group2,
1002 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 },
1003 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 },
1004};
1005
1006static struct clksrc_clk clk_sclk_mmc2 = {
1007 .clk = {
1008 .name = "sclk_mmc",
1009 .devname = "s3c-sdhci.2",
1010 .enable = s5pv210_clk_mask0_ctrl,
1011 .ctrlbit = (1 << 10),
1012 },
1013 .sources = &clkset_group2,
1014 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 },
1015 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 },
1016};
1017
1018static struct clksrc_clk clk_sclk_mmc3 = {
1019 .clk = {
1020 .name = "sclk_mmc",
1021 .devname = "s3c-sdhci.3",
1022 .enable = s5pv210_clk_mask0_ctrl,
1023 .ctrlbit = (1 << 11),
1024 },
1025 .sources = &clkset_group2,
1026 .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 },
1027 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
1028};
1029
1030static struct clksrc_clk clk_sclk_spi0 = {
1031 .clk = {
1032 .name = "sclk_spi",
1033 .devname = "s3c64xx-spi.0",
1034 .enable = s5pv210_clk_mask0_ctrl,
1035 .ctrlbit = (1 << 16),
1036 },
1037 .sources = &clkset_group2,
1038 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
1039 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
1040 };
1041
1042static struct clksrc_clk clk_sclk_spi1 = {
1043 .clk = {
1044 .name = "sclk_spi",
1045 .devname = "s3c64xx-spi.1",
1046 .enable = s5pv210_clk_mask0_ctrl,
1047 .ctrlbit = (1 << 17),
1048 },
1049 .sources = &clkset_group2,
1050 .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
1051 .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
1052 };
1053
1054
1034static struct clksrc_clk *clksrc_cdev[] = { 1055static struct clksrc_clk *clksrc_cdev[] = {
1035 &clk_sclk_uart0, 1056 &clk_sclk_uart0,
1036 &clk_sclk_uart1, 1057 &clk_sclk_uart1,
1037 &clk_sclk_uart2, 1058 &clk_sclk_uart2,
1038 &clk_sclk_uart3, 1059 &clk_sclk_uart3,
1060 &clk_sclk_mmc0,
1061 &clk_sclk_mmc1,
1062 &clk_sclk_mmc2,
1063 &clk_sclk_mmc3,
1064 &clk_sclk_spi0,
1065 &clk_sclk_spi1,
1066};
1067
1068static struct clk *clk_cdev[] = {
1069 &clk_hsmmc0,
1070 &clk_hsmmc1,
1071 &clk_hsmmc2,
1072 &clk_hsmmc3,
1039}; 1073};
1040 1074
1041/* Clock initialisation code */ 1075/* Clock initialisation code */
@@ -1283,6 +1317,17 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
1283 CLKDEV_INIT("s5pv210-uart.1", "clk_uart_baud1", &clk_sclk_uart1.clk), 1317 CLKDEV_INIT("s5pv210-uart.1", "clk_uart_baud1", &clk_sclk_uart1.clk),
1284 CLKDEV_INIT("s5pv210-uart.2", "clk_uart_baud1", &clk_sclk_uart2.clk), 1318 CLKDEV_INIT("s5pv210-uart.2", "clk_uart_baud1", &clk_sclk_uart2.clk),
1285 CLKDEV_INIT("s5pv210-uart.3", "clk_uart_baud1", &clk_sclk_uart3.clk), 1319 CLKDEV_INIT("s5pv210-uart.3", "clk_uart_baud1", &clk_sclk_uart3.clk),
1320 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0),
1321 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1),
1322 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2),
1323 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.0", &clk_hsmmc3),
1324 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
1325 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
1326 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
1327 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
1328 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
1329 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
1330 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
1286}; 1331};
1287 1332
1288void __init s5pv210_register_clocks(void) 1333void __init s5pv210_register_clocks(void)
@@ -1307,6 +1352,10 @@ void __init s5pv210_register_clocks(void)
1307 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 1352 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1308 clkdev_add_table(s5pv210_clk_lookup, ARRAY_SIZE(s5pv210_clk_lookup)); 1353 clkdev_add_table(s5pv210_clk_lookup, ARRAY_SIZE(s5pv210_clk_lookup));
1309 1354
1355 s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
1356 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
1357 s3c_disable_clocks(clk_cdev[ptr], 1);
1358
1310 s3c24xx_register_clock(&dummy_apb_pclk); 1359 s3c24xx_register_clock(&dummy_apb_pclk);
1311 s3c_pwmclk_init(); 1360 s3c_pwmclk_init();
1312} 1361}
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
deleted file mode 100644
index eaf9a7bff7a0..000000000000
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ /dev/null
@@ -1,175 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/dev-spi.c
2 *
3 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/dma-mapping.h>
13#include <linux/gpio.h>
14
15#include <mach/dma.h>
16#include <mach/map.h>
17#include <mach/irqs.h>
18#include <mach/spi-clocks.h>
19
20#include <plat/s3c64xx-spi.h>
21#include <plat/gpio-cfg.h>
22
23static char *spi_src_clks[] = {
24 [S5PV210_SPI_SRCCLK_PCLK] = "pclk",
25 [S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi",
26};
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
37{
38 unsigned int base;
39
40 switch (pdev->id) {
41 case 0:
42 base = S5PV210_GPB(0);
43 break;
44
45 case 1:
46 base = S5PV210_GPB(4);
47 break;
48
49 default:
50 dev_err(&pdev->dev, "Invalid SPI Controller number!");
51 return -EINVAL;
52 }
53
54 s3c_gpio_cfgall_range(base, 3,
55 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
56
57 return 0;
58}
59
60static struct resource s5pv210_spi0_resource[] = {
61 [0] = {
62 .start = S5PV210_PA_SPI0,
63 .end = S5PV210_PA_SPI0 + 0x100 - 1,
64 .flags = IORESOURCE_MEM,
65 },
66 [1] = {
67 .start = DMACH_SPI0_TX,
68 .end = DMACH_SPI0_TX,
69 .flags = IORESOURCE_DMA,
70 },
71 [2] = {
72 .start = DMACH_SPI0_RX,
73 .end = DMACH_SPI0_RX,
74 .flags = IORESOURCE_DMA,
75 },
76 [3] = {
77 .start = IRQ_SPI0,
78 .end = IRQ_SPI0,
79 .flags = IORESOURCE_IRQ,
80 },
81};
82
83static struct s3c64xx_spi_info s5pv210_spi0_pdata = {
84 .cfg_gpio = s5pv210_spi_cfg_gpio,
85 .fifo_lvl_mask = 0x1ff,
86 .rx_lvl_offset = 15,
87 .high_speed = 1,
88 .tx_st_done = 25,
89};
90
91static u64 spi_dmamask = DMA_BIT_MASK(32);
92
93struct platform_device s5pv210_device_spi0 = {
94 .name = "s3c64xx-spi",
95 .id = 0,
96 .num_resources = ARRAY_SIZE(s5pv210_spi0_resource),
97 .resource = s5pv210_spi0_resource,
98 .dev = {
99 .dma_mask = &spi_dmamask,
100 .coherent_dma_mask = DMA_BIT_MASK(32),
101 .platform_data = &s5pv210_spi0_pdata,
102 },
103};
104
105static struct resource s5pv210_spi1_resource[] = {
106 [0] = {
107 .start = S5PV210_PA_SPI1,
108 .end = S5PV210_PA_SPI1 + 0x100 - 1,
109 .flags = IORESOURCE_MEM,
110 },
111 [1] = {
112 .start = DMACH_SPI1_TX,
113 .end = DMACH_SPI1_TX,
114 .flags = IORESOURCE_DMA,
115 },
116 [2] = {
117 .start = DMACH_SPI1_RX,
118 .end = DMACH_SPI1_RX,
119 .flags = IORESOURCE_DMA,
120 },
121 [3] = {
122 .start = IRQ_SPI1,
123 .end = IRQ_SPI1,
124 .flags = IORESOURCE_IRQ,
125 },
126};
127
128static struct s3c64xx_spi_info s5pv210_spi1_pdata = {
129 .cfg_gpio = s5pv210_spi_cfg_gpio,
130 .fifo_lvl_mask = 0x7f,
131 .rx_lvl_offset = 15,
132 .high_speed = 1,
133 .tx_st_done = 25,
134};
135
136struct platform_device s5pv210_device_spi1 = {
137 .name = "s3c64xx-spi",
138 .id = 1,
139 .num_resources = ARRAY_SIZE(s5pv210_spi1_resource),
140 .resource = s5pv210_spi1_resource,
141 .dev = {
142 .dma_mask = &spi_dmamask,
143 .coherent_dma_mask = DMA_BIT_MASK(32),
144 .platform_data = &s5pv210_spi1_pdata,
145 },
146};
147
148void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
149{
150 struct s3c64xx_spi_info *pd;
151
152 /* Reject invalid configuration */
153 if (!num_cs || src_clk_nr < 0
154 || src_clk_nr > S5PV210_SPI_SRCCLK_SCLK) {
155 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
156 return;
157 }
158
159 switch (cntrlr) {
160 case 0:
161 pd = &s5pv210_spi0_pdata;
162 break;
163 case 1:
164 pd = &s5pv210_spi1_pdata;
165 break;
166 default:
167 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
168 __func__, cntrlr);
169 return;
170 }
171
172 pd->num_cs = num_cs;
173 pd->src_clk_nr = src_clk_nr;
174 pd->src_clk_name = spi_src_clks[src_clk_nr];
175}
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 7ff609f1568b..89c34b8f73bf 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -109,6 +109,8 @@
109#define S3C_PA_RTC S5PV210_PA_RTC 109#define S3C_PA_RTC S5PV210_PA_RTC
110#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG 110#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG
111#define S3C_PA_WDT S5PV210_PA_WATCHDOG 111#define S3C_PA_WDT S5PV210_PA_WATCHDOG
112#define S3C_PA_SPI0 S5PV210_PA_SPI0
113#define S3C_PA_SPI1 S5PV210_PA_SPI1
112 114
113#define S5P_PA_CHIPID S5PV210_PA_CHIPID 115#define S5P_PA_CHIPID S5PV210_PA_CHIPID
114#define S5P_PA_FIMC0 S5PV210_PA_FIMC0 116#define S5P_PA_FIMC0 S5PV210_PA_FIMC0
diff --git a/arch/arm/mach-s5pv210/mach-aquila.c b/arch/arm/mach-s5pv210/mach-aquila.c
index 6f7dfe993c12..5e734d025a6a 100644
--- a/arch/arm/mach-s5pv210/mach-aquila.c
+++ b/arch/arm/mach-s5pv210/mach-aquila.c
@@ -597,8 +597,7 @@ static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = {
597 597
598static void aquila_setup_sdhci(void) 598static void aquila_setup_sdhci(void)
599{ 599{
600 gpio_request(AQUILA_EXT_FLASH_EN, "FLASH_EN"); 600 gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN");
601 gpio_direction_output(AQUILA_EXT_FLASH_EN, 1);
602 601
603 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); 602 s3c_sdhci0_set_platdata(&aquila_hsmmc0_data);
604 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); 603 s3c_sdhci1_set_platdata(&aquila_hsmmc1_data);
diff --git a/arch/arm/mach-s5pv210/mach-goni.c b/arch/arm/mach-s5pv210/mach-goni.c
index 12c693717398..ff9152610439 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -229,8 +229,7 @@ static void __init goni_radio_init(void)
229 i2c1_devs[0].irq = gpio_to_irq(gpio); 229 i2c1_devs[0].irq = gpio_to_irq(gpio);
230 230
231 gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */ 231 gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */
232 gpio_request(gpio, "FM_RST"); 232 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "FM_RST");
233 gpio_direction_output(gpio, 1);
234} 233}
235 234
236/* TSP */ 235/* TSP */
@@ -266,8 +265,7 @@ static void __init goni_tsp_init(void)
266 int gpio; 265 int gpio;
267 266
268 gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */ 267 gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */
269 gpio_request(gpio, "TSP_LDO_ON"); 268 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
270 gpio_direction_output(gpio, 1);
271 gpio_export(gpio, 0); 269 gpio_export(gpio, 0);
272 270
273 gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */ 271 gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index b4021dd802a8..dff9ea7b5bba 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -155,15 +155,12 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd,
155{ 155{
156 if (power) { 156 if (power) {
157#if !defined(CONFIG_BACKLIGHT_PWM) 157#if !defined(CONFIG_BACKLIGHT_PWM)
158 gpio_request(S5PV210_GPD0(3), "GPD0"); 158 gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_HIGH, "GPD0");
159 gpio_direction_output(S5PV210_GPD0(3), 1);
160 gpio_free(S5PV210_GPD0(3)); 159 gpio_free(S5PV210_GPD0(3));
161#endif 160#endif
162 161
163 /* fire nRESET on power up */ 162 /* fire nRESET on power up */
164 gpio_request(S5PV210_GPH0(6), "GPH0"); 163 gpio_request_one(S5PV210_GPH0(6), GPIOF_OUT_INIT_HIGH, "GPH0");
165
166 gpio_direction_output(S5PV210_GPH0(6), 1);
167 164
168 gpio_set_value(S5PV210_GPH0(6), 0); 165 gpio_set_value(S5PV210_GPH0(6), 0);
169 mdelay(10); 166 mdelay(10);
@@ -174,8 +171,7 @@ static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd,
174 gpio_free(S5PV210_GPH0(6)); 171 gpio_free(S5PV210_GPH0(6));
175 } else { 172 } else {
176#if !defined(CONFIG_BACKLIGHT_PWM) 173#if !defined(CONFIG_BACKLIGHT_PWM)
177 gpio_request(S5PV210_GPD0(3), "GPD0"); 174 gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_LOW, "GPD0");
178 gpio_direction_output(S5PV210_GPD0(3), 0);
179 gpio_free(S5PV210_GPD0(3)); 175 gpio_free(S5PV210_GPD0(3));
180#endif 176#endif
181 } 177 }
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
deleted file mode 100644
index 6b8ccc4d35fd..000000000000
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ /dev/null
@@ -1,22 +0,0 @@
1/* linux/arch/arm/mach-s5pv210/setup-sdhci.c
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5PV210 - Helper functions for settign up SDHCI device(s) (HSMMC)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/types.h>
14
15/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
16
17char *s5pv210_hsmmc_clksrcs[4] = {
18 [0] = "hsmmc", /* HCLK */
19 /* [1] = "hsmmc", - duplicate HCLK entry */
20 [2] = "sclk_mmc", /* mmc_bus */
21 /* [3] = NULL, - reserved */
22};
diff --git a/arch/arm/mach-s5pv210/setup-spi.c b/arch/arm/mach-s5pv210/setup-spi.c
new file mode 100644
index 000000000000..f43c5048a37d
--- /dev/null
+++ b/arch/arm/mach-s5pv210/setup-spi.c
@@ -0,0 +1,51 @@
1/* linux/arch/arm/mach-s5pv210/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16
17#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
19 .fifo_lvl_mask = 0x1ff,
20 .rx_lvl_offset = 15,
21 .high_speed = 1,
22 .tx_st_done = 25,
23};
24
25int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
26{
27 s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2));
28 s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP);
29 s3c_gpio_cfgall_range(S5PV210_GPB(2), 2,
30 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
31 return 0;
32}
33#endif
34
35#ifdef CONFIG_S3C64XX_DEV_SPI1
36struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
37 .fifo_lvl_mask = 0x7f,
38 .rx_lvl_offset = 15,
39 .high_speed = 1,
40 .tx_st_done = 25,
41};
42
43int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
44{
45 s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2));
46 s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP);
47 s3c_gpio_cfgall_range(S5PV210_GPB(6), 2,
48 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
49 return 0;
50}
51#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 05:14:05 -0500