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authorPadmavathi Venna <padma.v@samsung.com>2011-12-22 20:14:31 -0500
committerKukjin Kim <kgene.kim@samsung.com>2011-12-22 20:49:53 -0500
commit875a59374cd10200ac24f03877ccd8f73af590cc (patch)
treea7a933bd6a567fd2daa51439bcb17597aa337814 /arch/arm/mach-s5p64x0
parenta153e31abb01484d0088ac28425dc98204848ad4 (diff)
ARM: SAMSUNG: Consolidation of SPI platform devices to plat-samsung
SPI platform device definitions consolidated from respective machine folder to plat-samsung Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p64x0')
-rw-r--r--arch/arm/mach-s5p64x0/Makefile1
-rw-r--r--arch/arm/mach-s5p64x0/dev-spi.c218
2 files changed, 0 insertions, 219 deletions
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index a1324d8dc4e0..e24d316e544b 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -26,7 +26,6 @@ obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
26# device support 26# device support
27 27
28obj-y += dev-audio.o 28obj-y += dev-audio.o
29obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
30 29
31obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o 30obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
32obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o 31obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
deleted file mode 100644
index 5b5d3c083644..000000000000
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ /dev/null
@@ -1,218 +0,0 @@
1/* linux/arch/arm/mach-s5p64x0/dev-spi.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright (C) 2010 Samsung Electronics Co. Ltd.
7 * Jaswinder Singh <jassi.brar@samsung.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h>
16#include <linux/gpio.h>
17
18#include <mach/dma.h>
19#include <mach/map.h>
20#include <mach/irqs.h>
21#include <mach/regs-clock.h>
22#include <mach/spi-clocks.h>
23
24#include <plat/cpu.h>
25#include <plat/s3c64xx-spi.h>
26#include <plat/gpio-cfg.h>
27
28/* SPI Controller platform_devices */
29
30/* Since we emulate multi-cs capability, we do not touch the CS.
31 * The emulated CS is toggled by board specific mechanism, as it can
32 * be either some immediate GPIO or some signal out of some other
33 * chip in between ... or some yet another way.
34 * We simply do not assume anything about CS.
35 */
36static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
37{
38 unsigned int base;
39
40 switch (pdev->id) {
41 case 0:
42 base = S5P6440_GPC(0);
43 break;
44
45 case 1:
46 base = S5P6440_GPC(4);
47 break;
48
49 default:
50 dev_err(&pdev->dev, "Invalid SPI Controller number!");
51 return -EINVAL;
52 }
53
54 s3c_gpio_cfgall_range(base, 3,
55 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
56
57 return 0;
58}
59
60static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
61{
62 unsigned int base;
63
64 switch (pdev->id) {
65 case 0:
66 base = S5P6450_GPC(0);
67 break;
68
69 case 1:
70 base = S5P6450_GPC(4);
71 break;
72
73 default:
74 dev_err(&pdev->dev, "Invalid SPI Controller number!");
75 return -EINVAL;
76 }
77
78 s3c_gpio_cfgall_range(base, 3,
79 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
80
81 return 0;
82}
83
84static struct resource s5p64x0_spi0_resource[] = {
85 [0] = {
86 .start = S5P64X0_PA_SPI0,
87 .end = S5P64X0_PA_SPI0 + 0x100 - 1,
88 .flags = IORESOURCE_MEM,
89 },
90 [1] = {
91 .start = DMACH_SPI0_TX,
92 .end = DMACH_SPI0_TX,
93 .flags = IORESOURCE_DMA,
94 },
95 [2] = {
96 .start = DMACH_SPI0_RX,
97 .end = DMACH_SPI0_RX,
98 .flags = IORESOURCE_DMA,
99 },
100 [3] = {
101 .start = IRQ_SPI0,
102 .end = IRQ_SPI0,
103 .flags = IORESOURCE_IRQ,
104 },
105};
106
107static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
108 .cfg_gpio = s5p6440_spi_cfg_gpio,
109 .fifo_lvl_mask = 0x1ff,
110 .rx_lvl_offset = 15,
111 .tx_st_done = 25,
112};
113
114static struct s3c64xx_spi_info s5p6450_spi0_pdata = {
115 .cfg_gpio = s5p6450_spi_cfg_gpio,
116 .fifo_lvl_mask = 0x1ff,
117 .rx_lvl_offset = 15,
118 .tx_st_done = 25,
119};
120
121static u64 spi_dmamask = DMA_BIT_MASK(32);
122
123struct platform_device s5p64x0_device_spi0 = {
124 .name = "s3c64xx-spi",
125 .id = 0,
126 .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
127 .resource = s5p64x0_spi0_resource,
128 .dev = {
129 .dma_mask = &spi_dmamask,
130 .coherent_dma_mask = DMA_BIT_MASK(32),
131 },
132};
133
134static struct resource s5p64x0_spi1_resource[] = {
135 [0] = {
136 .start = S5P64X0_PA_SPI1,
137 .end = S5P64X0_PA_SPI1 + 0x100 - 1,
138 .flags = IORESOURCE_MEM,
139 },
140 [1] = {
141 .start = DMACH_SPI1_TX,
142 .end = DMACH_SPI1_TX,
143 .flags = IORESOURCE_DMA,
144 },
145 [2] = {
146 .start = DMACH_SPI1_RX,
147 .end = DMACH_SPI1_RX,
148 .flags = IORESOURCE_DMA,
149 },
150 [3] = {
151 .start = IRQ_SPI1,
152 .end = IRQ_SPI1,
153 .flags = IORESOURCE_IRQ,
154 },
155};
156
157static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
158 .cfg_gpio = s5p6440_spi_cfg_gpio,
159 .fifo_lvl_mask = 0x7f,
160 .rx_lvl_offset = 15,
161 .tx_st_done = 25,
162};
163
164static struct s3c64xx_spi_info s5p6450_spi1_pdata = {
165 .cfg_gpio = s5p6450_spi_cfg_gpio,
166 .fifo_lvl_mask = 0x7f,
167 .rx_lvl_offset = 15,
168 .tx_st_done = 25,
169};
170
171struct platform_device s5p64x0_device_spi1 = {
172 .name = "s3c64xx-spi",
173 .id = 1,
174 .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
175 .resource = s5p64x0_spi1_resource,
176 .dev = {
177 .dma_mask = &spi_dmamask,
178 .coherent_dma_mask = DMA_BIT_MASK(32),
179 },
180};
181
182void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
183{
184 struct s3c64xx_spi_info *pd;
185
186 /* Reject invalid configuration */
187 if (!num_cs || src_clk_nr < 0
188 || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {
189 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
190 return;
191 }
192
193 switch (cntrlr) {
194 case 0:
195 if (soc_is_s5p6450())
196 pd = &s5p6450_spi0_pdata;
197 else
198 pd = &s5p6440_spi0_pdata;
199
200 s5p64x0_device_spi0.dev.platform_data = pd;
201 break;
202 case 1:
203 if (soc_is_s5p6450())
204 pd = &s5p6450_spi1_pdata;
205 else
206 pd = &s5p6440_spi1_pdata;
207
208 s5p64x0_device_spi1.dev.platform_data = pd;
209 break;
210 default:
211 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
212 __func__, cntrlr);
213 return;
214 }
215
216 pd->num_cs = num_cs;
217 pd->src_clk_nr = src_clk_nr;
218}
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-04 04:53:20 -0500