diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 04:14:00 -0500 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 04:27:43 -0500 |
| commit | 1526631d0255d63b981a374a6623893032b04af0 (patch) | |
| tree | 60245db03cbb3d93c4611b49687db7beb7a7d7b2 /arch/arm/mach-s5p64x0/clock-s5p6450.c | |
| parent | e89c5d07cd523391d859cdf689fd2cb673269e85 (diff) | |
ARM: S5P6450: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p64x0/clock-s5p6450.c')
| -rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6450.c | 16 |
1 files changed, 3 insertions, 13 deletions
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c index 7dbf3c968f53..9db2e1befb6b 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6450.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c | |||
| @@ -181,7 +181,7 @@ static struct clksrc_clk clk_pclk_low = { | |||
| 181 | * recommended to keep the following clocks disabled until the driver requests | 181 | * recommended to keep the following clocks disabled until the driver requests |
| 182 | * for enabling the clock. | 182 | * for enabling the clock. |
| 183 | */ | 183 | */ |
| 184 | static struct clk init_clocks_disable[] = { | 184 | static struct clk init_clocks_off[] = { |
| 185 | { | 185 | { |
| 186 | .name = "usbhost", | 186 | .name = "usbhost", |
| 187 | .id = -1, | 187 | .id = -1, |
| @@ -633,8 +633,6 @@ void __init_or_cpufreq s5p6450_setup_clocks(void) | |||
| 633 | 633 | ||
| 634 | void __init s5p6450_register_clocks(void) | 634 | void __init s5p6450_register_clocks(void) |
| 635 | { | 635 | { |
| 636 | struct clk *clkp; | ||
| 637 | int ret; | ||
| 638 | int ptr; | 636 | int ptr; |
| 639 | 637 | ||
| 640 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) | 638 | for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) |
| @@ -643,16 +641,8 @@ void __init s5p6450_register_clocks(void) | |||
| 643 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); | 641 | s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); |
| 644 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); | 642 | s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); |
| 645 | 643 | ||
| 646 | clkp = init_clocks_disable; | 644 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
| 647 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 645 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
| 648 | |||
| 649 | ret = s3c24xx_register_clock(clkp); | ||
| 650 | if (ret < 0) { | ||
| 651 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
| 652 | clkp->name, ret); | ||
| 653 | } | ||
| 654 | (clkp->enable)(clkp, 0); | ||
| 655 | } | ||
| 656 | 646 | ||
| 657 | s3c_pwmclk_init(); | 647 | s3c_pwmclk_init(); |
| 658 | } | 648 | } |