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author | Olof Johansson <olof@lixom.net> | 2012-05-11 02:38:20 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2012-05-11 02:38:32 -0400 |
commit | ff658f46d4641ac023b0d807d7e946822c925829 (patch) | |
tree | 8a992e3beabd003f171ea067ce523160d4dd64ec /arch/arm/mach-pxa | |
parent | afeb36f128e387f8ad2cd7cd94020bae984ea9b4 (diff) | |
parent | 8500746fab2fd69843425fa82192a4e377905336 (diff) |
Merge tag 'omap-board-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/boards
Board specific changes for omap.
Note that these are based on omap-pm-regulator-for-v3.5 as
both branches are adding twl regulators.
By Paul Gortmaker (8) and others
via Linus Torvalds (38) and others
* tag 'omap-board-for-v3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
OMAP: omap4panda: Use common configuration for V1V8, V2V1 supplies
OMAP: 4430SDP: Use common configuration for V1V8, V2V1 supplies
OMAP4: twl-common: Add twl6030 V1V8, V2V1 SMPS common configuration
ARM: OMAP: Mark Beagleboard-xM MMC bus as 4-bit
Add MSUB support for the LogicPD OMAP3530 DevKits
ARM: OMAP: rx51: Platform support for lis3lv02d accelerometer
ARM: OMAP2+: craneboard: register emac device
ARM: OMAP4: board-omap4panda: Register platform device for HDMI audio codec
ARM: OMAP4: board-4430sdp: Register platform device for HDMI audio codec
ARM: OMAP: devices: Register platform devices for HDMI audio
ARM: OMAP3: igep0020: Add support for Micron NAND Flash storage memory
ARM: OMAP2+: nand: Make board_onenand_init() visible to board code
ARM: OMAP3: cm-t35: add support for power off
ARM: OMAP: WiLink platform data for the PandaBoard
ARM: OMAP2PLUS: Enable HIGHMEM
ARM: OMAP: omap2plus_defconfig: Enable ehci-omap and sms95xx support
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-pxa/mfp-pxa2xx.c | 21 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa27x.c | 6 |
3 files changed, 31 insertions, 3 deletions
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h index c54cef25895c..cbf51ae81855 100644 --- a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h +++ b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h | |||
@@ -17,6 +17,7 @@ | |||
17 | * | 17 | * |
18 | * bit 23 - Input/Output (PXA2xx specific) | 18 | * bit 23 - Input/Output (PXA2xx specific) |
19 | * bit 24 - Wakeup Enable(PXA2xx specific) | 19 | * bit 24 - Wakeup Enable(PXA2xx specific) |
20 | * bit 25 - Keep Output (PXA2xx specific) | ||
20 | */ | 21 | */ |
21 | 22 | ||
22 | #define MFP_DIR_IN (0x0 << 23) | 23 | #define MFP_DIR_IN (0x0 << 23) |
@@ -25,6 +26,12 @@ | |||
25 | #define MFP_DIR(x) (((x) >> 23) & 0x1) | 26 | #define MFP_DIR(x) (((x) >> 23) & 0x1) |
26 | 27 | ||
27 | #define MFP_LPM_CAN_WAKEUP (0x1 << 24) | 28 | #define MFP_LPM_CAN_WAKEUP (0x1 << 24) |
29 | |||
30 | /* | ||
31 | * MFP_LPM_KEEP_OUTPUT must be specified for pins that need to | ||
32 | * retain their last output level (low or high). | ||
33 | * Note: MFP_LPM_KEEP_OUTPUT has no effect on pins configured for input. | ||
34 | */ | ||
28 | #define MFP_LPM_KEEP_OUTPUT (0x1 << 25) | 35 | #define MFP_LPM_KEEP_OUTPUT (0x1 << 25) |
29 | 36 | ||
30 | #define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE) | 37 | #define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE) |
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c index b0a842887780..ef0426a159d4 100644 --- a/arch/arm/mach-pxa/mfp-pxa2xx.c +++ b/arch/arm/mach-pxa/mfp-pxa2xx.c | |||
@@ -33,6 +33,8 @@ | |||
33 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) | 33 | #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) |
34 | #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5)) | 34 | #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5)) |
35 | #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) | 35 | #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) |
36 | #define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18) | ||
37 | #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24) | ||
36 | 38 | ||
37 | #define PWER_WE35 (1 << 24) | 39 | #define PWER_WE35 (1 << 24) |
38 | 40 | ||
@@ -348,6 +350,7 @@ static inline void pxa27x_mfp_init(void) {} | |||
348 | #ifdef CONFIG_PM | 350 | #ifdef CONFIG_PM |
349 | static unsigned long saved_gafr[2][4]; | 351 | static unsigned long saved_gafr[2][4]; |
350 | static unsigned long saved_gpdr[4]; | 352 | static unsigned long saved_gpdr[4]; |
353 | static unsigned long saved_gplr[4]; | ||
351 | static unsigned long saved_pgsr[4]; | 354 | static unsigned long saved_pgsr[4]; |
352 | 355 | ||
353 | static int pxa2xx_mfp_suspend(void) | 356 | static int pxa2xx_mfp_suspend(void) |
@@ -366,14 +369,26 @@ static int pxa2xx_mfp_suspend(void) | |||
366 | } | 369 | } |
367 | 370 | ||
368 | for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { | 371 | for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { |
369 | |||
370 | saved_gafr[0][i] = GAFR_L(i); | 372 | saved_gafr[0][i] = GAFR_L(i); |
371 | saved_gafr[1][i] = GAFR_U(i); | 373 | saved_gafr[1][i] = GAFR_U(i); |
372 | saved_gpdr[i] = GPDR(i * 32); | 374 | saved_gpdr[i] = GPDR(i * 32); |
375 | saved_gplr[i] = GPLR(i * 32); | ||
373 | saved_pgsr[i] = PGSR(i); | 376 | saved_pgsr[i] = PGSR(i); |
374 | 377 | ||
375 | GPDR(i * 32) = gpdr_lpm[i]; | 378 | GPSR(i * 32) = PGSR(i); |
379 | GPCR(i * 32) = ~PGSR(i); | ||
380 | } | ||
381 | |||
382 | /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */ | ||
383 | for (i = 0; i < pxa_last_gpio; i++) { | ||
384 | if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) || | ||
385 | ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) && | ||
386 | (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i)))) | ||
387 | GPDR(i) |= GPIO_bit(i); | ||
388 | else | ||
389 | GPDR(i) &= ~GPIO_bit(i); | ||
376 | } | 390 | } |
391 | |||
377 | return 0; | 392 | return 0; |
378 | } | 393 | } |
379 | 394 | ||
@@ -384,6 +399,8 @@ static void pxa2xx_mfp_resume(void) | |||
384 | for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { | 399 | for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) { |
385 | GAFR_L(i) = saved_gafr[0][i]; | 400 | GAFR_L(i) = saved_gafr[0][i]; |
386 | GAFR_U(i) = saved_gafr[1][i]; | 401 | GAFR_U(i) = saved_gafr[1][i]; |
402 | GPSR(i * 32) = saved_gplr[i]; | ||
403 | GPCR(i * 32) = ~saved_gplr[i]; | ||
387 | GPDR(i * 32) = saved_gpdr[i]; | 404 | GPDR(i * 32) = saved_gpdr[i]; |
388 | PGSR(i) = saved_pgsr[i]; | 405 | PGSR(i) = saved_pgsr[i]; |
389 | } | 406 | } |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 6bce78edce7a..4726c246dcdc 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -421,8 +421,11 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) | |||
421 | pxa_register_device(&pxa27x_device_i2c_power, info); | 421 | pxa_register_device(&pxa27x_device_i2c_power, info); |
422 | } | 422 | } |
423 | 423 | ||
424 | static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = { | ||
425 | .gpio_set_wake = gpio_set_wake, | ||
426 | }; | ||
427 | |||
424 | static struct platform_device *devices[] __initdata = { | 428 | static struct platform_device *devices[] __initdata = { |
425 | &pxa_device_gpio, | ||
426 | &pxa27x_device_udc, | 429 | &pxa27x_device_udc, |
427 | &pxa_device_pmu, | 430 | &pxa_device_pmu, |
428 | &pxa_device_i2s, | 431 | &pxa_device_i2s, |
@@ -458,6 +461,7 @@ static int __init pxa27x_init(void) | |||
458 | register_syscore_ops(&pxa2xx_mfp_syscore_ops); | 461 | register_syscore_ops(&pxa2xx_mfp_syscore_ops); |
459 | register_syscore_ops(&pxa2xx_clock_syscore_ops); | 462 | register_syscore_ops(&pxa2xx_clock_syscore_ops); |
460 | 463 | ||
464 | pxa_register_device(&pxa_device_gpio, &pxa27x_gpio_info); | ||
461 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); | 465 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
462 | } | 466 | } |
463 | 467 | ||