Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits)
  [ARM] 4822/1: RealView: Change the REALVIEW_MPCORE configuration option
  [ARM] 4821/1: RealView: Remove the platform dependencies from localtimer.c
  [ARM] 4820/1: RealView: Select the timer IRQ at run-time
  [ARM] 4819/1: RealView: Fix entry-macro.S to work with multiple platforms
  [ARM] 4818/1: RealView: Add core-tile detection
  [ARM] 4817/1: RealView: Move the AMBA resource definitions to realview_eb.c
  [ARM] 4816/1: RealView: Move the platform-specific definitions into board-eb.h
  [ARM] 4815/1: RealView: Add clockevents suport for the local timers
  [ARM] 4814/1: RealView: Add broadcasting clockevents support for ARM11MPCore
  [ARM] 4813/1: Add SMP helper functions for clockevents support
  [ARM] 4812/1: RealView: clockevents support for the RealView platforms
  [ARM] 4811/1: RealView: clocksource support for the RealView platforms
  [ARM] 4736/1: Export atags to userspace and allow kexec to use customised atags
  [ARM] 4798/1: pcm027: fix missing header file
  [ARM] 4803/1: pxa: fix building issue of poodle.c caused by patch 4737/1
  [ARM] 4801/1: pxa: fix building issues of missing pxa2xx-regs.h
  [ARM] pxa: introduce sysdev for pxa3xx static memory controller
  [ARM] pxa: add preliminary suspend/resume code for pxa3xx
  [ARM] pxa: introduce sysdev for GPIO register saving/restoring
  [ARM] pxa: introduce sysdev for IRQ register saving/restoring
  ...

1 files changed, 88 insertions, 0 deletions

diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c
new file mode 100644
index 000000000000..ad346addc028
--- /dev/null
+++ b/arch/arm/mach-pxa/smemc.c
@@ -0,0 +1,88 @@
+/*
+ * Static Memory Controller
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+
+#define SMEMC_PHYS_BASE (0x4A000000)
+#define SMEMC_PHYS_SIZE (0x90)
+
+#define MSC0            (0x08)  /* Static Memory Controller Register 0 */
+#define MSC1            (0x0C)  /* Static Memory Controller Register 1 */
+#define SXCNFG          (0x1C)  /* Synchronous Static Memory Control Register */
+#define MEMCLKCFG       (0x68)  /* Clock Configuration */
+#define CSADRCFG0       (0x80)  /* Address Configuration Register for CS0 */
+#define CSADRCFG1       (0x84)  /* Address Configuration Register for CS1 */
+#define CSADRCFG2       (0x88)  /* Address Configuration Register for CS2 */
+#define CSADRCFG3       (0x8C)  /* Address Configuration Register for CS3 */
+
+#ifdef CONFIG_PM
+static void __iomem *smemc_mmio_base;
+
+static unsigned long msc[2];
+static unsigned long sxcnfg, memclkcfg;
+static unsigned long csadrcfg[4];
+
+static int pxa3xx_smemc_suspend(struct sys_device *dev, pm_message_t state)
+{
+        msc[0] = __raw_readl(smemc_mmio_base + MSC0);
+        msc[1] = __raw_readl(smemc_mmio_base + MSC1);
+        sxcnfg = __raw_readl(smemc_mmio_base + SXCNFG);
+        memclkcfg = __raw_readl(smemc_mmio_base + MEMCLKCFG);
+        csadrcfg[0] = __raw_readl(smemc_mmio_base + CSADRCFG0);
+        csadrcfg[1] = __raw_readl(smemc_mmio_base + CSADRCFG1);
+        csadrcfg[2] = __raw_readl(smemc_mmio_base + CSADRCFG2);
+        csadrcfg[3] = __raw_readl(smemc_mmio_base + CSADRCFG3);
+
+        return 0;
+}
+
+static int pxa3xx_smemc_resume(struct sys_device *dev)
+{
+        __raw_writel(msc[0], smemc_mmio_base + MSC0);
+        __raw_writel(msc[1], smemc_mmio_base + MSC1);
+        __raw_writel(sxcnfg, smemc_mmio_base + SXCNFG);
+        __raw_writel(memclkcfg, smemc_mmio_base + MEMCLKCFG);
+        __raw_writel(csadrcfg[0], smemc_mmio_base + CSADRCFG0);
+        __raw_writel(csadrcfg[1], smemc_mmio_base + CSADRCFG1);
+        __raw_writel(csadrcfg[2], smemc_mmio_base + CSADRCFG2);
+        __raw_writel(csadrcfg[3], smemc_mmio_base + CSADRCFG3);
+
+        return 0;
+}
+
+static struct sysdev_class smemc_sysclass = {
+        .name           = "smemc",
+        .suspend        = pxa3xx_smemc_suspend,
+        .resume         = pxa3xx_smemc_resume,
+};
+
+static struct sys_device smemc_sysdev = {
+        .id             = 0,
+        .cls            = &smemc_sysclass,
+};
+
+static int __init smemc_init(void)
+{
+        int ret = 0;
+
+        if (cpu_is_pxa3xx()) {
+                smemc_mmio_base = ioremap(SMEMC_PHYS_BASE, SMEMC_PHYS_SIZE);
+                if (smemc_mmio_base == NULL)
+                        return -ENODEV;
+
+                ret = sysdev_class_register(&smemc_sysclass);
+                if (ret)
+                        return ret;
+
+                ret = sysdev_register(&smemc_sysdev);
+        }
+
+        return ret;
+}
+subsys_initcall(smemc_init);
+#endif