diff options
author | Kevin Hilman <khilman@ti.com> | 2011-06-02 20:28:13 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@ti.com> | 2011-09-15 15:08:58 -0400 |
commit | 8abc0b58fdb89124d8278f110f523b27c666d36c (patch) | |
tree | 7f48f3ab775b32adb21f1a1941fdeb18bd0e23e8 /arch/arm/mach-omap2/vc44xx_data.c | |
parent | f5395480f5088a86cc8594d29b5c2f07f6995c3d (diff) |
OMAP3+: PM: VC: handle mutant channel config for OMAP4 MPU channel
On OMAP3+, all VC channels have the the same bitfield ordering for all
VC channels, except the OMAP4 MPU channel. This appears to be a freak
accident as all other VC channel (including OMAP5) have the standard
configuration. Handle the mutant case by adding a per-channel flag
to signal the deformity and handle it during VC init.
Special thanks to Nishanth Menon <nm@ti.com> for finding this problem
and for proposing the initial solution.
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/vc44xx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/vc44xx_data.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index 148be18397f8..0a4fc37877cc 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c | |||
@@ -52,7 +52,7 @@ static const struct omap_vc_common omap4_vc_common = { | |||
52 | 52 | ||
53 | /* VC instance data for each controllable voltage line */ | 53 | /* VC instance data for each controllable voltage line */ |
54 | struct omap_vc_channel omap4_vc_mpu = { | 54 | struct omap_vc_channel omap4_vc_mpu = { |
55 | .flags = OMAP_VC_CHANNEL_DEFAULT, | 55 | .flags = OMAP_VC_CHANNEL_DEFAULT | OMAP_VC_CHANNEL_CFG_MUTANT, |
56 | .common = &omap4_vc_common, | 56 | .common = &omap4_vc_common, |
57 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, | 57 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, |
58 | .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, | 58 | .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, |