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authorAbhijit Pagare <abhijitpagare@ti.com>2010-01-26 22:12:53 -0500
committerPaul Walmsley <paul@pwsan.com>2010-01-26 22:12:53 -0500
commit84c0c39aec31a09571fc08a752a2f4da0fe9fcf2 (patch)
treecae08d44938c6df7f7bc740d2feea26086a192f4 /arch/arm/mach-omap2/prcm.c
parent3a759f09d7b9c6bbefffadd38fdc116125c49730 (diff)
ARM: OMAP4: PM: Make OMAP3 Clock-domain framework compatible for OMAP4.
Here the ".clkstctrl_reg" field is added to the clockdomain stucture as the module offsets for OMAP4 do not map one to one for powerdomains and clockdomains as it used to for OMAP3. Hence we need to use absolute addresses to access the control registers. Some of the clock domains have modules falling in the address space of PRM partition. Hence necessitating the use of absolute adresses. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/prcm.c')
-rw-r--r--arch/arm/mach-omap2/prcm.c43
1 files changed, 23 insertions, 20 deletions
diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c
index b4ba14974b37..82ad8f8ad83a 100644
--- a/arch/arm/mach-omap2/prcm.c
+++ b/arch/arm/mach-omap2/prcm.c
@@ -291,7 +291,7 @@ void omap3_prcm_save_context(void)
291 prcm_context.emu_cm_clksel = 291 prcm_context.emu_cm_clksel =
292 cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1); 292 cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1);
293 prcm_context.emu_cm_clkstctrl = 293 prcm_context.emu_cm_clkstctrl =
294 cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSTCTRL); 294 cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL);
295 prcm_context.pll_cm_autoidle2 = 295 prcm_context.pll_cm_autoidle2 =
296 cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2); 296 cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
297 prcm_context.pll_cm_clksel4 = 297 prcm_context.pll_cm_clksel4 =
@@ -344,23 +344,25 @@ void omap3_prcm_save_context(void)
344 prcm_context.mpu_cm_autoidle2 = 344 prcm_context.mpu_cm_autoidle2 =
345 cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2); 345 cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2);
346 prcm_context.iva2_cm_clkstctrl = 346 prcm_context.iva2_cm_clkstctrl =
347 cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSTCTRL); 347 cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP2_CM_CLKSTCTRL);
348 prcm_context.mpu_cm_clkstctrl = 348 prcm_context.mpu_cm_clkstctrl =
349 cm_read_mod_reg(MPU_MOD, CM_CLKSTCTRL); 349 cm_read_mod_reg(MPU_MOD, OMAP2_CM_CLKSTCTRL);
350 prcm_context.core_cm_clkstctrl = 350 prcm_context.core_cm_clkstctrl =
351 cm_read_mod_reg(CORE_MOD, CM_CLKSTCTRL); 351 cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL);
352 prcm_context.sgx_cm_clkstctrl = 352 prcm_context.sgx_cm_clkstctrl =
353 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSTCTRL); 353 cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
354 OMAP2_CM_CLKSTCTRL);
354 prcm_context.dss_cm_clkstctrl = 355 prcm_context.dss_cm_clkstctrl =
355 cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSTCTRL); 356 cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP2_CM_CLKSTCTRL);
356 prcm_context.cam_cm_clkstctrl = 357 prcm_context.cam_cm_clkstctrl =
357 cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSTCTRL); 358 cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP2_CM_CLKSTCTRL);
358 prcm_context.per_cm_clkstctrl = 359 prcm_context.per_cm_clkstctrl =
359 cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSTCTRL); 360 cm_read_mod_reg(OMAP3430_PER_MOD, OMAP2_CM_CLKSTCTRL);
360 prcm_context.neon_cm_clkstctrl = 361 prcm_context.neon_cm_clkstctrl =
361 cm_read_mod_reg(OMAP3430_NEON_MOD, CM_CLKSTCTRL); 362 cm_read_mod_reg(OMAP3430_NEON_MOD, OMAP2_CM_CLKSTCTRL);
362 prcm_context.usbhost_cm_clkstctrl = 363 prcm_context.usbhost_cm_clkstctrl =
363 cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_CLKSTCTRL); 364 cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
365 OMAP2_CM_CLKSTCTRL);
364 prcm_context.core_cm_autoidle1 = 366 prcm_context.core_cm_autoidle1 =
365 cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1); 367 cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1);
366 prcm_context.core_cm_autoidle2 = 368 prcm_context.core_cm_autoidle2 =
@@ -443,7 +445,7 @@ void omap3_prcm_restore_context(void)
443 cm_write_mod_reg(prcm_context.emu_cm_clksel, OMAP3430_EMU_MOD, 445 cm_write_mod_reg(prcm_context.emu_cm_clksel, OMAP3430_EMU_MOD,
444 CM_CLKSEL1); 446 CM_CLKSEL1);
445 cm_write_mod_reg(prcm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD, 447 cm_write_mod_reg(prcm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD,
446 CM_CLKSTCTRL); 448 OMAP2_CM_CLKSTCTRL);
447 cm_write_mod_reg(prcm_context.pll_cm_autoidle2, PLL_MOD, 449 cm_write_mod_reg(prcm_context.pll_cm_autoidle2, PLL_MOD,
448 CM_AUTOIDLE2); 450 CM_AUTOIDLE2);
449 cm_write_mod_reg(prcm_context.pll_cm_clksel4, PLL_MOD, 451 cm_write_mod_reg(prcm_context.pll_cm_clksel4, PLL_MOD,
@@ -489,22 +491,23 @@ void omap3_prcm_restore_context(void)
489 CM_AUTOIDLE2); 491 CM_AUTOIDLE2);
490 cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2); 492 cm_write_mod_reg(prcm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2);
491 cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD, 493 cm_write_mod_reg(prcm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD,
492 CM_CLKSTCTRL); 494 OMAP2_CM_CLKSTCTRL);
493 cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD, CM_CLKSTCTRL); 495 cm_write_mod_reg(prcm_context.mpu_cm_clkstctrl, MPU_MOD,
496 OMAP2_CM_CLKSTCTRL);
494 cm_write_mod_reg(prcm_context.core_cm_clkstctrl, CORE_MOD, 497 cm_write_mod_reg(prcm_context.core_cm_clkstctrl, CORE_MOD,
495 CM_CLKSTCTRL); 498 OMAP2_CM_CLKSTCTRL);
496 cm_write_mod_reg(prcm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD, 499 cm_write_mod_reg(prcm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD,
497 CM_CLKSTCTRL); 500 OMAP2_CM_CLKSTCTRL);
498 cm_write_mod_reg(prcm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD, 501 cm_write_mod_reg(prcm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD,
499 CM_CLKSTCTRL); 502 OMAP2_CM_CLKSTCTRL);
500 cm_write_mod_reg(prcm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD, 503 cm_write_mod_reg(prcm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD,
501 CM_CLKSTCTRL); 504 OMAP2_CM_CLKSTCTRL);
502 cm_write_mod_reg(prcm_context.per_cm_clkstctrl, OMAP3430_PER_MOD, 505 cm_write_mod_reg(prcm_context.per_cm_clkstctrl, OMAP3430_PER_MOD,
503 CM_CLKSTCTRL); 506 OMAP2_CM_CLKSTCTRL);
504 cm_write_mod_reg(prcm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD, 507 cm_write_mod_reg(prcm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD,
505 CM_CLKSTCTRL); 508 OMAP2_CM_CLKSTCTRL);
506 cm_write_mod_reg(prcm_context.usbhost_cm_clkstctrl, 509 cm_write_mod_reg(prcm_context.usbhost_cm_clkstctrl,
507 OMAP3430ES2_USBHOST_MOD, CM_CLKSTCTRL); 510 OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL);
508 cm_write_mod_reg(prcm_context.core_cm_autoidle1, CORE_MOD, 511 cm_write_mod_reg(prcm_context.core_cm_autoidle1, CORE_MOD,
509 CM_AUTOIDLE1); 512 CM_AUTOIDLE1);
510 cm_write_mod_reg(prcm_context.core_cm_autoidle2, CORE_MOD, 513 cm_write_mod_reg(prcm_context.core_cm_autoidle2, CORE_MOD,