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authorPaul Walmsley <paul@pwsan.com>2011-02-25 17:49:01 -0500
committerPaul Walmsley <paul@pwsan.com>2011-02-25 18:10:16 -0500
commitb80b956dc56c6a3cb77b97e2abff48fb7ebc2119 (patch)
tree09c2fdf7f9cd0c5998c2bc5e1ef7144d405d1279 /arch/arm/mach-omap2/pm34xx.c
parent6c6f5a7437955cec637c00ab1d09b8f70fc0ab3a (diff)
OMAP2+: clock: autoidle as many clocks as possible if CONFIG_OMAP_RESET_CLOCKS
Attempt to enable autoidle for as many clocks as possible in the OMAP2+-common CONFIG_OMAP_RESET_CLOCKS code. Currently, this only enables DPLL autoidle for OMAP3/4 DPLLs; but future patches will enable autoidle for other clocks and the OMAP2 DPLL/APLLs. In the long run, we should probably get rid of CONFIG_OMAP_RESET_CLOCKS, and unconditionally run the code that it selects. Otherwise, the state of the clock tree won't match the hardware state - this could result in clocks being enabled or disabled unpredictably. Based on a patch by Rajendra Nayak <rnayak@ti.com> that did this in the pm34xx.c/pm44xx.c code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm34xx.c')
-rw-r--r--arch/arm/mach-omap2/pm34xx.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index eda9a4e99a89..a99f296bdbfd 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -814,23 +814,6 @@ static void __init prcm_setup_regs(void)
814 omap_ctrl_writel(OMAP3430_AUTOIDLE_MASK, OMAP2_CONTROL_SYSCONFIG); 814 omap_ctrl_writel(OMAP3430_AUTOIDLE_MASK, OMAP2_CONTROL_SYSCONFIG);
815 815
816 /* 816 /*
817 * Set all plls to autoidle. This is needed until autoidle is
818 * enabled by clockfw
819 */
820 omap2_cm_write_mod_reg(1 << OMAP3430_AUTO_IVA2_DPLL_SHIFT,
821 OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
822 omap2_cm_write_mod_reg(1 << OMAP3430_AUTO_MPU_DPLL_SHIFT,
823 MPU_MOD,
824 CM_AUTOIDLE2);
825 omap2_cm_write_mod_reg((1 << OMAP3430_AUTO_PERIPH_DPLL_SHIFT) |
826 (1 << OMAP3430_AUTO_CORE_DPLL_SHIFT),
827 PLL_MOD,
828 CM_AUTOIDLE);
829 omap2_cm_write_mod_reg(1 << OMAP3430ES2_AUTO_PERIPH2_DPLL_SHIFT,
830 PLL_MOD,
831 CM_AUTOIDLE2);
832
833 /*
834 * Enable control of expternal oscillator through 817 * Enable control of expternal oscillator through
835 * sys_clkreq. In the long run clock framework should 818 * sys_clkreq. In the long run clock framework should
836 * take care of this. 819 * take care of this.